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authorTakashi Iwai <tiwai@suse.de>2009-05-31 03:28:12 -0400
committerTakashi Iwai <tiwai@suse.de>2009-05-31 03:28:12 -0400
commit8a933ece41a59ce077eeffe5b9bf08b14d173c58 (patch)
treef3af5301eeed579029f01f54525115035350e76c /sound/pci
parentba84bfcd2b6fdc5a9ac53a4ab103088c99f84a12 (diff)
ALSA: hda - Fix a typo in the previous patch
ICH6_GCTL_RESET was wrongly set to another bit by the commit b21fadb9c1852c91622ca1dccfeb144bc535e36e. This caused a problem when the codec needs really a reset (e.g. recovering from the communication error at probe). Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'sound/pci')
-rw-r--r--sound/pci/hda/hda_intel.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index f63bc6510e0f..b063d0e3d325 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -148,7 +148,7 @@ MODULE_DESCRIPTION("Intel HDA driver");
148#define ICH6_REG_OUTPAY 0x04 148#define ICH6_REG_OUTPAY 0x04
149#define ICH6_REG_INPAY 0x06 149#define ICH6_REG_INPAY 0x06
150#define ICH6_REG_GCTL 0x08 150#define ICH6_REG_GCTL 0x08
151#define ICH6_GCTL_RESET (1 << 1) /* controller reset */ 151#define ICH6_GCTL_RESET (1 << 0) /* controller reset */
152#define ICH6_GCTL_FCNTRL (1 << 1) /* flush control */ 152#define ICH6_GCTL_FCNTRL (1 << 1) /* flush control */
153#define ICH6_GCTL_UNSOL (1 << 8) /* accept unsol. response enable */ 153#define ICH6_GCTL_UNSOL (1 << 8) /* accept unsol. response enable */
154#define ICH6_REG_WAKEEN 0x0c 154#define ICH6_REG_WAKEEN 0x0c