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author | Rashika Kheria <rashika.kheria@gmail.com> | 2014-02-07 11:44:03 -0500 |
---|---|---|
committer | Takashi Iwai <tiwai@suse.de> | 2014-02-07 12:24:34 -0500 |
commit | f9367f3fbe3c620df7cedae1109743d7bfa11abe (patch) | |
tree | 1fea98cfffe3c07dd0909f7579b68ad285dcba82 /sound/pci | |
parent | 01b1dccbf74b18eff6257ee37fbcbdc1087a962c (diff) |
ALSA: lx6464es: Remove unused function in pci/lx6464es/lx_core.c
Remove unused function in pci/lx6464es/lx_core.c.
This eliminates the following warning in pci/lx6464es/lx_core.c:
sound/pci/lx6464es/lx_core.c:144:5: warning: no previous prototype for ‘lx_plx_mbox_read’ [-Wmissing-prototypes]
sound/pci/lx6464es/lx_core.c:172:5: warning: no previous prototype for ‘lx_plx_mbox_write’ [-Wmissing-prototypes]
sound/pci/lx6464es/lx_core.c:494:5: warning: no previous prototype for ‘lx_dsp_es_check_pipeline’ [-Wmissing-prototypes]
Signed-off-by: Rashika Kheria <rashika.kheria@gmail.com>
Reviewed-by: Josh Triplett <josh@joshtriplett.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'sound/pci')
-rw-r--r-- | sound/pci/lx6464es/lx_core.c | 84 |
1 files changed, 0 insertions, 84 deletions
diff --git a/sound/pci/lx6464es/lx_core.c b/sound/pci/lx6464es/lx_core.c index 626ecad4dae7..df4044d4f43d 100644 --- a/sound/pci/lx6464es/lx_core.c +++ b/sound/pci/lx6464es/lx_core.c | |||
@@ -141,63 +141,6 @@ void lx_plx_reg_write(struct lx6464es *chip, int port, u32 data) | |||
141 | iowrite32(data, address); | 141 | iowrite32(data, address); |
142 | } | 142 | } |
143 | 143 | ||
144 | u32 lx_plx_mbox_read(struct lx6464es *chip, int mbox_nr) | ||
145 | { | ||
146 | int index; | ||
147 | |||
148 | switch (mbox_nr) { | ||
149 | case 1: | ||
150 | index = ePLX_MBOX1; break; | ||
151 | case 2: | ||
152 | index = ePLX_MBOX2; break; | ||
153 | case 3: | ||
154 | index = ePLX_MBOX3; break; | ||
155 | case 4: | ||
156 | index = ePLX_MBOX4; break; | ||
157 | case 5: | ||
158 | index = ePLX_MBOX5; break; | ||
159 | case 6: | ||
160 | index = ePLX_MBOX6; break; | ||
161 | case 7: | ||
162 | index = ePLX_MBOX7; break; | ||
163 | case 0: /* reserved for HF flags */ | ||
164 | snd_BUG(); | ||
165 | default: | ||
166 | return 0xdeadbeef; | ||
167 | } | ||
168 | |||
169 | return lx_plx_reg_read(chip, index); | ||
170 | } | ||
171 | |||
172 | int lx_plx_mbox_write(struct lx6464es *chip, int mbox_nr, u32 value) | ||
173 | { | ||
174 | int index = -1; | ||
175 | |||
176 | switch (mbox_nr) { | ||
177 | case 1: | ||
178 | index = ePLX_MBOX1; break; | ||
179 | case 3: | ||
180 | index = ePLX_MBOX3; break; | ||
181 | case 4: | ||
182 | index = ePLX_MBOX4; break; | ||
183 | case 5: | ||
184 | index = ePLX_MBOX5; break; | ||
185 | case 6: | ||
186 | index = ePLX_MBOX6; break; | ||
187 | case 7: | ||
188 | index = ePLX_MBOX7; break; | ||
189 | case 0: /* reserved for HF flags */ | ||
190 | case 2: /* reserved for Pipe States | ||
191 | * the DSP keeps an image of it */ | ||
192 | snd_BUG(); | ||
193 | return -EBADRQC; | ||
194 | } | ||
195 | |||
196 | lx_plx_reg_write(chip, index, value); | ||
197 | return 0; | ||
198 | } | ||
199 | |||
200 | |||
201 | /* rmh */ | 144 | /* rmh */ |
202 | 145 | ||
203 | #ifdef CONFIG_SND_DEBUG | 146 | #ifdef CONFIG_SND_DEBUG |
@@ -491,33 +434,6 @@ int lx_dsp_read_async_events(struct lx6464es *chip, u32 *data) | |||
491 | #define CSES_BROADCAST 0x0002 | 434 | #define CSES_BROADCAST 0x0002 |
492 | #define CSES_UPDATE_LDSV 0x0004 | 435 | #define CSES_UPDATE_LDSV 0x0004 |
493 | 436 | ||
494 | int lx_dsp_es_check_pipeline(struct lx6464es *chip) | ||
495 | { | ||
496 | int i; | ||
497 | |||
498 | for (i = 0; i != CSES_TIMEOUT; ++i) { | ||
499 | /* | ||
500 | * le bit CSES_UPDATE_LDSV est à 1 dés que le macprog | ||
501 | * est pret. il re-passe à 0 lorsque le premier read a | ||
502 | * été fait. pour l'instant on retire le test car ce bit | ||
503 | * passe a 1 environ 200 à 400 ms aprés que le registre | ||
504 | * confES à été écrit (kick du xilinx ES). | ||
505 | * | ||
506 | * On ne teste que le bit CE. | ||
507 | * */ | ||
508 | |||
509 | u32 cses = lx_dsp_reg_read(chip, eReg_CSES); | ||
510 | |||
511 | if ((cses & CSES_CE) == 0) | ||
512 | return 0; | ||
513 | |||
514 | udelay(1); | ||
515 | } | ||
516 | |||
517 | return -ETIMEDOUT; | ||
518 | } | ||
519 | |||
520 | |||
521 | #define PIPE_INFO_TO_CMD(capture, pipe) \ | 437 | #define PIPE_INFO_TO_CMD(capture, pipe) \ |
522 | ((u32)((u32)(pipe) | ((capture) ? ID_IS_CAPTURE : 0L)) << ID_OFFSET) | 438 | ((u32)((u32)(pipe) | ((capture) ? ID_IS_CAPTURE : 0L)) << ID_OFFSET) |
523 | 439 | ||