diff options
author | Nishanth Aravamudan <nacc@us.ibm.com> | 2005-07-09 04:13:22 -0400 |
---|---|---|
committer | Jaroslav Kysela <perex@suse.cz> | 2005-07-28 06:22:13 -0400 |
commit | ef21ca24faf28df6d06939e77d5032a313490289 (patch) | |
tree | 1c6c719f4671b803f1288eb8cdca18587ec2eb62 /sound/pci | |
parent | 072c01194df6e4843582d09380b780987f642d6d (diff) |
[ALSA] sound/pci: fix-up sleeping paths
ENS1370/1+ driver,ES1968 driver,Intel8x0 driver,VIA82xx driver
VIA82xx-modem driver,AC97 Codec,ALI5451 driver,CS46xx driver
MIXART driver,RME HDSP driver,Trident driver,YMFPCI driver
Description: Fix-up sleeping in sound/pci. These changes fall under the
following two categories:
1) Replace schedule_timeout() with msleep() to guarantee the
task delays as expected. This also involved replacing/removing
custom sleep functions.
2) Do not assume jiffies will only increment by one if you
request a 1 jiffy sleep, i.e. use time_after/time_before in
while loops.
Signed-off-by: Nishanth Aravamudan <nacc@us.ibm.com>
Signed-off-by: Jaroslav Kysela <perex@suse.cz>
Diffstat (limited to 'sound/pci')
-rw-r--r-- | sound/pci/ac97/ac97_codec.c | 17 | ||||
-rw-r--r-- | sound/pci/ali5451/ali5451.c | 4 | ||||
-rw-r--r-- | sound/pci/cs46xx/cs46xx_lib.c | 15 | ||||
-rw-r--r-- | sound/pci/ens1370.c | 12 | ||||
-rw-r--r-- | sound/pci/es1968.c | 14 | ||||
-rw-r--r-- | sound/pci/intel8x0.c | 3 | ||||
-rw-r--r-- | sound/pci/mixart/mixart.c | 4 | ||||
-rw-r--r-- | sound/pci/rme9652/hdsp.c | 6 | ||||
-rw-r--r-- | sound/pci/trident/trident_main.c | 3 | ||||
-rw-r--r-- | sound/pci/via82xx.c | 13 | ||||
-rw-r--r-- | sound/pci/via82xx_modem.c | 13 | ||||
-rw-r--r-- | sound/pci/ymfpci/ymfpci_main.c | 6 |
12 files changed, 42 insertions, 68 deletions
diff --git a/sound/pci/ac97/ac97_codec.c b/sound/pci/ac97/ac97_codec.c index 0677d41239a9..94cd989cff20 100644 --- a/sound/pci/ac97/ac97_codec.c +++ b/sound/pci/ac97/ac97_codec.c | |||
@@ -2227,6 +2227,7 @@ void snd_ac97_restore_iec958(ac97_t *ac97) | |||
2227 | void snd_ac97_resume(ac97_t *ac97) | 2227 | void snd_ac97_resume(ac97_t *ac97) |
2228 | { | 2228 | { |
2229 | int i; | 2229 | int i; |
2230 | unsigned long end_time; | ||
2230 | 2231 | ||
2231 | if (ac97->bus->ops->reset) { | 2232 | if (ac97->bus->ops->reset) { |
2232 | ac97->bus->ops->reset(ac97); | 2233 | ac97->bus->ops->reset(ac97); |
@@ -2244,26 +2245,26 @@ void snd_ac97_resume(ac97_t *ac97) | |||
2244 | snd_ac97_write(ac97, AC97_POWERDOWN, ac97->regs[AC97_POWERDOWN]); | 2245 | snd_ac97_write(ac97, AC97_POWERDOWN, ac97->regs[AC97_POWERDOWN]); |
2245 | if (ac97_is_audio(ac97)) { | 2246 | if (ac97_is_audio(ac97)) { |
2246 | ac97->bus->ops->write(ac97, AC97_MASTER, 0x8101); | 2247 | ac97->bus->ops->write(ac97, AC97_MASTER, 0x8101); |
2247 | for (i = HZ/10; i >= 0; i--) { | 2248 | end_time = jiffies + msecs_to_jiffies(100); |
2249 | do { | ||
2248 | if (snd_ac97_read(ac97, AC97_MASTER) == 0x8101) | 2250 | if (snd_ac97_read(ac97, AC97_MASTER) == 0x8101) |
2249 | break; | 2251 | break; |
2250 | set_current_state(TASK_UNINTERRUPTIBLE); | 2252 | set_current_state(TASK_UNINTERRUPTIBLE); |
2251 | schedule_timeout(1); | 2253 | schedule_timeout(1); |
2252 | } | 2254 | } while (time_after_eq(end_time, jiffies)); |
2253 | /* FIXME: extra delay */ | 2255 | /* FIXME: extra delay */ |
2254 | ac97->bus->ops->write(ac97, AC97_MASTER, 0x8000); | 2256 | ac97->bus->ops->write(ac97, AC97_MASTER, 0x8000); |
2255 | if (snd_ac97_read(ac97, AC97_MASTER) != 0x8000) { | 2257 | if (snd_ac97_read(ac97, AC97_MASTER) != 0x8000) |
2256 | set_current_state(TASK_UNINTERRUPTIBLE); | 2258 | msleep(250); |
2257 | schedule_timeout(HZ/4); | ||
2258 | } | ||
2259 | } else { | 2259 | } else { |
2260 | for (i = HZ/10; i >= 0; i--) { | 2260 | end_time = jiffies + msecs_to_jiffies(100); |
2261 | do { | ||
2261 | unsigned short val = snd_ac97_read(ac97, AC97_EXTENDED_MID); | 2262 | unsigned short val = snd_ac97_read(ac97, AC97_EXTENDED_MID); |
2262 | if (val != 0xffff && (val & 1) != 0) | 2263 | if (val != 0xffff && (val & 1) != 0) |
2263 | break; | 2264 | break; |
2264 | set_current_state(TASK_UNINTERRUPTIBLE); | 2265 | set_current_state(TASK_UNINTERRUPTIBLE); |
2265 | schedule_timeout(1); | 2266 | schedule_timeout(1); |
2266 | } | 2267 | } while (time_after_eq(end_time, jiffies)); |
2267 | } | 2268 | } |
2268 | __reset_ready: | 2269 | __reset_ready: |
2269 | 2270 | ||
diff --git a/sound/pci/ali5451/ali5451.c b/sound/pci/ali5451/ali5451.c index eb5c36d31a52..f08ae71f902d 100644 --- a/sound/pci/ali5451/ali5451.c +++ b/sound/pci/ali5451/ali5451.c | |||
@@ -399,7 +399,7 @@ static int snd_ali_codec_ready( ali_t *codec, | |||
399 | unsigned long end_time; | 399 | unsigned long end_time; |
400 | unsigned int res; | 400 | unsigned int res; |
401 | 401 | ||
402 | end_time = jiffies + 10 * (HZ >> 2); | 402 | end_time = jiffies + 10 * msecs_to_jiffies(250); |
403 | do { | 403 | do { |
404 | res = snd_ali_5451_peek(codec,port); | 404 | res = snd_ali_5451_peek(codec,port); |
405 | if (! (res & 0x8000)) | 405 | if (! (res & 0x8000)) |
@@ -422,7 +422,7 @@ static int snd_ali_stimer_ready(ali_t *codec, int sched) | |||
422 | dwChk1 = snd_ali_5451_peek(codec, ALI_STIMER); | 422 | dwChk1 = snd_ali_5451_peek(codec, ALI_STIMER); |
423 | dwChk2 = snd_ali_5451_peek(codec, ALI_STIMER); | 423 | dwChk2 = snd_ali_5451_peek(codec, ALI_STIMER); |
424 | 424 | ||
425 | end_time = jiffies + 10 * (HZ >> 2); | 425 | end_time = jiffies + 10 * msecs_to_jiffies(250); |
426 | do { | 426 | do { |
427 | dwChk2 = snd_ali_5451_peek(codec, ALI_STIMER); | 427 | dwChk2 = snd_ali_5451_peek(codec, ALI_STIMER); |
428 | if (dwChk2 != dwChk1) | 428 | if (dwChk2 != dwChk1) |
diff --git a/sound/pci/cs46xx/cs46xx_lib.c b/sound/pci/cs46xx/cs46xx_lib.c index fd4c50c88bc9..ff28af1f658e 100644 --- a/sound/pci/cs46xx/cs46xx_lib.c +++ b/sound/pci/cs46xx/cs46xx_lib.c | |||
@@ -2400,8 +2400,7 @@ static void snd_cs46xx_codec_reset (ac97_t * ac97) | |||
2400 | if ((err = snd_ac97_read(ac97, AC97_REC_GAIN)) == 0x8a05) | 2400 | if ((err = snd_ac97_read(ac97, AC97_REC_GAIN)) == 0x8a05) |
2401 | return; | 2401 | return; |
2402 | 2402 | ||
2403 | set_current_state(TASK_UNINTERRUPTIBLE); | 2403 | msleep(10); |
2404 | schedule_timeout(HZ/100); | ||
2405 | } while (time_after_eq(end_time, jiffies)); | 2404 | } while (time_after_eq(end_time, jiffies)); |
2406 | 2405 | ||
2407 | snd_printk("CS46xx secondary codec dont respond!\n"); | 2406 | snd_printk("CS46xx secondary codec dont respond!\n"); |
@@ -2435,8 +2434,7 @@ static int __devinit cs46xx_detect_codec(cs46xx_t *chip, int codec) | |||
2435 | err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97[codec]); | 2434 | err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97[codec]); |
2436 | return err; | 2435 | return err; |
2437 | } | 2436 | } |
2438 | set_current_state(TASK_INTERRUPTIBLE); | 2437 | msleep(10); |
2439 | schedule_timeout(HZ/100); | ||
2440 | } | 2438 | } |
2441 | snd_printdd("snd_cs46xx: codec %d detection timeout\n", codec); | 2439 | snd_printdd("snd_cs46xx: codec %d detection timeout\n", codec); |
2442 | return -ENXIO; | 2440 | return -ENXIO; |
@@ -3018,8 +3016,7 @@ static int snd_cs46xx_chip_init(cs46xx_t *chip) | |||
3018 | /* | 3016 | /* |
3019 | * Wait until the PLL has stabilized. | 3017 | * Wait until the PLL has stabilized. |
3020 | */ | 3018 | */ |
3021 | set_current_state(TASK_UNINTERRUPTIBLE); | 3019 | msleep(100); |
3022 | schedule_timeout(HZ/10); /* 100ms */ | ||
3023 | 3020 | ||
3024 | /* | 3021 | /* |
3025 | * Turn on clocking of the core so that we can setup the serial ports. | 3022 | * Turn on clocking of the core so that we can setup the serial ports. |
@@ -3072,8 +3069,7 @@ static int snd_cs46xx_chip_init(cs46xx_t *chip) | |||
3072 | */ | 3069 | */ |
3073 | if (snd_cs46xx_peekBA0(chip, BA0_ACSTS) & ACSTS_CRDY) | 3070 | if (snd_cs46xx_peekBA0(chip, BA0_ACSTS) & ACSTS_CRDY) |
3074 | goto ok1; | 3071 | goto ok1; |
3075 | set_current_state(TASK_UNINTERRUPTIBLE); | 3072 | msleep(10); |
3076 | schedule_timeout((HZ+99)/100); | ||
3077 | } | 3073 | } |
3078 | 3074 | ||
3079 | 3075 | ||
@@ -3122,8 +3118,7 @@ static int snd_cs46xx_chip_init(cs46xx_t *chip) | |||
3122 | */ | 3118 | */ |
3123 | if ((snd_cs46xx_peekBA0(chip, BA0_ACISV) & (ACISV_ISV3 | ACISV_ISV4)) == (ACISV_ISV3 | ACISV_ISV4)) | 3119 | if ((snd_cs46xx_peekBA0(chip, BA0_ACISV) & (ACISV_ISV3 | ACISV_ISV4)) == (ACISV_ISV3 | ACISV_ISV4)) |
3124 | goto ok2; | 3120 | goto ok2; |
3125 | set_current_state(TASK_UNINTERRUPTIBLE); | 3121 | msleep(10); |
3126 | schedule_timeout((HZ+99)/100); | ||
3127 | } | 3122 | } |
3128 | 3123 | ||
3129 | #ifndef CONFIG_SND_CS46XX_NEW_DSP | 3124 | #ifndef CONFIG_SND_CS46XX_NEW_DSP |
diff --git a/sound/pci/ens1370.c b/sound/pci/ens1370.c index d4287338c042..78a81f3912a1 100644 --- a/sound/pci/ens1370.c +++ b/sound/pci/ens1370.c | |||
@@ -2018,21 +2018,11 @@ static int __devinit snd_ensoniq_create(snd_card_t * card, | |||
2018 | if (pci->vendor == es1371_ac97_reset_hack[idx].vid && | 2018 | if (pci->vendor == es1371_ac97_reset_hack[idx].vid && |
2019 | pci->device == es1371_ac97_reset_hack[idx].did && | 2019 | pci->device == es1371_ac97_reset_hack[idx].did && |
2020 | ensoniq->rev == es1371_ac97_reset_hack[idx].rev) { | 2020 | ensoniq->rev == es1371_ac97_reset_hack[idx].rev) { |
2021 | unsigned long tmo; | ||
2022 | signed long tmo2; | ||
2023 | |||
2024 | ensoniq->cssr |= ES_1371_ST_AC97_RST; | 2021 | ensoniq->cssr |= ES_1371_ST_AC97_RST; |
2025 | outl(ensoniq->cssr, ES_REG(ensoniq, STATUS)); | 2022 | outl(ensoniq->cssr, ES_REG(ensoniq, STATUS)); |
2026 | /* need to delay around 20ms(bleech) to give | 2023 | /* need to delay around 20ms(bleech) to give |
2027 | some CODECs enough time to wakeup */ | 2024 | some CODECs enough time to wakeup */ |
2028 | tmo = jiffies + (HZ / 50) + 1; | 2025 | msleep(20); |
2029 | while (1) { | ||
2030 | tmo2 = tmo - jiffies; | ||
2031 | if (tmo2 <= 0) | ||
2032 | break; | ||
2033 | set_current_state(TASK_UNINTERRUPTIBLE); | ||
2034 | schedule_timeout(tmo2); | ||
2035 | } | ||
2036 | break; | 2026 | break; |
2037 | } | 2027 | } |
2038 | /* AC'97 warm reset to start the bitclk */ | 2028 | /* AC'97 warm reset to start the bitclk */ |
diff --git a/sound/pci/es1968.c b/sound/pci/es1968.c index 327a341e276b..9d7a28783930 100644 --- a/sound/pci/es1968.c +++ b/sound/pci/es1968.c | |||
@@ -664,11 +664,6 @@ static inline u16 maestro_read(es1968_t *chip, u16 reg) | |||
664 | return result; | 664 | return result; |
665 | } | 665 | } |
666 | 666 | ||
667 | #define big_mdelay(msec) do {\ | ||
668 | set_current_state(TASK_UNINTERRUPTIBLE);\ | ||
669 | schedule_timeout(((msec) * HZ + 999) / 1000);\ | ||
670 | } while (0) | ||
671 | |||
672 | /* Wait for the codec bus to be free */ | 667 | /* Wait for the codec bus to be free */ |
673 | static int snd_es1968_ac97_wait(es1968_t *chip) | 668 | static int snd_es1968_ac97_wait(es1968_t *chip) |
674 | { | 669 | { |
@@ -1809,8 +1804,7 @@ static void __devinit es1968_measure_clock(es1968_t *chip) | |||
1809 | snd_es1968_trigger_apu(chip, apu, ESM_APU_16BITLINEAR); | 1804 | snd_es1968_trigger_apu(chip, apu, ESM_APU_16BITLINEAR); |
1810 | do_gettimeofday(&start_time); | 1805 | do_gettimeofday(&start_time); |
1811 | spin_unlock_irq(&chip->reg_lock); | 1806 | spin_unlock_irq(&chip->reg_lock); |
1812 | set_current_state(TASK_UNINTERRUPTIBLE); | 1807 | msleep(50); |
1813 | schedule_timeout(HZ / 20); /* 50 msec */ | ||
1814 | spin_lock_irq(&chip->reg_lock); | 1808 | spin_lock_irq(&chip->reg_lock); |
1815 | offset = __apu_get_register(chip, apu, 5); | 1809 | offset = __apu_get_register(chip, apu, 5); |
1816 | do_gettimeofday(&stop_time); | 1810 | do_gettimeofday(&stop_time); |
@@ -2093,7 +2087,7 @@ static void snd_es1968_ac97_reset(es1968_t *chip) | |||
2093 | outw(0x0000, ioaddr + 0x60); /* write 0 to gpio 0 */ | 2087 | outw(0x0000, ioaddr + 0x60); /* write 0 to gpio 0 */ |
2094 | udelay(20); | 2088 | udelay(20); |
2095 | outw(0x0001, ioaddr + 0x60); /* write 1 to gpio 1 */ | 2089 | outw(0x0001, ioaddr + 0x60); /* write 1 to gpio 1 */ |
2096 | big_mdelay(20); | 2090 | msleep(20); |
2097 | 2091 | ||
2098 | outw(save_68 | 0x1, ioaddr + 0x68); /* now restore .. */ | 2092 | outw(save_68 | 0x1, ioaddr + 0x68); /* now restore .. */ |
2099 | outw((inw(ioaddr + 0x38) & 0xfffc) | 0x1, ioaddr + 0x38); | 2093 | outw((inw(ioaddr + 0x38) & 0xfffc) | 0x1, ioaddr + 0x38); |
@@ -2109,7 +2103,7 @@ static void snd_es1968_ac97_reset(es1968_t *chip) | |||
2109 | outw(0x0001, ioaddr + 0x60); /* write 1 to gpio */ | 2103 | outw(0x0001, ioaddr + 0x60); /* write 1 to gpio */ |
2110 | udelay(20); | 2104 | udelay(20); |
2111 | outw(0x0009, ioaddr + 0x60); /* write 9 to gpio */ | 2105 | outw(0x0009, ioaddr + 0x60); /* write 9 to gpio */ |
2112 | big_mdelay(500); | 2106 | msleep(500); |
2113 | //outw(inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38); | 2107 | //outw(inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38); |
2114 | outw(inw(ioaddr + 0x3a) & 0xfffc, ioaddr + 0x3a); | 2108 | outw(inw(ioaddr + 0x3a) & 0xfffc, ioaddr + 0x3a); |
2115 | outw(inw(ioaddr + 0x3c) & 0xfffc, ioaddr + 0x3c); | 2109 | outw(inw(ioaddr + 0x3c) & 0xfffc, ioaddr + 0x3c); |
@@ -2135,7 +2129,7 @@ static void snd_es1968_ac97_reset(es1968_t *chip) | |||
2135 | 2129 | ||
2136 | if (w > 10000) { | 2130 | if (w > 10000) { |
2137 | outb(inb(ioaddr + 0x37) | 0x08, ioaddr + 0x37); /* do a software reset */ | 2131 | outb(inb(ioaddr + 0x37) | 0x08, ioaddr + 0x37); /* do a software reset */ |
2138 | big_mdelay(500); /* oh my.. */ | 2132 | msleep(500); /* oh my.. */ |
2139 | outb(inb(ioaddr + 0x37) & ~0x08, | 2133 | outb(inb(ioaddr + 0x37) & ~0x08, |
2140 | ioaddr + 0x37); | 2134 | ioaddr + 0x37); |
2141 | udelay(1); | 2135 | udelay(1); |
diff --git a/sound/pci/intel8x0.c b/sound/pci/intel8x0.c index c3c3b68b4540..7c806bd9cc90 100644 --- a/sound/pci/intel8x0.c +++ b/sound/pci/intel8x0.c | |||
@@ -2464,8 +2464,7 @@ static void __devinit intel8x0_measure_ac97_clock(intel8x0_t *chip) | |||
2464 | } | 2464 | } |
2465 | do_gettimeofday(&start_time); | 2465 | do_gettimeofday(&start_time); |
2466 | spin_unlock_irq(&chip->reg_lock); | 2466 | spin_unlock_irq(&chip->reg_lock); |
2467 | set_current_state(TASK_UNINTERRUPTIBLE); | 2467 | msleep(50); |
2468 | schedule_timeout(HZ / 20); | ||
2469 | spin_lock_irq(&chip->reg_lock); | 2468 | spin_lock_irq(&chip->reg_lock); |
2470 | /* check the position */ | 2469 | /* check the position */ |
2471 | pos = ichdev->fragsize1; | 2470 | pos = ichdev->fragsize1; |
diff --git a/sound/pci/mixart/mixart.c b/sound/pci/mixart/mixart.c index 082c0d0f73d2..6c868d913634 100644 --- a/sound/pci/mixart/mixart.c +++ b/sound/pci/mixart/mixart.c | |||
@@ -445,9 +445,9 @@ static int snd_mixart_trigger(snd_pcm_substream_t *subs, int cmd) | |||
445 | 445 | ||
446 | static int mixart_sync_nonblock_events(mixart_mgr_t *mgr) | 446 | static int mixart_sync_nonblock_events(mixart_mgr_t *mgr) |
447 | { | 447 | { |
448 | int timeout = HZ; | 448 | unsigned long timeout = jiffies + HZ; |
449 | while (atomic_read(&mgr->msg_processed) > 0) { | 449 | while (atomic_read(&mgr->msg_processed) > 0) { |
450 | if (! timeout--) { | 450 | if (time_after(jiffies, timeout)) { |
451 | snd_printk(KERN_ERR "mixart: cannot process nonblock events!\n"); | 451 | snd_printk(KERN_ERR "mixart: cannot process nonblock events!\n"); |
452 | return -EBUSY; | 452 | return -EBUSY; |
453 | } | 453 | } |
diff --git a/sound/pci/rme9652/hdsp.c b/sound/pci/rme9652/hdsp.c index 0db558a92871..796621de5009 100644 --- a/sound/pci/rme9652/hdsp.c +++ b/sound/pci/rme9652/hdsp.c | |||
@@ -679,8 +679,7 @@ static int snd_hdsp_load_firmware_from_cache(hdsp_t *hdsp) { | |||
679 | } | 679 | } |
680 | 680 | ||
681 | if ((1000 / HZ) < 3000) { | 681 | if ((1000 / HZ) < 3000) { |
682 | set_current_state(TASK_UNINTERRUPTIBLE); | 682 | ssleep(3); |
683 | schedule_timeout((3000 * HZ + 999) / 1000); | ||
684 | } else { | 683 | } else { |
685 | mdelay(3000); | 684 | mdelay(3000); |
686 | } | 685 | } |
@@ -5080,8 +5079,7 @@ static int __devinit snd_hdsp_create(snd_card_t *card, | |||
5080 | if (!is_9652 && !is_9632) { | 5079 | if (!is_9652 && !is_9632) { |
5081 | /* we wait 2 seconds to let freshly inserted cardbus cards do their hardware init */ | 5080 | /* we wait 2 seconds to let freshly inserted cardbus cards do their hardware init */ |
5082 | if ((1000 / HZ) < 2000) { | 5081 | if ((1000 / HZ) < 2000) { |
5083 | set_current_state(TASK_UNINTERRUPTIBLE); | 5082 | ssleep(2); |
5084 | schedule_timeout((2000 * HZ + 999) / 1000); | ||
5085 | } else { | 5083 | } else { |
5086 | mdelay(2000); | 5084 | mdelay(2000); |
5087 | } | 5085 | } |
diff --git a/sound/pci/trident/trident_main.c b/sound/pci/trident/trident_main.c index b01c91bb5f6a..29d89bfba0a4 100644 --- a/sound/pci/trident/trident_main.c +++ b/sound/pci/trident/trident_main.c | |||
@@ -3153,8 +3153,7 @@ static int snd_trident_gameport_open(struct gameport *gameport, int mode) | |||
3153 | switch (mode) { | 3153 | switch (mode) { |
3154 | case GAMEPORT_MODE_COOKED: | 3154 | case GAMEPORT_MODE_COOKED: |
3155 | outb(GAMEPORT_MODE_ADC, TRID_REG(chip, GAMEPORT_GCR)); | 3155 | outb(GAMEPORT_MODE_ADC, TRID_REG(chip, GAMEPORT_GCR)); |
3156 | set_current_state(TASK_UNINTERRUPTIBLE); | 3156 | msleep(20); |
3157 | schedule_timeout(1 + 20 * HZ / 1000); /* 20msec */ | ||
3158 | return 0; | 3157 | return 0; |
3159 | case GAMEPORT_MODE_RAW: | 3158 | case GAMEPORT_MODE_RAW: |
3160 | outb(0, TRID_REG(chip, GAMEPORT_GCR)); | 3159 | outb(0, TRID_REG(chip, GAMEPORT_GCR)); |
diff --git a/sound/pci/via82xx.c b/sound/pci/via82xx.c index 064972b14d00..890582ce874d 100644 --- a/sound/pci/via82xx.c +++ b/sound/pci/via82xx.c | |||
@@ -547,8 +547,7 @@ static void snd_via82xx_codec_wait(ac97_t *ac97) | |||
547 | int err; | 547 | int err; |
548 | err = snd_via82xx_codec_ready(chip, ac97->num); | 548 | err = snd_via82xx_codec_ready(chip, ac97->num); |
549 | /* here we need to wait fairly for long time.. */ | 549 | /* here we need to wait fairly for long time.. */ |
550 | set_current_state(TASK_UNINTERRUPTIBLE); | 550 | msleep(500); |
551 | schedule_timeout(HZ/2); | ||
552 | } | 551 | } |
553 | 552 | ||
554 | static void snd_via82xx_codec_write(ac97_t *ac97, | 553 | static void snd_via82xx_codec_write(ac97_t *ac97, |
@@ -1847,7 +1846,7 @@ static void __devinit snd_via82xx_proc_init(via82xx_t *chip) | |||
1847 | static int snd_via82xx_chip_init(via82xx_t *chip) | 1846 | static int snd_via82xx_chip_init(via82xx_t *chip) |
1848 | { | 1847 | { |
1849 | unsigned int val; | 1848 | unsigned int val; |
1850 | int max_count; | 1849 | unsigned long end_time; |
1851 | unsigned char pval; | 1850 | unsigned char pval; |
1852 | 1851 | ||
1853 | #if 0 /* broken on K7M? */ | 1852 | #if 0 /* broken on K7M? */ |
@@ -1889,14 +1888,14 @@ static int snd_via82xx_chip_init(via82xx_t *chip) | |||
1889 | } | 1888 | } |
1890 | 1889 | ||
1891 | /* wait until codec ready */ | 1890 | /* wait until codec ready */ |
1892 | max_count = ((3 * HZ) / 4) + 1; | 1891 | end_time = jiffies + msecs_to_jiffies(750); |
1893 | do { | 1892 | do { |
1894 | pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval); | 1893 | pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval); |
1895 | if (pval & VIA_ACLINK_C00_READY) /* primary codec ready */ | 1894 | if (pval & VIA_ACLINK_C00_READY) /* primary codec ready */ |
1896 | break; | 1895 | break; |
1897 | set_current_state(TASK_UNINTERRUPTIBLE); | 1896 | set_current_state(TASK_UNINTERRUPTIBLE); |
1898 | schedule_timeout(1); | 1897 | schedule_timeout(1); |
1899 | } while (--max_count > 0); | 1898 | } while (time_before(jiffies, end_time)); |
1900 | 1899 | ||
1901 | if ((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_BUSY) | 1900 | if ((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_BUSY) |
1902 | snd_printk("AC'97 codec is not ready [0x%x]\n", val); | 1901 | snd_printk("AC'97 codec is not ready [0x%x]\n", val); |
@@ -1905,7 +1904,7 @@ static int snd_via82xx_chip_init(via82xx_t *chip) | |||
1905 | snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ | | 1904 | snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ | |
1906 | VIA_REG_AC97_SECONDARY_VALID | | 1905 | VIA_REG_AC97_SECONDARY_VALID | |
1907 | (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT)); | 1906 | (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT)); |
1908 | max_count = ((3 * HZ) / 4) + 1; | 1907 | end_time = jiffies + msecs_to_jiffies(750); |
1909 | snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ | | 1908 | snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ | |
1910 | VIA_REG_AC97_SECONDARY_VALID | | 1909 | VIA_REG_AC97_SECONDARY_VALID | |
1911 | (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT)); | 1910 | (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT)); |
@@ -1916,7 +1915,7 @@ static int snd_via82xx_chip_init(via82xx_t *chip) | |||
1916 | } | 1915 | } |
1917 | set_current_state(TASK_INTERRUPTIBLE); | 1916 | set_current_state(TASK_INTERRUPTIBLE); |
1918 | schedule_timeout(1); | 1917 | schedule_timeout(1); |
1919 | } while (--max_count > 0); | 1918 | } while (time_before(jiffies, end_time)); |
1920 | /* This is ok, the most of motherboards have only one codec */ | 1919 | /* This is ok, the most of motherboards have only one codec */ |
1921 | 1920 | ||
1922 | __ac97_ok2: | 1921 | __ac97_ok2: |
diff --git a/sound/pci/via82xx_modem.c b/sound/pci/via82xx_modem.c index 5896d289f9ac..4a9779cc9733 100644 --- a/sound/pci/via82xx_modem.c +++ b/sound/pci/via82xx_modem.c | |||
@@ -408,8 +408,7 @@ static void snd_via82xx_codec_wait(ac97_t *ac97) | |||
408 | int err; | 408 | int err; |
409 | err = snd_via82xx_codec_ready(chip, ac97->num); | 409 | err = snd_via82xx_codec_ready(chip, ac97->num); |
410 | /* here we need to wait fairly for long time.. */ | 410 | /* here we need to wait fairly for long time.. */ |
411 | set_current_state(TASK_UNINTERRUPTIBLE); | 411 | msleep(500); |
412 | schedule_timeout(HZ/2); | ||
413 | } | 412 | } |
414 | 413 | ||
415 | static void snd_via82xx_codec_write(ac97_t *ac97, | 414 | static void snd_via82xx_codec_write(ac97_t *ac97, |
@@ -923,7 +922,7 @@ static void __devinit snd_via82xx_proc_init(via82xx_t *chip) | |||
923 | static int snd_via82xx_chip_init(via82xx_t *chip) | 922 | static int snd_via82xx_chip_init(via82xx_t *chip) |
924 | { | 923 | { |
925 | unsigned int val; | 924 | unsigned int val; |
926 | int max_count; | 925 | unsigned long end_time; |
927 | unsigned char pval; | 926 | unsigned char pval; |
928 | 927 | ||
929 | pci_read_config_byte(chip->pci, VIA_MC97_CTRL, &pval); | 928 | pci_read_config_byte(chip->pci, VIA_MC97_CTRL, &pval); |
@@ -962,14 +961,14 @@ static int snd_via82xx_chip_init(via82xx_t *chip) | |||
962 | } | 961 | } |
963 | 962 | ||
964 | /* wait until codec ready */ | 963 | /* wait until codec ready */ |
965 | max_count = ((3 * HZ) / 4) + 1; | 964 | end_time = jiffies + msecs_to_jiffies(750); |
966 | do { | 965 | do { |
967 | pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval); | 966 | pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval); |
968 | if (pval & VIA_ACLINK_C00_READY) /* primary codec ready */ | 967 | if (pval & VIA_ACLINK_C00_READY) /* primary codec ready */ |
969 | break; | 968 | break; |
970 | set_current_state(TASK_UNINTERRUPTIBLE); | 969 | set_current_state(TASK_UNINTERRUPTIBLE); |
971 | schedule_timeout(1); | 970 | schedule_timeout(1); |
972 | } while (--max_count > 0); | 971 | } while (time_before(jiffies, end_time)); |
973 | 972 | ||
974 | if ((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_BUSY) | 973 | if ((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_BUSY) |
975 | snd_printk("AC'97 codec is not ready [0x%x]\n", val); | 974 | snd_printk("AC'97 codec is not ready [0x%x]\n", val); |
@@ -977,7 +976,7 @@ static int snd_via82xx_chip_init(via82xx_t *chip) | |||
977 | snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ | | 976 | snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ | |
978 | VIA_REG_AC97_SECONDARY_VALID | | 977 | VIA_REG_AC97_SECONDARY_VALID | |
979 | (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT)); | 978 | (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT)); |
980 | max_count = ((3 * HZ) / 4) + 1; | 979 | end_time = jiffies + msecs_to_jiffies(750); |
981 | snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ | | 980 | snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ | |
982 | VIA_REG_AC97_SECONDARY_VALID | | 981 | VIA_REG_AC97_SECONDARY_VALID | |
983 | (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT)); | 982 | (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT)); |
@@ -988,7 +987,7 @@ static int snd_via82xx_chip_init(via82xx_t *chip) | |||
988 | } | 987 | } |
989 | set_current_state(TASK_INTERRUPTIBLE); | 988 | set_current_state(TASK_INTERRUPTIBLE); |
990 | schedule_timeout(1); | 989 | schedule_timeout(1); |
991 | } while (--max_count > 0); | 990 | } while (time_before(jiffies, end_time)); |
992 | /* This is ok, the most of motherboards have only one codec */ | 991 | /* This is ok, the most of motherboards have only one codec */ |
993 | 992 | ||
994 | __ac97_ok2: | 993 | __ac97_ok2: |
diff --git a/sound/pci/ymfpci/ymfpci_main.c b/sound/pci/ymfpci/ymfpci_main.c index 2ae79610ecb5..d54f88a1b525 100644 --- a/sound/pci/ymfpci/ymfpci_main.c +++ b/sound/pci/ymfpci/ymfpci_main.c | |||
@@ -84,16 +84,16 @@ static inline void snd_ymfpci_writel(ymfpci_t *chip, u32 offset, u32 val) | |||
84 | 84 | ||
85 | static int snd_ymfpci_codec_ready(ymfpci_t *chip, int secondary) | 85 | static int snd_ymfpci_codec_ready(ymfpci_t *chip, int secondary) |
86 | { | 86 | { |
87 | signed long end_time; | 87 | unsigned long end_time; |
88 | u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR; | 88 | u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR; |
89 | 89 | ||
90 | end_time = (jiffies + ((3 * HZ) / 4)) + 1; | 90 | end_time = jiffies + msecs_to_jiffies(750); |
91 | do { | 91 | do { |
92 | if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0) | 92 | if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0) |
93 | return 0; | 93 | return 0; |
94 | set_current_state(TASK_UNINTERRUPTIBLE); | 94 | set_current_state(TASK_UNINTERRUPTIBLE); |
95 | schedule_timeout(1); | 95 | schedule_timeout(1); |
96 | } while (end_time - (signed long)jiffies >= 0); | 96 | } while (time_before(jiffies, end_time)); |
97 | snd_printk("codec_ready: codec %i is not ready [0x%x]\n", secondary, snd_ymfpci_readw(chip, reg)); | 97 | snd_printk("codec_ready: codec %i is not ready [0x%x]\n", secondary, snd_ymfpci_readw(chip, reg)); |
98 | return -EBUSY; | 98 | return -EBUSY; |
99 | } | 99 | } |