diff options
author | Tobin Davis <tdavis@dsl-only.net> | 2006-09-01 15:03:12 -0400 |
---|---|---|
committer | Jaroslav Kysela <perex@suse.cz> | 2006-09-23 04:45:43 -0400 |
commit | 93ed150375187ae7917ed1e3b9b830b9d4065bad (patch) | |
tree | 1b33472374a20512bec7cb22733229ae5b88a8fc /sound/pci | |
parent | 35a49934a7180fd80fb0bb3777d125dd939df50e (diff) |
[ALSA] hda-codec - Add 5 stack audio support for Intel 965 systems
This patch renames the 965_2112 function ids to 965_3ST, and
adds functional support for 965_5ST (5 stack 7.1 surround).
Signed-off-by: Tobin Davis <tdavis@dsl-only.net>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Jaroslav Kysela <perex@suse.cz>
Diffstat (limited to 'sound/pci')
-rw-r--r-- | sound/pci/hda/patch_sigmatel.c | 152 |
1 files changed, 81 insertions, 71 deletions
diff --git a/sound/pci/hda/patch_sigmatel.c b/sound/pci/hda/patch_sigmatel.c index 8d5ad7c0db07..87169032be1f 100644 --- a/sound/pci/hda/patch_sigmatel.c +++ b/sound/pci/hda/patch_sigmatel.c | |||
@@ -42,9 +42,10 @@ | |||
42 | #define STAC_D945GTP3 1 | 42 | #define STAC_D945GTP3 1 |
43 | #define STAC_D945GTP5 2 | 43 | #define STAC_D945GTP5 2 |
44 | #define STAC_MACMINI 3 | 44 | #define STAC_MACMINI 3 |
45 | #define STAC_D965_2112 4 | 45 | #define STAC_922X_MODELS 4 /* number of 922x models */ |
46 | #define STAC_D965_284B 5 | 46 | #define STAC_D965_3ST 4 |
47 | #define STAC_922X_MODELS 6 /* number of 922x models */ | 47 | #define STAC_D965_5ST 5 |
48 | #define STAC_927X_MODELS 6 /* number of 922x models */ | ||
48 | 49 | ||
49 | struct sigmatel_spec { | 50 | struct sigmatel_spec { |
50 | struct snd_kcontrol_new *mixers[4]; | 51 | struct snd_kcontrol_new *mixers[4]; |
@@ -111,24 +112,10 @@ static hda_nid_t stac922x_adc_nids[2] = { | |||
111 | 0x06, 0x07, | 112 | 0x06, 0x07, |
112 | }; | 113 | }; |
113 | 114 | ||
114 | static hda_nid_t stac9227_adc_nids[2] = { | ||
115 | 0x07, 0x08, | ||
116 | }; | ||
117 | |||
118 | #if 0 | ||
119 | static hda_nid_t d965_2112_dac_nids[3] = { | ||
120 | 0x02, 0x03, 0x05, | ||
121 | }; | ||
122 | #endif | ||
123 | |||
124 | static hda_nid_t stac922x_mux_nids[2] = { | 115 | static hda_nid_t stac922x_mux_nids[2] = { |
125 | 0x12, 0x13, | 116 | 0x12, 0x13, |
126 | }; | 117 | }; |
127 | 118 | ||
128 | static hda_nid_t stac9227_mux_nids[2] = { | ||
129 | 0x15, 0x16, | ||
130 | }; | ||
131 | |||
132 | static hda_nid_t stac927x_adc_nids[3] = { | 119 | static hda_nid_t stac927x_adc_nids[3] = { |
133 | 0x07, 0x08, 0x09 | 120 | 0x07, 0x08, 0x09 |
134 | }; | 121 | }; |
@@ -146,7 +133,8 @@ static hda_nid_t stac9205_mux_nids[2] = { | |||
146 | }; | 133 | }; |
147 | 134 | ||
148 | static hda_nid_t stac9200_pin_nids[8] = { | 135 | static hda_nid_t stac9200_pin_nids[8] = { |
149 | 0x08, 0x09, 0x0d, 0x0e, 0x0f, 0x10, 0x11, 0x12, | 136 | 0x08, 0x09, 0x0d, 0x0e, |
137 | 0x0f, 0x10, 0x11, 0x12, | ||
150 | }; | 138 | }; |
151 | 139 | ||
152 | static hda_nid_t stac922x_pin_nids[10] = { | 140 | static hda_nid_t stac922x_pin_nids[10] = { |
@@ -206,17 +194,9 @@ static struct hda_verb stac922x_core_init[] = { | |||
206 | {} | 194 | {} |
207 | }; | 195 | }; |
208 | 196 | ||
209 | static struct hda_verb stac9227_core_init[] = { | 197 | static struct hda_verb d965_core_init[] = { |
210 | /* set master volume and direct control */ | ||
211 | { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, | ||
212 | /* unmute node 0x1b */ | ||
213 | { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000}, | ||
214 | {} | ||
215 | }; | ||
216 | |||
217 | static struct hda_verb d965_2112_core_init[] = { | ||
218 | /* set master volume and direct control */ | 198 | /* set master volume and direct control */ |
219 | { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, | 199 | { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, |
220 | /* unmute node 0x1b */ | 200 | /* unmute node 0x1b */ |
221 | { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000}, | 201 | { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000}, |
222 | /* select node 0x03 as DAC */ | 202 | /* select node 0x03 as DAC */ |
@@ -386,6 +366,8 @@ static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = { | |||
386 | }; | 366 | }; |
387 | 367 | ||
388 | static struct hda_board_config stac922x_cfg_tbl[] = { | 368 | static struct hda_board_config stac922x_cfg_tbl[] = { |
369 | { .modelname = "5stack", .config = STAC_D945GTP5 }, | ||
370 | { .modelname = "3stack", .config = STAC_D945GTP3 }, | ||
389 | { .modelname = "ref", | 371 | { .modelname = "ref", |
390 | .pci_subvendor = PCI_VENDOR_ID_INTEL, | 372 | .pci_subvendor = PCI_VENDOR_ID_INTEL, |
391 | .pci_subdevice = 0x2668, /* DFI LanParty */ | 373 | .pci_subdevice = 0x2668, /* DFI LanParty */ |
@@ -471,99 +453,127 @@ static struct hda_board_config stac922x_cfg_tbl[] = { | |||
471 | { .pci_subvendor = 0x8384, | 453 | { .pci_subvendor = 0x8384, |
472 | .pci_subdevice = 0x7680, | 454 | .pci_subdevice = 0x7680, |
473 | .config = STAC_MACMINI }, /* Apple Mac Mini (early 2006) */ | 455 | .config = STAC_MACMINI }, /* Apple Mac Mini (early 2006) */ |
474 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, | ||
475 | .pci_subdevice = 0x2112, | ||
476 | .config = STAC_D965_2112 }, | ||
477 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, | ||
478 | .pci_subdevice = 0x284b, | ||
479 | .config = STAC_D965_284B }, | ||
480 | {} /* terminator */ | 456 | {} /* terminator */ |
481 | }; | 457 | }; |
482 | 458 | ||
483 | static unsigned int ref927x_pin_configs[14] = { | 459 | static unsigned int ref927x_pin_configs[14] = { |
484 | 0x01813122, 0x01a19021, 0x01014010, 0x01016011, | 460 | 0x02214020, 0x02a19080, 0x0181304e, 0x01014010, |
485 | 0x01012012, 0x01011014, 0x40000100, 0x40000100, | 461 | 0x01a19040, 0x01011012, 0x01016011, 0x0101201f, |
486 | 0x40000100, 0x40000100, 0x40000100, 0x01441030, | 462 | 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070, |
487 | 0x01c41030, 0x40000100, | 463 | 0x01c42190, 0x40000100, |
488 | }; | 464 | }; |
489 | 465 | ||
490 | static unsigned int d965_2112_pin_configs[14] = { | 466 | static unsigned int d965_3st_pin_configs[14] = { |
491 | 0x0221401f, 0x02a19120, 0x40000100, 0x01014011, | 467 | 0x0221401f, 0x02a19120, 0x40000100, 0x01014011, |
492 | 0x01a19021, 0x01813024, 0x40000100, 0x40000100, | 468 | 0x01a19021, 0x01813024, 0x40000100, 0x40000100, |
493 | 0x40000100, 0x40000100, 0x40000100, 0x40000100, | 469 | 0x40000100, 0x40000100, 0x40000100, 0x40000100, |
494 | 0x40000100, 0x40000100 | 470 | 0x40000100, 0x40000100 |
495 | }; | 471 | }; |
496 | 472 | ||
497 | static unsigned int *stac927x_brd_tbl[] = { | 473 | static unsigned int d965_5st_pin_configs[14] = { |
474 | 0x02214020, 0x02a19080, 0x0181304e, 0x01014010, | ||
475 | 0x01a19040, 0x01011012, 0x01016011, 0x40000100, | ||
476 | 0x40000100, 0x40000100, 0x40000100, 0x01442070, | ||
477 | 0x40000100, 0x40000100 | ||
478 | }; | ||
479 | |||
480 | static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = { | ||
498 | [STAC_REF] = ref927x_pin_configs, | 481 | [STAC_REF] = ref927x_pin_configs, |
499 | [STAC_D965_2112] = d965_2112_pin_configs, | 482 | [STAC_D965_3ST] = d965_3st_pin_configs, |
483 | [STAC_D965_5ST] = d965_5st_pin_configs, | ||
500 | }; | 484 | }; |
501 | 485 | ||
502 | static struct hda_board_config stac927x_cfg_tbl[] = { | 486 | static struct hda_board_config stac927x_cfg_tbl[] = { |
487 | { .modelname = "5stack", .config = STAC_D965_5ST }, | ||
488 | { .modelname = "3stack", .config = STAC_D965_3ST }, | ||
503 | { .modelname = "ref", | 489 | { .modelname = "ref", |
504 | .pci_subvendor = PCI_VENDOR_ID_INTEL, | 490 | .pci_subvendor = PCI_VENDOR_ID_INTEL, |
505 | .pci_subdevice = 0x2668, /* DFI LanParty */ | 491 | .pci_subdevice = 0x2668, /* DFI LanParty */ |
506 | .config = STAC_REF }, /* SigmaTel reference board */ | 492 | .config = STAC_REF }, /* SigmaTel reference board */ |
507 | /* SigmaTel 9227 reference board */ | ||
508 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, | ||
509 | .pci_subdevice = 0x284b, | ||
510 | .config = STAC_D965_284B }, | ||
511 | /* Intel 946 based systems */ | 493 | /* Intel 946 based systems */ |
512 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, | 494 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, |
513 | .pci_subdevice = 0x3d01, | 495 | .pci_subdevice = 0x3d01, |
514 | .config = STAC_D965_2112 }, /* D946 configuration */ | 496 | .config = STAC_D965_3ST }, /* D946 configuration */ |
515 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, | 497 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, |
516 | .pci_subdevice = 0xa301, | 498 | .pci_subdevice = 0xa301, |
517 | .config = STAC_D965_2112 }, /* Intel D946GZT - 3 stack */ | 499 | .config = STAC_D965_3ST }, /* Intel D946GZT - 3 stack */ |
518 | /* 965 based systems */ | 500 | /* 965 based 3 stack systems */ |
519 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, | 501 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, |
520 | .pci_subdevice = 0x2116, | 502 | .pci_subdevice = 0x2116, |
521 | .config = STAC_D965_2112 }, /* Intel D965 3Stack config */ | 503 | .config = STAC_D965_3ST }, /* Intel D965 3Stack config */ |
522 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, | 504 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, |
523 | .pci_subdevice = 0x2115, | 505 | .pci_subdevice = 0x2115, |
524 | .config = STAC_D965_2112 }, /* Intel DQ965WC - 3 Stack */ | 506 | .config = STAC_D965_3ST }, /* Intel DQ965WC - 3 Stack */ |
525 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, | 507 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, |
526 | .pci_subdevice = 0x2114, | 508 | .pci_subdevice = 0x2114, |
527 | .config = STAC_D965_2112 }, /* Intel D965 3Stack config */ | 509 | .config = STAC_D965_3ST }, /* Intel D965 3Stack config */ |
528 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, | 510 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, |
529 | .pci_subdevice = 0x2113, | 511 | .pci_subdevice = 0x2113, |
530 | .config = STAC_D965_2112 }, /* Intel D965 3Stack config */ | 512 | .config = STAC_D965_3ST }, /* Intel D965 3Stack config */ |
531 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, | 513 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, |
532 | .pci_subdevice = 0x2112, | 514 | .pci_subdevice = 0x2112, |
533 | .config = STAC_D965_2112 }, /* Intel DG965MS - 3 Stack */ | 515 | .config = STAC_D965_3ST }, /* Intel DG965MS - 3 Stack */ |
534 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, | 516 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, |
535 | .pci_subdevice = 0x2111, | 517 | .pci_subdevice = 0x2111, |
536 | .config = STAC_D965_2112 }, /* Intel D965 3Stack config */ | 518 | .config = STAC_D965_3ST }, /* Intel D965 3Stack config */ |
537 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, | 519 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, |
538 | .pci_subdevice = 0x2110, | 520 | .pci_subdevice = 0x2110, |
539 | .config = STAC_D965_2112 }, /* Intel D965 3Stack config */ | 521 | .config = STAC_D965_3ST }, /* Intel D965 3Stack config */ |
540 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, | 522 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, |
541 | .pci_subdevice = 0x2009, | 523 | .pci_subdevice = 0x2009, |
542 | .config = STAC_D965_2112 }, /* Intel D965 3Stack config */ | 524 | .config = STAC_D965_3ST }, /* Intel D965 3Stack config */ |
543 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, | 525 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, |
544 | .pci_subdevice = 0x2008, | 526 | .pci_subdevice = 0x2008, |
545 | .config = STAC_D965_2112 }, /* Intel DQ965GF - 3 Stack */ | 527 | .config = STAC_D965_3ST }, /* Intel DQ965GF - 3 Stack */ |
546 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, | 528 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, |
547 | .pci_subdevice = 0x2007, | 529 | .pci_subdevice = 0x2007, |
548 | .config = STAC_D965_2112 }, /* Intel D965 3Stack config */ | 530 | .config = STAC_D965_3ST }, /* Intel D965 3Stack config */ |
549 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, | 531 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, |
550 | .pci_subdevice = 0x2006, | 532 | .pci_subdevice = 0x2006, |
551 | .config = STAC_D965_2112 }, /* Intel D965 3Stack config */ | 533 | .config = STAC_D965_3ST }, /* Intel D965 3Stack config */ |
552 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, | 534 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, |
553 | .pci_subdevice = 0x2005, | 535 | .pci_subdevice = 0x2005, |
554 | .config = STAC_D965_2112 }, /* Intel D965 3Stack config */ | 536 | .config = STAC_D965_3ST }, /* Intel D965 3Stack config */ |
555 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, | 537 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, |
556 | .pci_subdevice = 0x2004, | 538 | .pci_subdevice = 0x2004, |
557 | .config = STAC_D965_2112 }, /* Intel D965 3Stack config */ | 539 | .config = STAC_D965_3ST }, /* Intel D965 3Stack config */ |
558 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, | 540 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, |
559 | .pci_subdevice = 0x2003, | 541 | .pci_subdevice = 0x2003, |
560 | .config = STAC_D965_2112 }, /* Intel D965 3Stack config */ | 542 | .config = STAC_D965_3ST }, /* Intel D965 3Stack config */ |
561 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, | 543 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, |
562 | .pci_subdevice = 0x2002, | 544 | .pci_subdevice = 0x2002, |
563 | .config = STAC_D965_2112 }, /* Intel D965 3Stack config */ | 545 | .config = STAC_D965_3ST }, /* Intel D965 3Stack config */ |
564 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, | 546 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, |
565 | .pci_subdevice = 0x2001, | 547 | .pci_subdevice = 0x2001, |
566 | .config = STAC_D965_2112 }, /* Intel DQ965GF - 3 Stackg */ | 548 | .config = STAC_D965_3ST }, /* Intel DQ965GF - 3 Stack */ |
549 | /* 965 based 5 stack systems */ | ||
550 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, | ||
551 | .pci_subdevice = 0x2301, | ||
552 | .config = STAC_D965_5ST }, /* Intel DG965 - 5 Stack */ | ||
553 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, | ||
554 | .pci_subdevice = 0x2302, | ||
555 | .config = STAC_D965_5ST }, /* Intel DG965 - 5 Stack */ | ||
556 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, | ||
557 | .pci_subdevice = 0x2303, | ||
558 | .config = STAC_D965_5ST }, /* Intel DG965 - 5 Stack */ | ||
559 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, | ||
560 | .pci_subdevice = 0x2304, | ||
561 | .config = STAC_D965_5ST }, /* Intel DG965 - 5 Stack */ | ||
562 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, | ||
563 | .pci_subdevice = 0x2305, | ||
564 | .config = STAC_D965_5ST }, /* Intel DG965 - 5 Stack */ | ||
565 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, | ||
566 | .pci_subdevice = 0x2501, | ||
567 | .config = STAC_D965_5ST }, /* Intel DG965MQ - 5 Stack */ | ||
568 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, | ||
569 | .pci_subdevice = 0x2502, | ||
570 | .config = STAC_D965_5ST }, /* Intel DG965 - 5 Stack */ | ||
571 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, | ||
572 | .pci_subdevice = 0x2503, | ||
573 | .config = STAC_D965_5ST }, /* Intel DG965 - 5 Stack */ | ||
574 | { .pci_subvendor = PCI_VENDOR_ID_INTEL, | ||
575 | .pci_subdevice = 0x2504, | ||
576 | .config = STAC_D965_5ST }, /* Intel DQ965GF - 5 Stack */ | ||
567 | {} /* terminator */ | 577 | {} /* terminator */ |
568 | }; | 578 | }; |
569 | 579 | ||
@@ -1546,18 +1556,18 @@ static int patch_stac927x(struct hda_codec *codec) | |||
1546 | } | 1556 | } |
1547 | 1557 | ||
1548 | switch (spec->board_config) { | 1558 | switch (spec->board_config) { |
1549 | case STAC_D965_2112: | 1559 | case STAC_D965_3ST: |
1550 | spec->adc_nids = stac927x_adc_nids; | 1560 | spec->adc_nids = stac927x_adc_nids; |
1551 | spec->mux_nids = stac927x_mux_nids; | 1561 | spec->mux_nids = stac927x_mux_nids; |
1552 | spec->num_muxes = 3; | 1562 | spec->num_muxes = 3; |
1553 | spec->init = d965_2112_core_init; | 1563 | spec->init = d965_core_init; |
1554 | spec->mixer = stac9227_mixer; | 1564 | spec->mixer = stac9227_mixer; |
1555 | break; | 1565 | break; |
1556 | case STAC_D965_284B: | 1566 | case STAC_D965_5ST: |
1557 | spec->adc_nids = stac9227_adc_nids; | 1567 | spec->adc_nids = stac927x_adc_nids; |
1558 | spec->mux_nids = stac9227_mux_nids; | 1568 | spec->mux_nids = stac927x_mux_nids; |
1559 | spec->num_muxes = 2; | 1569 | spec->num_muxes = 3; |
1560 | spec->init = stac9227_core_init; | 1570 | spec->init = d965_core_init; |
1561 | spec->mixer = stac9227_mixer; | 1571 | spec->mixer = stac9227_mixer; |
1562 | break; | 1572 | break; |
1563 | default: | 1573 | default: |