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authorClemens Ladisch <clemens@ladisch.de>2008-01-25 02:39:26 -0500
committerJaroslav Kysela <perex@perex.cz>2008-01-31 11:30:15 -0500
commitb78e3dbb04ab4cbe3b94ef5426bcd5b167b6fc75 (patch)
treee234f43f207365b6dc2578a725de38ad16ad668d /sound/pci/oxygen
parent976cd62700ae378df330ec82112da3d17e33a0fe (diff)
[ALSA] oxygen: more initialization
Initialize more registers of the controller and the second AC97 codec. Signed-off-by: Clemens Ladisch <clemens@ladisch.de> Signed-off-by: Jaroslav Kysela <perex@perex.cz>
Diffstat (limited to 'sound/pci/oxygen')
-rw-r--r--sound/pci/oxygen/oxygen_lib.c76
-rw-r--r--sound/pci/oxygen/oxygen_pcm.c20
2 files changed, 62 insertions, 34 deletions
diff --git a/sound/pci/oxygen/oxygen_lib.c b/sound/pci/oxygen/oxygen_lib.c
index 49eabdadc679..06394e4409b3 100644
--- a/sound/pci/oxygen/oxygen_lib.c
+++ b/sound/pci/oxygen/oxygen_lib.c
@@ -231,6 +231,29 @@ static void __devinit oxygen_init(struct oxygen *chip)
231 oxygen_set_bits8(chip, OXYGEN_FUNCTION, 231 oxygen_set_bits8(chip, OXYGEN_FUNCTION,
232 OXYGEN_FUNCTION_RESET_CODEC | 232 OXYGEN_FUNCTION_RESET_CODEC |
233 chip->model->function_flags); 233 chip->model->function_flags);
234 oxygen_write8_masked(chip, OXYGEN_FUNCTION,
235 OXYGEN_FUNCTION_SPI,
236 OXYGEN_FUNCTION_2WIRE_SPI_MASK);
237 oxygen_write8(chip, OXYGEN_DMA_STATUS, 0);
238 oxygen_write8(chip, OXYGEN_DMA_PAUSE, 0);
239 oxygen_write8(chip, OXYGEN_PLAY_CHANNELS,
240 OXYGEN_PLAY_CHANNELS_2 |
241 OXYGEN_DMA_A_BURST_8 |
242 OXYGEN_DMA_MULTICH_BURST_8);
243 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, 0);
244 oxygen_write8_masked(chip, OXYGEN_MISC, 0,
245 OXYGEN_MISC_WRITE_PCI_SUBID |
246 OXYGEN_MISC_REC_C_FROM_SPDIF |
247 OXYGEN_MISC_REC_B_FROM_AC97 |
248 OXYGEN_MISC_REC_A_FROM_MULTICH);
249 oxygen_write8(chip, OXYGEN_REC_FORMAT,
250 (OXYGEN_FORMAT_16 << OXYGEN_REC_FORMAT_A_SHIFT) |
251 (OXYGEN_FORMAT_16 << OXYGEN_REC_FORMAT_B_SHIFT) |
252 (OXYGEN_FORMAT_16 << OXYGEN_REC_FORMAT_C_SHIFT));
253 oxygen_write8(chip, OXYGEN_PLAY_FORMAT,
254 (OXYGEN_FORMAT_16 << OXYGEN_SPDIF_FORMAT_SHIFT) |
255 (OXYGEN_FORMAT_16 << OXYGEN_MULTICH_FORMAT_SHIFT));
256 oxygen_write8(chip, OXYGEN_REC_CHANNELS, OXYGEN_REC_CHANNELS_2_2_2);
234 oxygen_write16(chip, OXYGEN_I2S_MULTICH_FORMAT, 257 oxygen_write16(chip, OXYGEN_I2S_MULTICH_FORMAT,
235 OXYGEN_RATE_48000 | OXYGEN_I2S_FORMAT_LJUST | 258 OXYGEN_RATE_48000 | OXYGEN_I2S_FORMAT_LJUST |
236 OXYGEN_I2S_MCLK_128 | OXYGEN_I2S_BITS_16 | 259 OXYGEN_I2S_MCLK_128 | OXYGEN_I2S_BITS_16 |
@@ -262,15 +285,19 @@ static void __devinit oxygen_init(struct oxygen *chip)
262 OXYGEN_SPDIF_LOCK_PAR | 285 OXYGEN_SPDIF_LOCK_PAR |
263 OXYGEN_SPDIF_IN_CLOCK_MASK); 286 OXYGEN_SPDIF_IN_CLOCK_MASK);
264 oxygen_write32(chip, OXYGEN_SPDIF_OUTPUT_BITS, chip->spdif_bits); 287 oxygen_write32(chip, OXYGEN_SPDIF_OUTPUT_BITS, chip->spdif_bits);
288 oxygen_clear_bits8(chip, OXYGEN_MPU401_CONTROL, OXYGEN_MPU401_LOOPBACK);
289 oxygen_write8(chip, OXYGEN_GPI_INTERRUPT_MASK, 0);
290 oxygen_write16(chip, OXYGEN_GPIO_INTERRUPT_MASK, 0);
265 oxygen_write16(chip, OXYGEN_PLAY_ROUTING, 291 oxygen_write16(chip, OXYGEN_PLAY_ROUTING,
266 OXYGEN_PLAY_MULTICH_I2S_DAC | OXYGEN_PLAY_SPDIF_SPDIF | 292 OXYGEN_PLAY_MULTICH_I2S_DAC |
293 OXYGEN_PLAY_SPDIF_SPDIF |
267 (0 << OXYGEN_PLAY_DAC0_SOURCE_SHIFT) | 294 (0 << OXYGEN_PLAY_DAC0_SOURCE_SHIFT) |
268 (1 << OXYGEN_PLAY_DAC1_SOURCE_SHIFT) | 295 (1 << OXYGEN_PLAY_DAC1_SOURCE_SHIFT) |
269 (2 << OXYGEN_PLAY_DAC2_SOURCE_SHIFT) | 296 (2 << OXYGEN_PLAY_DAC2_SOURCE_SHIFT) |
270 (3 << OXYGEN_PLAY_DAC3_SOURCE_SHIFT)); 297 (3 << OXYGEN_PLAY_DAC3_SOURCE_SHIFT));
271 oxygen_write8(chip, OXYGEN_REC_ROUTING, 298 oxygen_write8(chip, OXYGEN_REC_ROUTING,
272 OXYGEN_REC_A_ROUTE_I2S_ADC_1 | 299 OXYGEN_REC_A_ROUTE_I2S_ADC_1 |
273 OXYGEN_REC_B_ROUTE_AC97_1 | 300 OXYGEN_REC_B_ROUTE_I2S_ADC_2 |
274 OXYGEN_REC_C_ROUTE_SPDIF); 301 OXYGEN_REC_C_ROUTE_SPDIF);
275 oxygen_write8(chip, OXYGEN_ADC_MONITOR, 0); 302 oxygen_write8(chip, OXYGEN_ADC_MONITOR, 0);
276 oxygen_write8(chip, OXYGEN_A_MONITOR_ROUTING, 303 oxygen_write8(chip, OXYGEN_A_MONITOR_ROUTING,
@@ -279,23 +306,16 @@ static void __devinit oxygen_init(struct oxygen *chip)
279 (2 << OXYGEN_A_MONITOR_ROUTE_2_SHIFT) | 306 (2 << OXYGEN_A_MONITOR_ROUTE_2_SHIFT) |
280 (3 << OXYGEN_A_MONITOR_ROUTE_3_SHIFT)); 307 (3 << OXYGEN_A_MONITOR_ROUTE_3_SHIFT));
281 308
282 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, 0);
283 oxygen_write16(chip, OXYGEN_DMA_STATUS, 0);
284
285 oxygen_write8(chip, OXYGEN_AC97_INTERRUPT_MASK, 0); 309 oxygen_write8(chip, OXYGEN_AC97_INTERRUPT_MASK, 0);
286 if (chip->has_ac97_0) { 310 oxygen_write32(chip, OXYGEN_AC97_OUT_CONFIG, 0);
287 oxygen_clear_bits16(chip, OXYGEN_AC97_OUT_CONFIG, 311 oxygen_write32(chip, OXYGEN_AC97_IN_CONFIG, 0);
288 OXYGEN_AC97_CODEC0_FRONTL | 312 if (!(chip->has_ac97_0 | chip->has_ac97_1))
289 OXYGEN_AC97_CODEC0_FRONTR | 313 oxygen_set_bits16(chip, OXYGEN_AC97_CONTROL,
290 OXYGEN_AC97_CODEC0_SIDEL | 314 OXYGEN_AC97_CLOCK_DISABLE);
291 OXYGEN_AC97_CODEC0_SIDER | 315 if (!chip->has_ac97_0) {
292 OXYGEN_AC97_CODEC0_CENTER | 316 oxygen_set_bits16(chip, OXYGEN_AC97_CONTROL,
293 OXYGEN_AC97_CODEC0_BASE | 317 OXYGEN_AC97_NO_CODEC_0);
294 OXYGEN_AC97_CODEC0_REARL | 318 } else {
295 OXYGEN_AC97_CODEC0_REARR);
296 oxygen_set_bits16(chip, OXYGEN_AC97_IN_CONFIG,
297 OXYGEN_AC97_CODEC0_LINEL |
298 OXYGEN_AC97_CODEC0_LINER);
299 oxygen_write_ac97(chip, 0, AC97_RESET, 0); 319 oxygen_write_ac97(chip, 0, AC97_RESET, 0);
300 msleep(1); 320 msleep(1);
301 oxygen_ac97_set_bits(chip, 0, CM9780_GPIO_SETUP, 321 oxygen_ac97_set_bits(chip, 0, CM9780_GPIO_SETUP,
@@ -325,6 +345,26 @@ static void __devinit oxygen_init(struct oxygen *chip)
325 oxygen_ac97_set_bits(chip, 0, AC97_EXTENDED_STATUS, 345 oxygen_ac97_set_bits(chip, 0, AC97_EXTENDED_STATUS,
326 AC97_EA_PRI | AC97_EA_PRJ | AC97_EA_PRK); 346 AC97_EA_PRI | AC97_EA_PRJ | AC97_EA_PRK);
327 } 347 }
348 if (chip->has_ac97_1) {
349 oxygen_set_bits32(chip, OXYGEN_AC97_OUT_CONFIG,
350 OXYGEN_AC97_CODEC1_SLOT3 |
351 OXYGEN_AC97_CODEC1_SLOT4);
352 oxygen_write_ac97(chip, 1, AC97_RESET, 0);
353 msleep(1);
354 oxygen_write_ac97(chip, 1, AC97_MASTER, 0x0000);
355 oxygen_write_ac97(chip, 1, AC97_HEADPHONE, 0x8000);
356 oxygen_write_ac97(chip, 1, AC97_PC_BEEP, 0x8000);
357 oxygen_write_ac97(chip, 1, AC97_MIC, 0x8808);
358 oxygen_write_ac97(chip, 1, AC97_LINE, 0x8808);
359 oxygen_write_ac97(chip, 1, AC97_CD, 0x8808);
360 oxygen_write_ac97(chip, 1, AC97_VIDEO, 0x8808);
361 oxygen_write_ac97(chip, 1, AC97_AUX, 0x8808);
362 oxygen_write_ac97(chip, 1, AC97_PCM, 0x0808);
363 oxygen_write_ac97(chip, 1, AC97_REC_SEL, 0x0000);
364 oxygen_write_ac97(chip, 1, AC97_REC_GAIN, 0x8000);
365 oxygen_ac97_clear_bits(chip, 1, AC97_REC_GAIN, 0x1c00);
366 oxygen_ac97_set_bits(chip, 1, 0x6a, 0x0040);
367 }
328} 368}
329 369
330static void oxygen_card_free(struct snd_card *card) 370static void oxygen_card_free(struct snd_card *card)
diff --git a/sound/pci/oxygen/oxygen_pcm.c b/sound/pci/oxygen/oxygen_pcm.c
index df1d0cae1dad..5b89c727601e 100644
--- a/sound/pci/oxygen/oxygen_pcm.c
+++ b/sound/pci/oxygen/oxygen_pcm.c
@@ -253,8 +253,10 @@ static unsigned int oxygen_rate(struct snd_pcm_hw_params *hw_params)
253 253
254static unsigned int oxygen_i2s_mclk(struct snd_pcm_hw_params *hw_params) 254static unsigned int oxygen_i2s_mclk(struct snd_pcm_hw_params *hw_params)
255{ 255{
256 return params_rate(hw_params) <= 96000 256 if (params_rate(hw_params) <= 96000)
257 ? OXYGEN_I2S_MCLK_256 : OXYGEN_I2S_MCLK_128; 257 return OXYGEN_I2S_MCLK_256;
258 else
259 return OXYGEN_I2S_MCLK_128;
258} 260}
259 261
260static unsigned int oxygen_i2s_bits(struct snd_pcm_hw_params *hw_params) 262static unsigned int oxygen_i2s_bits(struct snd_pcm_hw_params *hw_params)
@@ -339,9 +341,6 @@ static int oxygen_rec_a_hw_params(struct snd_pcm_substream *substream,
339 OXYGEN_I2S_FORMAT_MASK | 341 OXYGEN_I2S_FORMAT_MASK |
340 OXYGEN_I2S_MCLK_MASK | 342 OXYGEN_I2S_MCLK_MASK |
341 OXYGEN_I2S_BITS_MASK); 343 OXYGEN_I2S_BITS_MASK);
342 oxygen_write8_masked(chip, OXYGEN_REC_ROUTING,
343 OXYGEN_REC_A_ROUTE_I2S_ADC_1,
344 OXYGEN_REC_A_ROUTE_MASK);
345 spin_unlock_irq(&chip->reg_lock); 344 spin_unlock_irq(&chip->reg_lock);
346 345
347 mutex_lock(&chip->mutex); 346 mutex_lock(&chip->mutex);
@@ -373,9 +372,6 @@ static int oxygen_rec_b_hw_params(struct snd_pcm_substream *substream,
373 OXYGEN_I2S_FORMAT_MASK | 372 OXYGEN_I2S_FORMAT_MASK |
374 OXYGEN_I2S_MCLK_MASK | 373 OXYGEN_I2S_MCLK_MASK |
375 OXYGEN_I2S_BITS_MASK); 374 OXYGEN_I2S_BITS_MASK);
376 oxygen_write8_masked(chip, OXYGEN_REC_ROUTING,
377 OXYGEN_REC_B_ROUTE_I2S_ADC_2,
378 OXYGEN_REC_B_ROUTE_MASK);
379 spin_unlock_irq(&chip->reg_lock); 375 spin_unlock_irq(&chip->reg_lock);
380 376
381 mutex_lock(&chip->mutex); 377 mutex_lock(&chip->mutex);
@@ -398,9 +394,6 @@ static int oxygen_rec_c_hw_params(struct snd_pcm_substream *substream,
398 oxygen_write8_masked(chip, OXYGEN_REC_FORMAT, 394 oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
399 oxygen_format(hw_params) << OXYGEN_REC_FORMAT_C_SHIFT, 395 oxygen_format(hw_params) << OXYGEN_REC_FORMAT_C_SHIFT,
400 OXYGEN_REC_FORMAT_C_MASK); 396 OXYGEN_REC_FORMAT_C_MASK);
401 oxygen_write8_masked(chip, OXYGEN_REC_ROUTING,
402 OXYGEN_REC_C_ROUTE_SPDIF,
403 OXYGEN_REC_C_ROUTE_MASK);
404 spin_unlock_irq(&chip->reg_lock); 397 spin_unlock_irq(&chip->reg_lock);
405 return 0; 398 return 0;
406} 399}
@@ -453,11 +446,6 @@ static int oxygen_multich_hw_params(struct snd_pcm_substream *substream,
453 OXYGEN_I2S_RATE_MASK | 446 OXYGEN_I2S_RATE_MASK |
454 OXYGEN_I2S_FORMAT_MASK | 447 OXYGEN_I2S_FORMAT_MASK |
455 OXYGEN_I2S_BITS_MASK); 448 OXYGEN_I2S_BITS_MASK);
456 oxygen_write16_masked(chip, OXYGEN_PLAY_ROUTING,
457 OXYGEN_PLAY_MULTICH_I2S_DAC,
458 OXYGEN_PLAY_MUTE01 | OXYGEN_PLAY_MUTE23 |
459 OXYGEN_PLAY_MUTE45 | OXYGEN_PLAY_MUTE67 |
460 OXYGEN_PLAY_MULTICH_MASK);
461 oxygen_update_dac_routing(chip); 449 oxygen_update_dac_routing(chip);
462 oxygen_update_spdif_source(chip); 450 oxygen_update_spdif_source(chip);
463 spin_unlock_irq(&chip->reg_lock); 451 spin_unlock_irq(&chip->reg_lock);