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authorClemens Ladisch <clemens@ladisch.de>2008-01-18 03:17:53 -0500
committerJaroslav Kysela <perex@perex.cz>2008-01-31 11:30:04 -0500
commitc2353a0826d2b8fe9f5c6a6aca99149e4ee7b196 (patch)
treebd15b1625da94b87a6f0602b47a35c09385f56ba /sound/pci/oxygen/oxygen_lib.c
parent4052ce4cbf48531bdd8ff43b673ccb5c005dec79 (diff)
[ALSA] oxygen: add register definitions
Add more symbols for registers and register fields. Signed-off-by: Clemens Ladisch <clemens@ladisch.de> Signed-off-by: Jaroslav Kysela <perex@perex.cz>
Diffstat (limited to 'sound/pci/oxygen/oxygen_lib.c')
-rw-r--r--sound/pci/oxygen/oxygen_lib.c49
1 files changed, 31 insertions, 18 deletions
diff --git a/sound/pci/oxygen/oxygen_lib.c b/sound/pci/oxygen/oxygen_lib.c
index 4edf40b65ae1..79e7c16c71ff 100644
--- a/sound/pci/oxygen/oxygen_lib.c
+++ b/sound/pci/oxygen/oxygen_lib.c
@@ -51,11 +51,11 @@ static irqreturn_t oxygen_interrupt(int dummy, void *dev_id)
51 OXYGEN_CHANNEL_SPDIF | 51 OXYGEN_CHANNEL_SPDIF |
52 OXYGEN_CHANNEL_MULTICH | 52 OXYGEN_CHANNEL_MULTICH |
53 OXYGEN_CHANNEL_AC97 | 53 OXYGEN_CHANNEL_AC97 |
54 OXYGEN_INT_SPDIF_IN_CHANGE | 54 OXYGEN_INT_SPDIF_IN_DETECT |
55 OXYGEN_INT_GPIO); 55 OXYGEN_INT_GPIO);
56 if (clear) { 56 if (clear) {
57 if (clear & OXYGEN_INT_SPDIF_IN_CHANGE) 57 if (clear & OXYGEN_INT_SPDIF_IN_DETECT)
58 chip->interrupt_mask &= ~OXYGEN_INT_SPDIF_IN_CHANGE; 58 chip->interrupt_mask &= ~OXYGEN_INT_SPDIF_IN_DETECT;
59 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, 59 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK,
60 chip->interrupt_mask & ~clear); 60 chip->interrupt_mask & ~clear);
61 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, 61 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK,
@@ -70,10 +70,10 @@ static irqreturn_t oxygen_interrupt(int dummy, void *dev_id)
70 if ((elapsed_streams & (1 << i)) && chip->streams[i]) 70 if ((elapsed_streams & (1 << i)) && chip->streams[i])
71 snd_pcm_period_elapsed(chip->streams[i]); 71 snd_pcm_period_elapsed(chip->streams[i]);
72 72
73 if (status & OXYGEN_INT_SPDIF_IN_CHANGE) { 73 if (status & OXYGEN_INT_SPDIF_IN_DETECT) {
74 spin_lock(&chip->reg_lock); 74 spin_lock(&chip->reg_lock);
75 i = oxygen_read32(chip, OXYGEN_SPDIF_CONTROL); 75 i = oxygen_read32(chip, OXYGEN_SPDIF_CONTROL);
76 if (i & OXYGEN_SPDIF_IN_CHANGE) { 76 if (i & OXYGEN_SPDIF_RATE_INT) {
77 oxygen_write32(chip, OXYGEN_SPDIF_CONTROL, i); 77 oxygen_write32(chip, OXYGEN_SPDIF_CONTROL, i);
78 schedule_work(&chip->spdif_input_bits_work); 78 schedule_work(&chip->spdif_input_bits_work);
79 } 79 }
@@ -95,28 +95,32 @@ static void oxygen_spdif_input_bits_changed(struct work_struct *work)
95 spdif_input_bits_work); 95 spdif_input_bits_work);
96 96
97 spin_lock_irq(&chip->reg_lock); 97 spin_lock_irq(&chip->reg_lock);
98 oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL, OXYGEN_SPDIF_IN_INVERT); 98 oxygen_write32_masked(chip, OXYGEN_SPDIF_CONTROL,
99 OXYGEN_SPDIF_IN_CLOCK_96,
100 OXYGEN_SPDIF_IN_CLOCK_MASK);
99 spin_unlock_irq(&chip->reg_lock); 101 spin_unlock_irq(&chip->reg_lock);
100 msleep(1); 102 msleep(1);
101 if (!(oxygen_read32(chip, OXYGEN_SPDIF_CONTROL) 103 if (!(oxygen_read32(chip, OXYGEN_SPDIF_CONTROL)
102 & OXYGEN_SPDIF_IN_VALID)) { 104 & OXYGEN_SPDIF_LOCK_STATUS)) {
103 spin_lock_irq(&chip->reg_lock); 105 spin_lock_irq(&chip->reg_lock);
104 oxygen_set_bits32(chip, OXYGEN_SPDIF_CONTROL, 106 oxygen_write32_masked(chip, OXYGEN_SPDIF_CONTROL,
105 OXYGEN_SPDIF_IN_INVERT); 107 OXYGEN_SPDIF_IN_CLOCK_192,
108 OXYGEN_SPDIF_IN_CLOCK_MASK);
106 spin_unlock_irq(&chip->reg_lock); 109 spin_unlock_irq(&chip->reg_lock);
107 msleep(1); 110 msleep(1);
108 if (!(oxygen_read32(chip, OXYGEN_SPDIF_CONTROL) 111 if (!(oxygen_read32(chip, OXYGEN_SPDIF_CONTROL)
109 & OXYGEN_SPDIF_IN_VALID)) { 112 & OXYGEN_SPDIF_LOCK_STATUS)) {
110 spin_lock_irq(&chip->reg_lock); 113 spin_lock_irq(&chip->reg_lock);
111 oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL, 114 oxygen_write32_masked(chip, OXYGEN_SPDIF_CONTROL,
112 OXYGEN_SPDIF_IN_INVERT); 115 OXYGEN_SPDIF_IN_CLOCK_96,
116 OXYGEN_SPDIF_IN_CLOCK_MASK);
113 spin_unlock_irq(&chip->reg_lock); 117 spin_unlock_irq(&chip->reg_lock);
114 } 118 }
115 } 119 }
116 120
117 if (chip->controls[CONTROL_SPDIF_INPUT_BITS]) { 121 if (chip->controls[CONTROL_SPDIF_INPUT_BITS]) {
118 spin_lock_irq(&chip->reg_lock); 122 spin_lock_irq(&chip->reg_lock);
119 chip->interrupt_mask |= OXYGEN_INT_SPDIF_IN_CHANGE; 123 chip->interrupt_mask |= OXYGEN_INT_SPDIF_IN_DETECT;
120 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, 124 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK,
121 chip->interrupt_mask); 125 chip->interrupt_mask);
122 spin_unlock_irq(&chip->reg_lock); 126 spin_unlock_irq(&chip->reg_lock);
@@ -194,7 +198,8 @@ static void __devinit oxygen_init(struct oxygen *chip)
194 chip->revision = 1; 198 chip->revision = 1;
195 199
196 if (chip->revision == 1) 200 if (chip->revision == 1)
197 oxygen_set_bits8(chip, OXYGEN_MISC, OXYGEN_MISC_MAGIC); 201 oxygen_set_bits8(chip, OXYGEN_MISC,
202 OXYGEN_MISC_PCI_MEM_W_1_CLOCK);
198 203
199 i = oxygen_read16(chip, OXYGEN_AC97_CONTROL); 204 i = oxygen_read16(chip, OXYGEN_AC97_CONTROL);
200 chip->has_ac97_0 = (i & OXYGEN_AC97_CODEC_0) != 0; 205 chip->has_ac97_0 = (i & OXYGEN_AC97_CODEC_0) != 0;
@@ -207,7 +212,7 @@ static void __devinit oxygen_init(struct oxygen *chip)
207 oxygen_write16(chip, OXYGEN_I2S_A_FORMAT, 0x010a); 212 oxygen_write16(chip, OXYGEN_I2S_A_FORMAT, 0x010a);
208 oxygen_write16(chip, OXYGEN_I2S_B_FORMAT, 0x010a); 213 oxygen_write16(chip, OXYGEN_I2S_B_FORMAT, 0x010a);
209 oxygen_write16(chip, OXYGEN_I2S_C_FORMAT, 0x010a); 214 oxygen_write16(chip, OXYGEN_I2S_C_FORMAT, 0x010a);
210 oxygen_set_bits32(chip, OXYGEN_SPDIF_CONTROL, OXYGEN_SPDIF_MAGIC2); 215 oxygen_set_bits32(chip, OXYGEN_SPDIF_CONTROL, OXYGEN_SPDIF_RATE_MASK);
211 oxygen_write32(chip, OXYGEN_SPDIF_OUTPUT_BITS, chip->spdif_bits); 216 oxygen_write32(chip, OXYGEN_SPDIF_OUTPUT_BITS, chip->spdif_bits);
212 oxygen_write16(chip, OXYGEN_PLAY_ROUTING, 0xe100); 217 oxygen_write16(chip, OXYGEN_PLAY_ROUTING, 0xe100);
213 oxygen_write8(chip, OXYGEN_REC_ROUTING, 0x10); 218 oxygen_write8(chip, OXYGEN_REC_ROUTING, 0x10);
@@ -220,9 +225,17 @@ static void __devinit oxygen_init(struct oxygen *chip)
220 oxygen_write8(chip, OXYGEN_AC97_INTERRUPT_MASK, 0x00); 225 oxygen_write8(chip, OXYGEN_AC97_INTERRUPT_MASK, 0x00);
221 if (chip->has_ac97_0) { 226 if (chip->has_ac97_0) {
222 oxygen_clear_bits16(chip, OXYGEN_AC97_OUT_CONFIG, 227 oxygen_clear_bits16(chip, OXYGEN_AC97_OUT_CONFIG,
223 OXYGEN_AC97_OUT_MAGIC3); 228 OXYGEN_AC97_CODEC0_FRONTL |
229 OXYGEN_AC97_CODEC0_FRONTR |
230 OXYGEN_AC97_CODEC0_SIDEL |
231 OXYGEN_AC97_CODEC0_SIDER |
232 OXYGEN_AC97_CODEC0_CENTER |
233 OXYGEN_AC97_CODEC0_BASE |
234 OXYGEN_AC97_CODEC0_REARL |
235 OXYGEN_AC97_CODEC0_REARR);
224 oxygen_set_bits16(chip, OXYGEN_AC97_IN_CONFIG, 236 oxygen_set_bits16(chip, OXYGEN_AC97_IN_CONFIG,
225 OXYGEN_AC97_IN_MAGIC3); 237 OXYGEN_AC97_CODEC0_LINEL |
238 OXYGEN_AC97_CODEC0_LINER);
226 oxygen_write_ac97(chip, 0, AC97_RESET, 0); 239 oxygen_write_ac97(chip, 0, AC97_RESET, 0);
227 msleep(1); 240 msleep(1);
228 oxygen_ac97_set_bits(chip, 0, 0x70, 0x0300); 241 oxygen_ac97_set_bits(chip, 0, 0x70, 0x0300);
@@ -349,7 +362,7 @@ int __devinit oxygen_pci_probe(struct pci_dev *pci, int index, char *id,
349 oxygen_proc_init(chip); 362 oxygen_proc_init(chip);
350 363
351 spin_lock_irq(&chip->reg_lock); 364 spin_lock_irq(&chip->reg_lock);
352 chip->interrupt_mask |= OXYGEN_INT_SPDIF_IN_CHANGE; 365 chip->interrupt_mask |= OXYGEN_INT_SPDIF_IN_DETECT;
353 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask); 366 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
354 spin_unlock_irq(&chip->reg_lock); 367 spin_unlock_irq(&chip->reg_lock);
355 368