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authorPavel Hofman <dustin@seznam.cz>2008-03-20 07:10:27 -0400
committerTakashi Iwai <tiwai@suse.de>2008-04-24 06:00:29 -0400
commitd16be8ed69f3e59d36be8c422508c3a10082fdaa (patch)
tree38b4ff3d3a181a2f16b1e74669b1205dae455c89 /sound/pci/ice1712/ice1724.c
parentff73317ea7c648cf5f59b8bda4a810f7b5d0312c (diff)
[ALSA] ice1724 - Improved the Juli rate setting
* moving most of clock-specific code to card-specific routines * support for ESI Juli * to-be-researched - monitoring of analog/digital inputs Signed-off-by: Pavel Hofman <dustin@seznam.cz> Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'sound/pci/ice1712/ice1724.c')
-rw-r--r--sound/pci/ice1712/ice1724.c313
1 files changed, 149 insertions, 164 deletions
diff --git a/sound/pci/ice1712/ice1724.c b/sound/pci/ice1712/ice1724.c
index 3bfd70577d7a..ceac87056263 100644
--- a/sound/pci/ice1712/ice1724.c
+++ b/sound/pci/ice1712/ice1724.c
@@ -106,15 +106,19 @@ static unsigned int PRO_RATE_DEFAULT = 44100;
106 * Basic I/O 106 * Basic I/O
107 */ 107 */
108 108
109/*
110 * default rates, default clock routines
111 */
112
109/* check whether the clock mode is spdif-in */ 113/* check whether the clock mode is spdif-in */
110static inline int is_spdif_master(struct snd_ice1712 *ice) 114static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice)
111{ 115{
112 return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0; 116 return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
113} 117}
114 118
115static inline int is_pro_rate_locked(struct snd_ice1712 *ice) 119static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
116{ 120{
117 return is_spdif_master(ice) || PRO_RATE_LOCKED; 121 return ice->is_spdif_master(ice) || PRO_RATE_LOCKED;
118} 122}
119 123
120/* 124/*
@@ -391,51 +395,61 @@ static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
391#define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\ 395#define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
392 VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE) 396 VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
393 397
394static int get_max_rate(struct snd_ice1712 *ice) 398static const unsigned int stdclock_rate_list[16] = {
399 48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100,
400 22050, 11025, 88200, 176400, 0, 192000, 64000
401};
402
403static unsigned int stdclock_get_rate(struct snd_ice1712 *ice)
395{ 404{
405 unsigned int rate;
406 rate = stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15];
407 return rate;
408}
409
410static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate)
411{
412 int i;
413 for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) {
414 if (stdclock_rate_list[i] == rate) {
415 outb(i, ICEMT1724(ice, RATE));
416 return;
417 }
418 }
419}
420
421static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice,
422 unsigned int rate)
423{
424 unsigned char val, old;
425 /* check MT02 */
396 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) { 426 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
397 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720) 427 val = old = inb(ICEMT1724(ice, I2S_FORMAT));
398 return 192000; 428 if (rate > 96000)
429 val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
399 else 430 else
400 return 96000; 431 val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
401 } else 432 if (val != old) {
402 return 48000; 433 outb(val, ICEMT1724(ice, I2S_FORMAT));
434 /* master clock changed */
435 return 1;
436 }
437 }
438 /* no change in master clock */
439 return 0;
403} 440}
404 441
405static void snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, 442static void snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
406 int force) 443 int force)
407{ 444{
408 unsigned long flags; 445 unsigned long flags;
409 unsigned char val, old; 446 unsigned char mclk_change;
410 unsigned int i, mclk_change; 447 unsigned int i, old_rate;
411 448
412 if (rate > get_max_rate(ice)) 449 if (rate > ice->hw_rates->list[ice->hw_rates->count - 1])
413 return; 450 return;
414
415 switch (rate) {
416 case 8000: val = 6; break;
417 case 9600: val = 3; break;
418 case 11025: val = 10; break;
419 case 12000: val = 2; break;
420 case 16000: val = 5; break;
421 case 22050: val = 9; break;
422 case 24000: val = 1; break;
423 case 32000: val = 4; break;
424 case 44100: val = 8; break;
425 case 48000: val = 0; break;
426 case 64000: val = 15; break;
427 case 88200: val = 11; break;
428 case 96000: val = 7; break;
429 case 176400: val = 12; break;
430 case 192000: val = 14; break;
431 default:
432 snd_BUG();
433 val = 0;
434 break;
435 }
436
437 spin_lock_irqsave(&ice->reg_lock, flags); 451 spin_lock_irqsave(&ice->reg_lock, flags);
438 if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) || 452 if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
439 (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) { 453 (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
440 /* running? we cannot change the rate now... */ 454 /* running? we cannot change the rate now... */
441 spin_unlock_irqrestore(&ice->reg_lock, flags); 455 spin_unlock_irqrestore(&ice->reg_lock, flags);
@@ -446,9 +460,9 @@ static void snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
446 return; 460 return;
447 } 461 }
448 462
449 old = inb(ICEMT1724(ice, RATE)); 463 old_rate = ice->get_rate(ice);
450 if (force || old != val) 464 if (force || (old_rate != rate))
451 outb(val, ICEMT1724(ice, RATE)); 465 ice->set_rate(ice, rate);
452 else if (rate == ice->cur_rate) { 466 else if (rate == ice->cur_rate) {
453 spin_unlock_irqrestore(&ice->reg_lock, flags); 467 spin_unlock_irqrestore(&ice->reg_lock, flags);
454 return; 468 return;
@@ -456,19 +470,9 @@ static void snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
456 470
457 ice->cur_rate = rate; 471 ice->cur_rate = rate;
458 472
459 /* check MT02 */ 473 /* setting master clock */
460 mclk_change = 0; 474 mclk_change = ice->set_mclk(ice, rate);
461 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) { 475
462 val = old = inb(ICEMT1724(ice, I2S_FORMAT));
463 if (rate > 96000)
464 val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
465 else
466 val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
467 if (val != old) {
468 outb(val, ICEMT1724(ice, I2S_FORMAT));
469 mclk_change = 1;
470 }
471 }
472 spin_unlock_irqrestore(&ice->reg_lock, flags); 476 spin_unlock_irqrestore(&ice->reg_lock, flags);
473 477
474 if (mclk_change && ice->gpio.i2s_mclk_changed) 478 if (mclk_change && ice->gpio.i2s_mclk_changed)
@@ -727,43 +731,32 @@ static const struct snd_pcm_hardware snd_vt1724_2ch_stereo =
727/* 731/*
728 * set rate constraints 732 * set rate constraints
729 */ 733 */
730static int set_rate_constraints(struct snd_ice1712 *ice, 734static void set_std_hw_rates(struct snd_ice1712 *ice)
731 struct snd_pcm_substream *substream)
732{ 735{
733 struct snd_pcm_runtime *runtime = substream->runtime;
734 if (ice->hw_rates) {
735 /* hardware specific */
736 runtime->hw.rate_min = ice->hw_rates->list[0];
737 runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
738 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
739 return snd_pcm_hw_constraint_list(runtime, 0,
740 SNDRV_PCM_HW_PARAM_RATE,
741 ice->hw_rates);
742 }
743 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) { 736 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
744 /* I2S */ 737 /* I2S */
745 /* VT1720 doesn't support more than 96kHz */ 738 /* VT1720 doesn't support more than 96kHz */
746 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720) 739 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
747 return snd_pcm_hw_constraint_list(runtime, 0, 740 ice->hw_rates = &hw_constraints_rates_192;
748 SNDRV_PCM_HW_PARAM_RATE, 741 else
749 &hw_constraints_rates_192); 742 ice->hw_rates = &hw_constraints_rates_96;
750 else { 743 } else {
751 runtime->hw.rates = SNDRV_PCM_RATE_KNOT |
752 SNDRV_PCM_RATE_8000_96000;
753 runtime->hw.rate_max = 96000;
754 return snd_pcm_hw_constraint_list(runtime, 0,
755 SNDRV_PCM_HW_PARAM_RATE,
756 &hw_constraints_rates_96);
757 }
758 } else if (ice->ac97) {
759 /* ACLINK */ 744 /* ACLINK */
760 runtime->hw.rate_max = 48000; 745 ice->hw_rates = &hw_constraints_rates_48;
761 runtime->hw.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000;
762 return snd_pcm_hw_constraint_list(runtime, 0,
763 SNDRV_PCM_HW_PARAM_RATE,
764 &hw_constraints_rates_48);
765 } 746 }
766 return 0; 747}
748
749static int set_rate_constraints(struct snd_ice1712 *ice,
750 struct snd_pcm_substream *substream)
751{
752 struct snd_pcm_runtime *runtime = substream->runtime;
753
754 runtime->hw.rate_min = ice->hw_rates->list[0];
755 runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
756 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
757 return snd_pcm_hw_constraint_list(runtime, 0,
758 SNDRV_PCM_HW_PARAM_RATE,
759 ice->hw_rates);
767} 760}
768 761
769/* multi-channel playback needs alignment 8x32bit regardless of the channels 762/* multi-channel playback needs alignment 8x32bit regardless of the channels
@@ -824,7 +817,7 @@ static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream)
824 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 817 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
825 818
826 if (PRO_RATE_RESET) 819 if (PRO_RATE_RESET)
827 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0); 820 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
828 ice->playback_pro_substream = NULL; 821 ice->playback_pro_substream = NULL;
829 822
830 return 0; 823 return 0;
@@ -835,7 +828,7 @@ static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream)
835 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 828 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
836 829
837 if (PRO_RATE_RESET) 830 if (PRO_RATE_RESET)
838 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0); 831 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
839 ice->capture_pro_substream = NULL; 832 ice->capture_pro_substream = NULL;
840 return 0; 833 return 0;
841} 834}
@@ -980,7 +973,7 @@ static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream)
980 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 973 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
981 974
982 if (PRO_RATE_RESET) 975 if (PRO_RATE_RESET)
983 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0); 976 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
984 ice->playback_con_substream = NULL; 977 ice->playback_con_substream = NULL;
985 if (ice->spdif.ops.close) 978 if (ice->spdif.ops.close)
986 ice->spdif.ops.close(ice, substream); 979 ice->spdif.ops.close(ice, substream);
@@ -1016,7 +1009,7 @@ static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream)
1016 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1009 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1017 1010
1018 if (PRO_RATE_RESET) 1011 if (PRO_RATE_RESET)
1019 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0); 1012 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1020 ice->capture_con_substream = NULL; 1013 ice->capture_con_substream = NULL;
1021 if (ice->spdif.ops.close) 1014 if (ice->spdif.ops.close)
1022 ice->spdif.ops.close(ice, substream); 1015 ice->spdif.ops.close(ice, substream);
@@ -1162,7 +1155,7 @@ static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream)
1162 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1155 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1163 1156
1164 if (PRO_RATE_RESET) 1157 if (PRO_RATE_RESET)
1165 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0); 1158 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1166 ice->playback_con_substream_ds[substream->number] = NULL; 1159 ice->playback_con_substream_ds[substream->number] = NULL;
1167 ice->pcm_reserved[substream->number] = NULL; 1160 ice->pcm_reserved[substream->number] = NULL;
1168 1161
@@ -1580,50 +1573,18 @@ int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
1580static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol, 1573static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
1581 struct snd_ctl_elem_info *uinfo) 1574 struct snd_ctl_elem_info *uinfo)
1582{ 1575{
1583 static const char * const texts_1724[] = {
1584 "8000", /* 0: 6 */
1585 "9600", /* 1: 3 */
1586 "11025", /* 2: 10 */
1587 "12000", /* 3: 2 */
1588 "16000", /* 4: 5 */
1589 "22050", /* 5: 9 */
1590 "24000", /* 6: 1 */
1591 "32000", /* 7: 4 */
1592 "44100", /* 8: 8 */
1593 "48000", /* 9: 0 */
1594 "64000", /* 10: 15 */
1595 "88200", /* 11: 11 */
1596 "96000", /* 12: 7 */
1597 "176400", /* 13: 12 */
1598 "192000", /* 14: 14 */
1599 "IEC958 Input", /* 15: -- */
1600 };
1601 static const char * const texts_1720[] = {
1602 "8000", /* 0: 6 */
1603 "9600", /* 1: 3 */
1604 "11025", /* 2: 10 */
1605 "12000", /* 3: 2 */
1606 "16000", /* 4: 5 */
1607 "22050", /* 5: 9 */
1608 "24000", /* 6: 1 */
1609 "32000", /* 7: 4 */
1610 "44100", /* 8: 8 */
1611 "48000", /* 9: 0 */
1612 "64000", /* 10: 15 */
1613 "88200", /* 11: 11 */
1614 "96000", /* 12: 7 */
1615 "IEC958 Input", /* 13: -- */
1616 };
1617 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1576 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1618 1577
1619 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1578 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1620 uinfo->count = 1; 1579 uinfo->count = 1;
1621 uinfo->value.enumerated.items = ice->vt1720 ? 14 : 16; 1580 uinfo->value.enumerated.items = ice->hw_rates->count + 1;
1622 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1581 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1623 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; 1582 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1624 strcpy(uinfo->value.enumerated.name, 1583 if (uinfo->value.enumerated.item == uinfo->value.enumerated.items - 1)
1625 ice->vt1720 ? texts_1720[uinfo->value.enumerated.item] : 1584 strcpy(uinfo->value.enumerated.name, "IEC958 Input");
1626 texts_1724[uinfo->value.enumerated.item]); 1585 else
1586 sprintf(uinfo->value.enumerated.name, "%d",
1587 ice->hw_rates->list[uinfo->value.enumerated.item]);
1627 return 0; 1588 return 0;
1628} 1589}
1629 1590
@@ -1631,68 +1592,79 @@ static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
1631 struct snd_ctl_elem_value *ucontrol) 1592 struct snd_ctl_elem_value *ucontrol)
1632{ 1593{
1633 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1594 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1634 static const unsigned char xlate[16] = { 1595 unsigned int i, rate;
1635 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 13, 255, 14, 10
1636 };
1637 unsigned char val;
1638 1596
1639 spin_lock_irq(&ice->reg_lock); 1597 spin_lock_irq(&ice->reg_lock);
1640 if (is_spdif_master(ice)) { 1598 if (ice->is_spdif_master(ice)) {
1641 ucontrol->value.enumerated.item[0] = ice->vt1720 ? 13 : 15; 1599 ucontrol->value.enumerated.item[0] = ice->hw_rates->count;
1642 } else { 1600 } else {
1643 val = xlate[inb(ICEMT1724(ice, RATE)) & 15]; 1601 rate = ice->get_rate(ice);
1644 if (val == 255) { 1602 ucontrol->value.enumerated.item[0] = 0;
1645 snd_BUG(); 1603 for (i = 0; i < ice->hw_rates->count; i++) {
1646 val = 0; 1604 if (ice->hw_rates->list[i] == rate) {
1605 ucontrol->value.enumerated.item[0] = i;
1606 break;
1607 }
1647 } 1608 }
1648 ucontrol->value.enumerated.item[0] = val;
1649 } 1609 }
1650 spin_unlock_irq(&ice->reg_lock); 1610 spin_unlock_irq(&ice->reg_lock);
1651 return 0; 1611 return 0;
1652} 1612}
1653 1613
1614/* setting clock to external - SPDIF */
1615static void stdclock_set_spdif_clock(struct snd_ice1712 *ice)
1616{
1617 unsigned char oval;
1618 unsigned char i2s_oval;
1619 oval = inb(ICEMT1724(ice, RATE));
1620 outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
1621 /* setting 256fs */
1622 i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT));
1623 outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT));
1624}
1625
1654static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol, 1626static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
1655 struct snd_ctl_elem_value *ucontrol) 1627 struct snd_ctl_elem_value *ucontrol)
1656{ 1628{
1657 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1629 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1658 unsigned char oval; 1630 unsigned int old_rate, new_rate;
1659 int rate; 1631 unsigned int item = ucontrol->value.enumerated.item[0];
1660 int change = 0; 1632 unsigned int spdif = ice->hw_rates->count;
1661 int spdif = ice->vt1720 ? 13 : 15; 1633
1634 if (item > spdif)
1635 return -EINVAL;
1662 1636
1663 spin_lock_irq(&ice->reg_lock); 1637 spin_lock_irq(&ice->reg_lock);
1664 oval = inb(ICEMT1724(ice, RATE)); 1638 if (ice->is_spdif_master(ice))
1665 if (ucontrol->value.enumerated.item[0] == spdif) { 1639 old_rate = 0;
1666 unsigned char i2s_oval; 1640 else
1667 outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE)); 1641 old_rate = ice->get_rate(ice);
1668 /* setting 256fs */ 1642 if (item == spdif) {
1669 i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT)); 1643 /* switching to external clock via SPDIF */
1670 outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, 1644 ice->set_spdif_clock(ice);
1671 ICEMT1724(ice, I2S_FORMAT)); 1645 new_rate = 0;
1672 } else { 1646 } else {
1673 rate = rates[ucontrol->value.integer.value[0] % 15]; 1647 /* internal on-card clock */
1674 if (rate <= get_max_rate(ice)) { 1648 new_rate = ice->hw_rates->list[item];
1675 PRO_RATE_DEFAULT = rate; 1649 ice->pro_rate_default = new_rate;
1676 spin_unlock_irq(&ice->reg_lock); 1650 spin_unlock_irq(&ice->reg_lock);
1677 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 1); 1651 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1);
1678 spin_lock_irq(&ice->reg_lock); 1652 spin_lock_irq(&ice->reg_lock);
1679 }
1680 } 1653 }
1681 change = inb(ICEMT1724(ice, RATE)) != oval;
1682 spin_unlock_irq(&ice->reg_lock); 1654 spin_unlock_irq(&ice->reg_lock);
1683 1655
1684 if ((oval & VT1724_SPDIF_MASTER) != 1656 /* the first reset to the SPDIF master mode? */
1685 (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER)) { 1657 if (old_rate != new_rate && !new_rate) {
1686 /* notify akm chips as well */ 1658 /* notify akm chips as well */
1687 if (is_spdif_master(ice)) { 1659 unsigned int i;
1688 unsigned int i; 1660 if (ice->gpio.set_pro_rate)
1689 for (i = 0; i < ice->akm_codecs; i++) { 1661 ice->gpio.set_pro_rate(ice, 0);
1690 if (ice->akm[i].ops.set_rate_val) 1662 for (i = 0; i < ice->akm_codecs; i++) {
1691 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0); 1663 if (ice->akm[i].ops.set_rate_val)
1692 } 1664 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
1693 } 1665 }
1694 } 1666 }
1695 return change; 1667 return old_rate != new_rate;
1696} 1668}
1697 1669
1698static struct snd_kcontrol_new snd_vt1724_pro_internal_clock __devinitdata = { 1670static struct snd_kcontrol_new snd_vt1724_pro_internal_clock __devinitdata = {
@@ -2343,6 +2315,19 @@ static int __devinit snd_vt1724_probe(struct pci_dev *pci,
2343 * was called so in ice1712 driver, and vt1724 driver is derived from 2315 * was called so in ice1712 driver, and vt1724 driver is derived from
2344 * ice1712 driver. 2316 * ice1712 driver.
2345 */ 2317 */
2318 ice->pro_rate_default = PRO_RATE_DEFAULT;
2319 if (!ice->is_spdif_master)
2320 ice->is_spdif_master = stdclock_is_spdif_master;
2321 if (!ice->get_rate)
2322 ice->get_rate = stdclock_get_rate;
2323 if (!ice->set_rate)
2324 ice->set_rate = stdclock_set_rate;
2325 if (!ice->set_mclk)
2326 ice->set_mclk = stdclock_set_mclk;
2327 if (!ice->set_spdif_clock)
2328 ice->set_spdif_clock = stdclock_set_spdif_clock;
2329 if (!ice->hw_rates)
2330 set_std_hw_rates(ice);
2346 2331
2347 if ((err = snd_vt1724_pcm_profi(ice, pcm_dev++)) < 0) { 2332 if ((err = snd_vt1724_pcm_profi(ice, pcm_dev++)) < 0) {
2348 snd_card_free(card); 2333 snd_card_free(card);