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authorAlan Horstmann <gineera@aspect135.co.uk>2006-05-23 07:29:51 -0400
committerJaroslav Kysela <perex@suse.cz>2006-06-22 15:33:57 -0400
commit721b8a297279276699900a662fa8299232ebc0e8 (patch)
tree26b007f788400ab9a1ba1775954a5050baa56824 /sound/pci/ice1712/ice1712.c
parent302e4c2f9e2b9f07c69649782330a61c60001ac4 (diff)
[ALSA] ice1712 - Disable AC97 for DMX6fire
Consumer AC97 is not used by the Terratec DMX6fire, but eeprom bit indicates it is; change the stored value to disable failing consumer mode. Signed-off-by: Alan Horstmann <gineera@aspect135.co.uk> Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'sound/pci/ice1712/ice1712.c')
-rw-r--r--sound/pci/ice1712/ice1712.c15
1 files changed, 8 insertions, 7 deletions
diff --git a/sound/pci/ice1712/ice1712.c b/sound/pci/ice1712/ice1712.c
index 00e565e1db3a..aa5a41fecb08 100644
--- a/sound/pci/ice1712/ice1712.c
+++ b/sound/pci/ice1712/ice1712.c
@@ -2398,13 +2398,14 @@ static int __devinit snd_ice1712_chip_init(struct snd_ice1712 *ice)
2398 udelay(200); 2398 udelay(200);
2399 outb(ICE1712_NATIVE, ICEREG(ice, CONTROL)); 2399 outb(ICE1712_NATIVE, ICEREG(ice, CONTROL));
2400 udelay(200); 2400 udelay(200);
2401 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE && !ice->dxr_enable) { 2401 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE &&
2402 /* Limit active ADCs and DACs to 6; */ 2402 !ice->dxr_enable)
2403 /* Note: DXR extension not supported */ 2403 /* Set eeprom value to limit active ADCs and DACs to 6;
2404 pci_write_config_byte(ice->pci, 0x60, 0x2a); 2404 * Also disable AC97 as no hardware in standard 6fire card/box
2405 } else { 2405 * Note: DXR extensions are not currently supported
2406 pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]); 2406 */
2407 } 2407 ice->eeprom.data[ICE_EEP1_CODEC] = 0x3a;
2408 pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]);
2408 pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]); 2409 pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]);
2409 pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]); 2410 pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]);
2410 pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]); 2411 pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]);