diff options
author | Takashi Iwai <tiwai@suse.de> | 2012-01-24 06:25:50 -0500 |
---|---|---|
committer | Takashi Iwai <tiwai@suse.de> | 2012-02-02 04:15:16 -0500 |
commit | 054d867e032daf55c3343fc6d36c5c5f1e7954db (patch) | |
tree | 016891c36c141beb4e098781a711e23f8e43d259 /sound/pci/hda | |
parent | 54c2a89f60fd71b924d0f848ac892442951401a6 (diff) |
ALSA: hda - Check power-state before changing in patch_via.c
Instead of always writing AC_VERB_SET_POWER_STATE, check the current
power-state and don't write again if the value is already set.
This may reduce the click noise upon the dynamic power-state change
(e.g. in analog-input mixer).
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'sound/pci/hda')
-rw-r--r-- | sound/pci/hda/patch_via.c | 256 |
1 files changed, 107 insertions, 149 deletions
diff --git a/sound/pci/hda/patch_via.c b/sound/pci/hda/patch_via.c index 03e63fed9caf..fb1f0ffc556b 100644 --- a/sound/pci/hda/patch_via.c +++ b/sound/pci/hda/patch_via.c | |||
@@ -687,6 +687,15 @@ static void via_auto_init_analog_input(struct hda_codec *codec) | |||
687 | } | 687 | } |
688 | } | 688 | } |
689 | 689 | ||
690 | static void update_power_state(struct hda_codec *codec, hda_nid_t nid, | ||
691 | unsigned int parm) | ||
692 | { | ||
693 | if (snd_hda_codec_read(codec, nid, 0, | ||
694 | AC_VERB_GET_POWER_STATE, 0) == parm) | ||
695 | return; | ||
696 | snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE, parm); | ||
697 | } | ||
698 | |||
690 | static void set_pin_power_state(struct hda_codec *codec, hda_nid_t nid, | 699 | static void set_pin_power_state(struct hda_codec *codec, hda_nid_t nid, |
691 | unsigned int *affected_parm) | 700 | unsigned int *affected_parm) |
692 | { | 701 | { |
@@ -709,7 +718,7 @@ static void set_pin_power_state(struct hda_codec *codec, hda_nid_t nid, | |||
709 | } else | 718 | } else |
710 | parm = AC_PWRST_D3; | 719 | parm = AC_PWRST_D3; |
711 | 720 | ||
712 | snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE, parm); | 721 | update_power_state(codec, nid, parm); |
713 | } | 722 | } |
714 | 723 | ||
715 | static int via_pin_power_ctl_info(struct snd_kcontrol *kcontrol, | 724 | static int via_pin_power_ctl_info(struct snd_kcontrol *kcontrol, |
@@ -2295,10 +2304,7 @@ static int via_mux_enum_put(struct snd_kcontrol *kcontrol, | |||
2295 | 2304 | ||
2296 | if (mux) { | 2305 | if (mux) { |
2297 | /* switch to D0 beofre change index */ | 2306 | /* switch to D0 beofre change index */ |
2298 | if (snd_hda_codec_read(codec, mux, 0, | 2307 | update_power_state(codec, mux, AC_PWRST_D0); |
2299 | AC_VERB_GET_POWER_STATE, 0x00) != AC_PWRST_D0) | ||
2300 | snd_hda_codec_write(codec, mux, 0, | ||
2301 | AC_VERB_SET_POWER_STATE, AC_PWRST_D0); | ||
2302 | snd_hda_codec_write(codec, mux, 0, | 2308 | snd_hda_codec_write(codec, mux, 0, |
2303 | AC_VERB_SET_CONNECT_SEL, | 2309 | AC_VERB_SET_CONNECT_SEL, |
2304 | spec->inputs[cur].mux_idx); | 2310 | spec->inputs[cur].mux_idx); |
@@ -2922,9 +2928,9 @@ static void set_widgets_power_state_vt1708B(struct hda_codec *codec) | |||
2922 | if (imux_is_smixer) | 2928 | if (imux_is_smixer) |
2923 | parm = AC_PWRST_D0; | 2929 | parm = AC_PWRST_D0; |
2924 | /* SW0 (17h), AIW 0/1 (13h/14h) */ | 2930 | /* SW0 (17h), AIW 0/1 (13h/14h) */ |
2925 | snd_hda_codec_write(codec, 0x17, 0, AC_VERB_SET_POWER_STATE, parm); | 2931 | update_power_state(codec, 0x17, parm); |
2926 | snd_hda_codec_write(codec, 0x13, 0, AC_VERB_SET_POWER_STATE, parm); | 2932 | update_power_state(codec, 0x13, parm); |
2927 | snd_hda_codec_write(codec, 0x14, 0, AC_VERB_SET_POWER_STATE, parm); | 2933 | update_power_state(codec, 0x14, parm); |
2928 | 2934 | ||
2929 | /* outputs */ | 2935 | /* outputs */ |
2930 | /* PW0 (19h), SW1 (18h), AOW1 (11h) */ | 2936 | /* PW0 (19h), SW1 (18h), AOW1 (11h) */ |
@@ -2932,8 +2938,8 @@ static void set_widgets_power_state_vt1708B(struct hda_codec *codec) | |||
2932 | set_pin_power_state(codec, 0x19, &parm); | 2938 | set_pin_power_state(codec, 0x19, &parm); |
2933 | if (spec->smart51_enabled) | 2939 | if (spec->smart51_enabled) |
2934 | set_pin_power_state(codec, 0x1b, &parm); | 2940 | set_pin_power_state(codec, 0x1b, &parm); |
2935 | snd_hda_codec_write(codec, 0x18, 0, AC_VERB_SET_POWER_STATE, parm); | 2941 | update_power_state(codec, 0x18, parm); |
2936 | snd_hda_codec_write(codec, 0x11, 0, AC_VERB_SET_POWER_STATE, parm); | 2942 | update_power_state(codec, 0x11, parm); |
2937 | 2943 | ||
2938 | /* PW6 (22h), SW2 (26h), AOW2 (24h) */ | 2944 | /* PW6 (22h), SW2 (26h), AOW2 (24h) */ |
2939 | if (is_8ch) { | 2945 | if (is_8ch) { |
@@ -2941,20 +2947,16 @@ static void set_widgets_power_state_vt1708B(struct hda_codec *codec) | |||
2941 | set_pin_power_state(codec, 0x22, &parm); | 2947 | set_pin_power_state(codec, 0x22, &parm); |
2942 | if (spec->smart51_enabled) | 2948 | if (spec->smart51_enabled) |
2943 | set_pin_power_state(codec, 0x1a, &parm); | 2949 | set_pin_power_state(codec, 0x1a, &parm); |
2944 | snd_hda_codec_write(codec, 0x26, 0, | 2950 | update_power_state(codec, 0x26, parm); |
2945 | AC_VERB_SET_POWER_STATE, parm); | 2951 | update_power_state(codec, 0x24, parm); |
2946 | snd_hda_codec_write(codec, 0x24, 0, | ||
2947 | AC_VERB_SET_POWER_STATE, parm); | ||
2948 | } else if (codec->vendor_id == 0x11064397) { | 2952 | } else if (codec->vendor_id == 0x11064397) { |
2949 | /* PW7(23h), SW2(27h), AOW2(25h) */ | 2953 | /* PW7(23h), SW2(27h), AOW2(25h) */ |
2950 | parm = AC_PWRST_D3; | 2954 | parm = AC_PWRST_D3; |
2951 | set_pin_power_state(codec, 0x23, &parm); | 2955 | set_pin_power_state(codec, 0x23, &parm); |
2952 | if (spec->smart51_enabled) | 2956 | if (spec->smart51_enabled) |
2953 | set_pin_power_state(codec, 0x1a, &parm); | 2957 | set_pin_power_state(codec, 0x1a, &parm); |
2954 | snd_hda_codec_write(codec, 0x27, 0, | 2958 | update_power_state(codec, 0x27, parm); |
2955 | AC_VERB_SET_POWER_STATE, parm); | 2959 | update_power_state(codec, 0x25, parm); |
2956 | snd_hda_codec_write(codec, 0x25, 0, | ||
2957 | AC_VERB_SET_POWER_STATE, parm); | ||
2958 | } | 2960 | } |
2959 | 2961 | ||
2960 | /* PW 3/4/7 (1ch/1dh/23h) */ | 2962 | /* PW 3/4/7 (1ch/1dh/23h) */ |
@@ -2966,17 +2968,13 @@ static void set_widgets_power_state_vt1708B(struct hda_codec *codec) | |||
2966 | set_pin_power_state(codec, 0x23, &parm); | 2968 | set_pin_power_state(codec, 0x23, &parm); |
2967 | 2969 | ||
2968 | /* MW0 (16h), Sw3 (27h), AOW 0/3 (10h/25h) */ | 2970 | /* MW0 (16h), Sw3 (27h), AOW 0/3 (10h/25h) */ |
2969 | snd_hda_codec_write(codec, 0x16, 0, AC_VERB_SET_POWER_STATE, | 2971 | update_power_state(codec, 0x16, imux_is_smixer ? AC_PWRST_D0 : parm); |
2970 | imux_is_smixer ? AC_PWRST_D0 : parm); | 2972 | update_power_state(codec, 0x10, parm); |
2971 | snd_hda_codec_write(codec, 0x10, 0, AC_VERB_SET_POWER_STATE, parm); | ||
2972 | if (is_8ch) { | 2973 | if (is_8ch) { |
2973 | snd_hda_codec_write(codec, 0x25, 0, | 2974 | update_power_state(codec, 0x25, parm); |
2974 | AC_VERB_SET_POWER_STATE, parm); | 2975 | update_power_state(codec, 0x27, parm); |
2975 | snd_hda_codec_write(codec, 0x27, 0, | ||
2976 | AC_VERB_SET_POWER_STATE, parm); | ||
2977 | } else if (codec->vendor_id == 0x11064397 && spec->hp_independent_mode) | 2976 | } else if (codec->vendor_id == 0x11064397 && spec->hp_independent_mode) |
2978 | snd_hda_codec_write(codec, 0x25, 0, | 2977 | update_power_state(codec, 0x25, parm); |
2979 | AC_VERB_SET_POWER_STATE, parm); | ||
2980 | } | 2978 | } |
2981 | 2979 | ||
2982 | static int patch_vt1708S(struct hda_codec *codec); | 2980 | static int patch_vt1708S(struct hda_codec *codec); |
@@ -3149,10 +3147,10 @@ static void set_widgets_power_state_vt1702(struct hda_codec *codec) | |||
3149 | if (imux_is_smixer) | 3147 | if (imux_is_smixer) |
3150 | parm = AC_PWRST_D0; /* SW0 (13h) = stereo mixer (idx 3) */ | 3148 | parm = AC_PWRST_D0; /* SW0 (13h) = stereo mixer (idx 3) */ |
3151 | /* SW0 (13h), AIW 0/1/2 (12h/1fh/20h) */ | 3149 | /* SW0 (13h), AIW 0/1/2 (12h/1fh/20h) */ |
3152 | snd_hda_codec_write(codec, 0x13, 0, AC_VERB_SET_POWER_STATE, parm); | 3150 | update_power_state(codec, 0x13, parm); |
3153 | snd_hda_codec_write(codec, 0x12, 0, AC_VERB_SET_POWER_STATE, parm); | 3151 | update_power_state(codec, 0x12, parm); |
3154 | snd_hda_codec_write(codec, 0x1f, 0, AC_VERB_SET_POWER_STATE, parm); | 3152 | update_power_state(codec, 0x1f, parm); |
3155 | snd_hda_codec_write(codec, 0x20, 0, AC_VERB_SET_POWER_STATE, parm); | 3153 | update_power_state(codec, 0x20, parm); |
3156 | 3154 | ||
3157 | /* outputs */ | 3155 | /* outputs */ |
3158 | /* PW 3/4 (16h/17h) */ | 3156 | /* PW 3/4 (16h/17h) */ |
@@ -3160,10 +3158,9 @@ static void set_widgets_power_state_vt1702(struct hda_codec *codec) | |||
3160 | set_pin_power_state(codec, 0x17, &parm); | 3158 | set_pin_power_state(codec, 0x17, &parm); |
3161 | set_pin_power_state(codec, 0x16, &parm); | 3159 | set_pin_power_state(codec, 0x16, &parm); |
3162 | /* MW0 (1ah), AOW 0/1 (10h/1dh) */ | 3160 | /* MW0 (1ah), AOW 0/1 (10h/1dh) */ |
3163 | snd_hda_codec_write(codec, 0x1a, 0, AC_VERB_SET_POWER_STATE, | 3161 | update_power_state(codec, 0x1a, imux_is_smixer ? AC_PWRST_D0 : parm); |
3164 | imux_is_smixer ? AC_PWRST_D0 : parm); | 3162 | update_power_state(codec, 0x10, parm); |
3165 | snd_hda_codec_write(codec, 0x10, 0, AC_VERB_SET_POWER_STATE, parm); | 3163 | update_power_state(codec, 0x1d, parm); |
3166 | snd_hda_codec_write(codec, 0x1d, 0, AC_VERB_SET_POWER_STATE, parm); | ||
3167 | } | 3164 | } |
3168 | 3165 | ||
3169 | static int patch_vt1702(struct hda_codec *codec) | 3166 | static int patch_vt1702(struct hda_codec *codec) |
@@ -3228,52 +3225,48 @@ static void set_widgets_power_state_vt1718S(struct hda_codec *codec) | |||
3228 | if (imux_is_smixer) | 3225 | if (imux_is_smixer) |
3229 | parm = AC_PWRST_D0; | 3226 | parm = AC_PWRST_D0; |
3230 | /* MUX6/7 (1eh/1fh), AIW 0/1 (10h/11h) */ | 3227 | /* MUX6/7 (1eh/1fh), AIW 0/1 (10h/11h) */ |
3231 | snd_hda_codec_write(codec, 0x1e, 0, AC_VERB_SET_POWER_STATE, parm); | 3228 | update_power_state(codec, 0x1e, parm); |
3232 | snd_hda_codec_write(codec, 0x1f, 0, AC_VERB_SET_POWER_STATE, parm); | 3229 | update_power_state(codec, 0x1f, parm); |
3233 | snd_hda_codec_write(codec, 0x10, 0, AC_VERB_SET_POWER_STATE, parm); | 3230 | update_power_state(codec, 0x10, parm); |
3234 | snd_hda_codec_write(codec, 0x11, 0, AC_VERB_SET_POWER_STATE, parm); | 3231 | update_power_state(codec, 0x11, parm); |
3235 | 3232 | ||
3236 | /* outputs */ | 3233 | /* outputs */ |
3237 | /* PW3 (27h), MW2 (1ah), AOW3 (bh) */ | 3234 | /* PW3 (27h), MW2 (1ah), AOW3 (bh) */ |
3238 | parm = AC_PWRST_D3; | 3235 | parm = AC_PWRST_D3; |
3239 | set_pin_power_state(codec, 0x27, &parm); | 3236 | set_pin_power_state(codec, 0x27, &parm); |
3240 | snd_hda_codec_write(codec, 0x1a, 0, AC_VERB_SET_POWER_STATE, parm); | 3237 | update_power_state(codec, 0x1a, parm); |
3241 | snd_hda_codec_write(codec, 0xb, 0, AC_VERB_SET_POWER_STATE, parm); | 3238 | update_power_state(codec, 0xb, parm); |
3242 | 3239 | ||
3243 | /* PW2 (26h), AOW2 (ah) */ | 3240 | /* PW2 (26h), AOW2 (ah) */ |
3244 | parm = AC_PWRST_D3; | 3241 | parm = AC_PWRST_D3; |
3245 | set_pin_power_state(codec, 0x26, &parm); | 3242 | set_pin_power_state(codec, 0x26, &parm); |
3246 | if (spec->smart51_enabled) | 3243 | if (spec->smart51_enabled) |
3247 | set_pin_power_state(codec, 0x2b, &parm); | 3244 | set_pin_power_state(codec, 0x2b, &parm); |
3248 | snd_hda_codec_write(codec, 0xa, 0, AC_VERB_SET_POWER_STATE, parm); | 3245 | update_power_state(codec, 0xa, parm); |
3249 | 3246 | ||
3250 | /* PW0 (24h), AOW0 (8h) */ | 3247 | /* PW0 (24h), AOW0 (8h) */ |
3251 | parm = AC_PWRST_D3; | 3248 | parm = AC_PWRST_D3; |
3252 | set_pin_power_state(codec, 0x24, &parm); | 3249 | set_pin_power_state(codec, 0x24, &parm); |
3253 | if (!spec->hp_independent_mode) /* check for redirected HP */ | 3250 | if (!spec->hp_independent_mode) /* check for redirected HP */ |
3254 | set_pin_power_state(codec, 0x28, &parm); | 3251 | set_pin_power_state(codec, 0x28, &parm); |
3255 | snd_hda_codec_write(codec, 0x8, 0, AC_VERB_SET_POWER_STATE, parm); | 3252 | update_power_state(codec, 0x8, parm); |
3256 | /* MW9 (21h), Mw2 (1ah), AOW0 (8h) */ | 3253 | /* MW9 (21h), Mw2 (1ah), AOW0 (8h) */ |
3257 | snd_hda_codec_write(codec, 0x21, 0, AC_VERB_SET_POWER_STATE, | 3254 | update_power_state(codec, 0x21, imux_is_smixer ? AC_PWRST_D0 : parm); |
3258 | imux_is_smixer ? AC_PWRST_D0 : parm); | ||
3259 | 3255 | ||
3260 | /* PW1 (25h), AOW1 (9h) */ | 3256 | /* PW1 (25h), AOW1 (9h) */ |
3261 | parm = AC_PWRST_D3; | 3257 | parm = AC_PWRST_D3; |
3262 | set_pin_power_state(codec, 0x25, &parm); | 3258 | set_pin_power_state(codec, 0x25, &parm); |
3263 | if (spec->smart51_enabled) | 3259 | if (spec->smart51_enabled) |
3264 | set_pin_power_state(codec, 0x2a, &parm); | 3260 | set_pin_power_state(codec, 0x2a, &parm); |
3265 | snd_hda_codec_write(codec, 0x9, 0, AC_VERB_SET_POWER_STATE, parm); | 3261 | update_power_state(codec, 0x9, parm); |
3266 | 3262 | ||
3267 | if (spec->hp_independent_mode) { | 3263 | if (spec->hp_independent_mode) { |
3268 | /* PW4 (28h), MW3 (1bh), MUX1(34h), AOW4 (ch) */ | 3264 | /* PW4 (28h), MW3 (1bh), MUX1(34h), AOW4 (ch) */ |
3269 | parm = AC_PWRST_D3; | 3265 | parm = AC_PWRST_D3; |
3270 | set_pin_power_state(codec, 0x28, &parm); | 3266 | set_pin_power_state(codec, 0x28, &parm); |
3271 | snd_hda_codec_write(codec, 0x1b, 0, | 3267 | update_power_state(codec, 0x1b, parm); |
3272 | AC_VERB_SET_POWER_STATE, parm); | 3268 | update_power_state(codec, 0x34, parm); |
3273 | snd_hda_codec_write(codec, 0x34, 0, | 3269 | update_power_state(codec, 0xc, parm); |
3274 | AC_VERB_SET_POWER_STATE, parm); | ||
3275 | snd_hda_codec_write(codec, 0xc, 0, | ||
3276 | AC_VERB_SET_POWER_STATE, parm); | ||
3277 | } | 3270 | } |
3278 | } | 3271 | } |
3279 | 3272 | ||
@@ -3433,8 +3426,8 @@ static void set_widgets_power_state_vt1716S(struct hda_codec *codec) | |||
3433 | if (imux_is_smixer) | 3426 | if (imux_is_smixer) |
3434 | parm = AC_PWRST_D0; | 3427 | parm = AC_PWRST_D0; |
3435 | /* SW0 (17h), AIW0(13h) */ | 3428 | /* SW0 (17h), AIW0(13h) */ |
3436 | snd_hda_codec_write(codec, 0x17, 0, AC_VERB_SET_POWER_STATE, parm); | 3429 | update_power_state(codec, 0x17, parm); |
3437 | snd_hda_codec_write(codec, 0x13, 0, AC_VERB_SET_POWER_STATE, parm); | 3430 | update_power_state(codec, 0x13, parm); |
3438 | 3431 | ||
3439 | parm = AC_PWRST_D3; | 3432 | parm = AC_PWRST_D3; |
3440 | set_pin_power_state(codec, 0x1e, &parm); | 3433 | set_pin_power_state(codec, 0x1e, &parm); |
@@ -3442,12 +3435,11 @@ static void set_widgets_power_state_vt1716S(struct hda_codec *codec) | |||
3442 | if (spec->dmic_enabled) | 3435 | if (spec->dmic_enabled) |
3443 | set_pin_power_state(codec, 0x22, &parm); | 3436 | set_pin_power_state(codec, 0x22, &parm); |
3444 | else | 3437 | else |
3445 | snd_hda_codec_write(codec, 0x22, 0, | 3438 | update_power_state(codec, 0x22, AC_PWRST_D3); |
3446 | AC_VERB_SET_POWER_STATE, AC_PWRST_D3); | ||
3447 | 3439 | ||
3448 | /* SW2(26h), AIW1(14h) */ | 3440 | /* SW2(26h), AIW1(14h) */ |
3449 | snd_hda_codec_write(codec, 0x26, 0, AC_VERB_SET_POWER_STATE, parm); | 3441 | update_power_state(codec, 0x26, parm); |
3450 | snd_hda_codec_write(codec, 0x14, 0, AC_VERB_SET_POWER_STATE, parm); | 3442 | update_power_state(codec, 0x14, parm); |
3451 | 3443 | ||
3452 | /* outputs */ | 3444 | /* outputs */ |
3453 | /* PW0 (19h), SW1 (18h), AOW1 (11h) */ | 3445 | /* PW0 (19h), SW1 (18h), AOW1 (11h) */ |
@@ -3456,8 +3448,8 @@ static void set_widgets_power_state_vt1716S(struct hda_codec *codec) | |||
3456 | /* Smart 5.1 PW2(1bh) */ | 3448 | /* Smart 5.1 PW2(1bh) */ |
3457 | if (spec->smart51_enabled) | 3449 | if (spec->smart51_enabled) |
3458 | set_pin_power_state(codec, 0x1b, &parm); | 3450 | set_pin_power_state(codec, 0x1b, &parm); |
3459 | snd_hda_codec_write(codec, 0x18, 0, AC_VERB_SET_POWER_STATE, parm); | 3451 | update_power_state(codec, 0x18, parm); |
3460 | snd_hda_codec_write(codec, 0x11, 0, AC_VERB_SET_POWER_STATE, parm); | 3452 | update_power_state(codec, 0x11, parm); |
3461 | 3453 | ||
3462 | /* PW7 (23h), SW3 (27h), AOW3 (25h) */ | 3454 | /* PW7 (23h), SW3 (27h), AOW3 (25h) */ |
3463 | parm = AC_PWRST_D3; | 3455 | parm = AC_PWRST_D3; |
@@ -3465,12 +3457,12 @@ static void set_widgets_power_state_vt1716S(struct hda_codec *codec) | |||
3465 | /* Smart 5.1 PW1(1ah) */ | 3457 | /* Smart 5.1 PW1(1ah) */ |
3466 | if (spec->smart51_enabled) | 3458 | if (spec->smart51_enabled) |
3467 | set_pin_power_state(codec, 0x1a, &parm); | 3459 | set_pin_power_state(codec, 0x1a, &parm); |
3468 | snd_hda_codec_write(codec, 0x27, 0, AC_VERB_SET_POWER_STATE, parm); | 3460 | update_power_state(codec, 0x27, parm); |
3469 | 3461 | ||
3470 | /* Smart 5.1 PW5(1eh) */ | 3462 | /* Smart 5.1 PW5(1eh) */ |
3471 | if (spec->smart51_enabled) | 3463 | if (spec->smart51_enabled) |
3472 | set_pin_power_state(codec, 0x1e, &parm); | 3464 | set_pin_power_state(codec, 0x1e, &parm); |
3473 | snd_hda_codec_write(codec, 0x25, 0, AC_VERB_SET_POWER_STATE, parm); | 3465 | update_power_state(codec, 0x25, parm); |
3474 | 3466 | ||
3475 | /* Mono out */ | 3467 | /* Mono out */ |
3476 | /* SW4(28h)->MW1(29h)-> PW12 (2ah)*/ | 3468 | /* SW4(28h)->MW1(29h)-> PW12 (2ah)*/ |
@@ -3486,9 +3478,9 @@ static void set_widgets_power_state_vt1716S(struct hda_codec *codec) | |||
3486 | mono_out = 1; | 3478 | mono_out = 1; |
3487 | } | 3479 | } |
3488 | parm = mono_out ? AC_PWRST_D0 : AC_PWRST_D3; | 3480 | parm = mono_out ? AC_PWRST_D0 : AC_PWRST_D3; |
3489 | snd_hda_codec_write(codec, 0x28, 0, AC_VERB_SET_POWER_STATE, parm); | 3481 | update_power_state(codec, 0x28, parm); |
3490 | snd_hda_codec_write(codec, 0x29, 0, AC_VERB_SET_POWER_STATE, parm); | 3482 | update_power_state(codec, 0x29, parm); |
3491 | snd_hda_codec_write(codec, 0x2a, 0, AC_VERB_SET_POWER_STATE, parm); | 3483 | update_power_state(codec, 0x2a, parm); |
3492 | 3484 | ||
3493 | /* PW 3/4 (1ch/1dh) */ | 3485 | /* PW 3/4 (1ch/1dh) */ |
3494 | parm = AC_PWRST_D3; | 3486 | parm = AC_PWRST_D3; |
@@ -3496,15 +3488,12 @@ static void set_widgets_power_state_vt1716S(struct hda_codec *codec) | |||
3496 | set_pin_power_state(codec, 0x1d, &parm); | 3488 | set_pin_power_state(codec, 0x1d, &parm); |
3497 | /* HP Independent Mode, power on AOW3 */ | 3489 | /* HP Independent Mode, power on AOW3 */ |
3498 | if (spec->hp_independent_mode) | 3490 | if (spec->hp_independent_mode) |
3499 | snd_hda_codec_write(codec, 0x25, 0, | 3491 | update_power_state(codec, 0x25, parm); |
3500 | AC_VERB_SET_POWER_STATE, parm); | ||
3501 | 3492 | ||
3502 | /* force to D0 for internal Speaker */ | 3493 | /* force to D0 for internal Speaker */ |
3503 | /* MW0 (16h), AOW0 (10h) */ | 3494 | /* MW0 (16h), AOW0 (10h) */ |
3504 | snd_hda_codec_write(codec, 0x16, 0, AC_VERB_SET_POWER_STATE, | 3495 | update_power_state(codec, 0x16, imux_is_smixer ? AC_PWRST_D0 : parm); |
3505 | imux_is_smixer ? AC_PWRST_D0 : parm); | 3496 | update_power_state(codec, 0x10, mono_out ? AC_PWRST_D0 : parm); |
3506 | snd_hda_codec_write(codec, 0x10, 0, AC_VERB_SET_POWER_STATE, | ||
3507 | mono_out ? AC_PWRST_D0 : parm); | ||
3508 | } | 3497 | } |
3509 | 3498 | ||
3510 | static int patch_vt1716S(struct hda_codec *codec) | 3499 | static int patch_vt1716S(struct hda_codec *codec) |
@@ -3580,54 +3569,45 @@ static void set_widgets_power_state_vt2002P(struct hda_codec *codec) | |||
3580 | set_pin_power_state(codec, 0x2b, &parm); | 3569 | set_pin_power_state(codec, 0x2b, &parm); |
3581 | parm = AC_PWRST_D0; | 3570 | parm = AC_PWRST_D0; |
3582 | /* MUX9/10 (1eh/1fh), AIW 0/1 (10h/11h) */ | 3571 | /* MUX9/10 (1eh/1fh), AIW 0/1 (10h/11h) */ |
3583 | snd_hda_codec_write(codec, 0x1e, 0, AC_VERB_SET_POWER_STATE, parm); | 3572 | update_power_state(codec, 0x1e, parm); |
3584 | snd_hda_codec_write(codec, 0x1f, 0, AC_VERB_SET_POWER_STATE, parm); | 3573 | update_power_state(codec, 0x1f, parm); |
3585 | snd_hda_codec_write(codec, 0x10, 0, AC_VERB_SET_POWER_STATE, parm); | 3574 | update_power_state(codec, 0x10, parm); |
3586 | snd_hda_codec_write(codec, 0x11, 0, AC_VERB_SET_POWER_STATE, parm); | 3575 | update_power_state(codec, 0x11, parm); |
3587 | 3576 | ||
3588 | /* outputs */ | 3577 | /* outputs */ |
3589 | /* AOW0 (8h)*/ | 3578 | /* AOW0 (8h)*/ |
3590 | snd_hda_codec_write(codec, 0x8, 0, AC_VERB_SET_POWER_STATE, parm); | 3579 | update_power_state(codec, 0x8, parm); |
3591 | 3580 | ||
3592 | if (spec->codec_type == VT1802) { | 3581 | if (spec->codec_type == VT1802) { |
3593 | /* PW4 (28h), MW4 (18h), MUX4(38h) */ | 3582 | /* PW4 (28h), MW4 (18h), MUX4(38h) */ |
3594 | parm = AC_PWRST_D3; | 3583 | parm = AC_PWRST_D3; |
3595 | set_pin_power_state(codec, 0x28, &parm); | 3584 | set_pin_power_state(codec, 0x28, &parm); |
3596 | snd_hda_codec_write(codec, 0x18, 0, | 3585 | update_power_state(codec, 0x18, parm); |
3597 | AC_VERB_SET_POWER_STATE, parm); | 3586 | update_power_state(codec, 0x38, parm); |
3598 | snd_hda_codec_write(codec, 0x38, 0, | ||
3599 | AC_VERB_SET_POWER_STATE, parm); | ||
3600 | } else { | 3587 | } else { |
3601 | /* PW4 (26h), MW4 (1ch), MUX4(37h) */ | 3588 | /* PW4 (26h), MW4 (1ch), MUX4(37h) */ |
3602 | parm = AC_PWRST_D3; | 3589 | parm = AC_PWRST_D3; |
3603 | set_pin_power_state(codec, 0x26, &parm); | 3590 | set_pin_power_state(codec, 0x26, &parm); |
3604 | snd_hda_codec_write(codec, 0x1c, 0, | 3591 | update_power_state(codec, 0x1c, parm); |
3605 | AC_VERB_SET_POWER_STATE, parm); | 3592 | update_power_state(codec, 0x37, parm); |
3606 | snd_hda_codec_write(codec, 0x37, 0, | ||
3607 | AC_VERB_SET_POWER_STATE, parm); | ||
3608 | } | 3593 | } |
3609 | 3594 | ||
3610 | if (spec->codec_type == VT1802) { | 3595 | if (spec->codec_type == VT1802) { |
3611 | /* PW1 (25h), MW1 (15h), MUX1(35h), AOW1 (9h) */ | 3596 | /* PW1 (25h), MW1 (15h), MUX1(35h), AOW1 (9h) */ |
3612 | parm = AC_PWRST_D3; | 3597 | parm = AC_PWRST_D3; |
3613 | set_pin_power_state(codec, 0x25, &parm); | 3598 | set_pin_power_state(codec, 0x25, &parm); |
3614 | snd_hda_codec_write(codec, 0x15, 0, | 3599 | update_power_state(codec, 0x15, parm); |
3615 | AC_VERB_SET_POWER_STATE, parm); | 3600 | update_power_state(codec, 0x35, parm); |
3616 | snd_hda_codec_write(codec, 0x35, 0, | ||
3617 | AC_VERB_SET_POWER_STATE, parm); | ||
3618 | } else { | 3601 | } else { |
3619 | /* PW1 (25h), MW1 (19h), MUX1(35h), AOW1 (9h) */ | 3602 | /* PW1 (25h), MW1 (19h), MUX1(35h), AOW1 (9h) */ |
3620 | parm = AC_PWRST_D3; | 3603 | parm = AC_PWRST_D3; |
3621 | set_pin_power_state(codec, 0x25, &parm); | 3604 | set_pin_power_state(codec, 0x25, &parm); |
3622 | snd_hda_codec_write(codec, 0x19, 0, | 3605 | update_power_state(codec, 0x19, parm); |
3623 | AC_VERB_SET_POWER_STATE, parm); | 3606 | update_power_state(codec, 0x35, parm); |
3624 | snd_hda_codec_write(codec, 0x35, 0, | ||
3625 | AC_VERB_SET_POWER_STATE, parm); | ||
3626 | } | 3607 | } |
3627 | 3608 | ||
3628 | if (spec->hp_independent_mode) | 3609 | if (spec->hp_independent_mode) |
3629 | snd_hda_codec_write(codec, 0x9, 0, | 3610 | update_power_state(codec, 0x9, AC_PWRST_D0); |
3630 | AC_VERB_SET_POWER_STATE, AC_PWRST_D0); | ||
3631 | 3611 | ||
3632 | /* Class-D */ | 3612 | /* Class-D */ |
3633 | /* PW0 (24h), MW0(18h/14h), MUX0(34h) */ | 3613 | /* PW0 (24h), MW0(18h/14h), MUX0(34h) */ |
@@ -3637,12 +3617,10 @@ static void set_widgets_power_state_vt2002P(struct hda_codec *codec) | |||
3637 | set_pin_power_state(codec, 0x24, &parm); | 3617 | set_pin_power_state(codec, 0x24, &parm); |
3638 | parm = present ? AC_PWRST_D3 : AC_PWRST_D0; | 3618 | parm = present ? AC_PWRST_D3 : AC_PWRST_D0; |
3639 | if (spec->codec_type == VT1802) | 3619 | if (spec->codec_type == VT1802) |
3640 | snd_hda_codec_write(codec, 0x14, 0, | 3620 | update_power_state(codec, 0x14, parm); |
3641 | AC_VERB_SET_POWER_STATE, parm); | ||
3642 | else | 3621 | else |
3643 | snd_hda_codec_write(codec, 0x18, 0, | 3622 | update_power_state(codec, 0x18, parm); |
3644 | AC_VERB_SET_POWER_STATE, parm); | 3623 | update_power_state(codec, 0x34, parm); |
3645 | snd_hda_codec_write(codec, 0x34, 0, AC_VERB_SET_POWER_STATE, parm); | ||
3646 | 3624 | ||
3647 | /* Mono Out */ | 3625 | /* Mono Out */ |
3648 | present = snd_hda_jack_detect(codec, 0x26); | 3626 | present = snd_hda_jack_detect(codec, 0x26); |
@@ -3650,28 +3628,20 @@ static void set_widgets_power_state_vt2002P(struct hda_codec *codec) | |||
3650 | parm = present ? AC_PWRST_D3 : AC_PWRST_D0; | 3628 | parm = present ? AC_PWRST_D3 : AC_PWRST_D0; |
3651 | if (spec->codec_type == VT1802) { | 3629 | if (spec->codec_type == VT1802) { |
3652 | /* PW15 (33h), MW8(1ch), MUX8(3ch) */ | 3630 | /* PW15 (33h), MW8(1ch), MUX8(3ch) */ |
3653 | snd_hda_codec_write(codec, 0x33, 0, | 3631 | update_power_state(codec, 0x33, parm); |
3654 | AC_VERB_SET_POWER_STATE, parm); | 3632 | update_power_state(codec, 0x1c, parm); |
3655 | snd_hda_codec_write(codec, 0x1c, 0, | 3633 | update_power_state(codec, 0x3c, parm); |
3656 | AC_VERB_SET_POWER_STATE, parm); | ||
3657 | snd_hda_codec_write(codec, 0x3c, 0, | ||
3658 | AC_VERB_SET_POWER_STATE, parm); | ||
3659 | } else { | 3634 | } else { |
3660 | /* PW15 (31h), MW8(17h), MUX8(3bh) */ | 3635 | /* PW15 (31h), MW8(17h), MUX8(3bh) */ |
3661 | snd_hda_codec_write(codec, 0x31, 0, | 3636 | update_power_state(codec, 0x31, parm); |
3662 | AC_VERB_SET_POWER_STATE, parm); | 3637 | update_power_state(codec, 0x17, parm); |
3663 | snd_hda_codec_write(codec, 0x17, 0, | 3638 | update_power_state(codec, 0x3b, parm); |
3664 | AC_VERB_SET_POWER_STATE, parm); | ||
3665 | snd_hda_codec_write(codec, 0x3b, 0, | ||
3666 | AC_VERB_SET_POWER_STATE, parm); | ||
3667 | } | 3639 | } |
3668 | /* MW9 (21h) */ | 3640 | /* MW9 (21h) */ |
3669 | if (imux_is_smixer || !is_aa_path_mute(codec)) | 3641 | if (imux_is_smixer || !is_aa_path_mute(codec)) |
3670 | snd_hda_codec_write(codec, 0x21, 0, | 3642 | update_power_state(codec, 0x21, AC_PWRST_D0); |
3671 | AC_VERB_SET_POWER_STATE, AC_PWRST_D0); | ||
3672 | else | 3643 | else |
3673 | snd_hda_codec_write(codec, 0x21, 0, | 3644 | update_power_state(codec, 0x21, AC_PWRST_D3); |
3674 | AC_VERB_SET_POWER_STATE, AC_PWRST_D3); | ||
3675 | } | 3645 | } |
3676 | 3646 | ||
3677 | /* patch for vt2002P */ | 3647 | /* patch for vt2002P */ |
@@ -3731,30 +3701,28 @@ static void set_widgets_power_state_vt1812(struct hda_codec *codec) | |||
3731 | set_pin_power_state(codec, 0x2b, &parm); | 3701 | set_pin_power_state(codec, 0x2b, &parm); |
3732 | parm = AC_PWRST_D0; | 3702 | parm = AC_PWRST_D0; |
3733 | /* MUX10/11 (1eh/1fh), AIW 0/1 (10h/11h) */ | 3703 | /* MUX10/11 (1eh/1fh), AIW 0/1 (10h/11h) */ |
3734 | snd_hda_codec_write(codec, 0x1e, 0, AC_VERB_SET_POWER_STATE, parm); | 3704 | update_power_state(codec, 0x1e, parm); |
3735 | snd_hda_codec_write(codec, 0x1f, 0, AC_VERB_SET_POWER_STATE, parm); | 3705 | update_power_state(codec, 0x1f, parm); |
3736 | snd_hda_codec_write(codec, 0x10, 0, AC_VERB_SET_POWER_STATE, parm); | 3706 | update_power_state(codec, 0x10, parm); |
3737 | snd_hda_codec_write(codec, 0x11, 0, AC_VERB_SET_POWER_STATE, parm); | 3707 | update_power_state(codec, 0x11, parm); |
3738 | 3708 | ||
3739 | /* outputs */ | 3709 | /* outputs */ |
3740 | /* AOW0 (8h)*/ | 3710 | /* AOW0 (8h)*/ |
3741 | snd_hda_codec_write(codec, 0x8, 0, | 3711 | update_power_state(codec, 0x8, AC_PWRST_D0); |
3742 | AC_VERB_SET_POWER_STATE, AC_PWRST_D0); | ||
3743 | 3712 | ||
3744 | /* PW4 (28h), MW4 (18h), MUX4(38h) */ | 3713 | /* PW4 (28h), MW4 (18h), MUX4(38h) */ |
3745 | parm = AC_PWRST_D3; | 3714 | parm = AC_PWRST_D3; |
3746 | set_pin_power_state(codec, 0x28, &parm); | 3715 | set_pin_power_state(codec, 0x28, &parm); |
3747 | snd_hda_codec_write(codec, 0x18, 0, AC_VERB_SET_POWER_STATE, parm); | 3716 | update_power_state(codec, 0x18, parm); |
3748 | snd_hda_codec_write(codec, 0x38, 0, AC_VERB_SET_POWER_STATE, parm); | 3717 | update_power_state(codec, 0x38, parm); |
3749 | 3718 | ||
3750 | /* PW1 (25h), MW1 (15h), MUX1(35h), AOW1 (9h) */ | 3719 | /* PW1 (25h), MW1 (15h), MUX1(35h), AOW1 (9h) */ |
3751 | parm = AC_PWRST_D3; | 3720 | parm = AC_PWRST_D3; |
3752 | set_pin_power_state(codec, 0x25, &parm); | 3721 | set_pin_power_state(codec, 0x25, &parm); |
3753 | snd_hda_codec_write(codec, 0x15, 0, AC_VERB_SET_POWER_STATE, parm); | 3722 | update_power_state(codec, 0x15, parm); |
3754 | snd_hda_codec_write(codec, 0x35, 0, AC_VERB_SET_POWER_STATE, parm); | 3723 | update_power_state(codec, 0x35, parm); |
3755 | if (spec->hp_independent_mode) | 3724 | if (spec->hp_independent_mode) |
3756 | snd_hda_codec_write(codec, 0x9, 0, | 3725 | update_power_state(codec, 0x9, AC_PWRST_D0); |
3757 | AC_VERB_SET_POWER_STATE, AC_PWRST_D0); | ||
3758 | 3726 | ||
3759 | /* Internal Speaker */ | 3727 | /* Internal Speaker */ |
3760 | /* PW0 (24h), MW0(14h), MUX0(34h) */ | 3728 | /* PW0 (24h), MW0(14h), MUX0(34h) */ |
@@ -3763,15 +3731,11 @@ static void set_widgets_power_state_vt1812(struct hda_codec *codec) | |||
3763 | parm = AC_PWRST_D3; | 3731 | parm = AC_PWRST_D3; |
3764 | set_pin_power_state(codec, 0x24, &parm); | 3732 | set_pin_power_state(codec, 0x24, &parm); |
3765 | if (present) { | 3733 | if (present) { |
3766 | snd_hda_codec_write(codec, 0x14, 0, | 3734 | update_power_state(codec, 0x14, AC_PWRST_D3); |
3767 | AC_VERB_SET_POWER_STATE, AC_PWRST_D3); | 3735 | update_power_state(codec, 0x34, AC_PWRST_D3); |
3768 | snd_hda_codec_write(codec, 0x34, 0, | ||
3769 | AC_VERB_SET_POWER_STATE, AC_PWRST_D3); | ||
3770 | } else { | 3736 | } else { |
3771 | snd_hda_codec_write(codec, 0x14, 0, | 3737 | update_power_state(codec, 0x14, AC_PWRST_D0); |
3772 | AC_VERB_SET_POWER_STATE, AC_PWRST_D0); | 3738 | update_power_state(codec, 0x34, AC_PWRST_D0); |
3773 | snd_hda_codec_write(codec, 0x34, 0, | ||
3774 | AC_VERB_SET_POWER_STATE, AC_PWRST_D0); | ||
3775 | } | 3739 | } |
3776 | 3740 | ||
3777 | 3741 | ||
@@ -3782,26 +3746,20 @@ static void set_widgets_power_state_vt1812(struct hda_codec *codec) | |||
3782 | parm = AC_PWRST_D3; | 3746 | parm = AC_PWRST_D3; |
3783 | set_pin_power_state(codec, 0x31, &parm); | 3747 | set_pin_power_state(codec, 0x31, &parm); |
3784 | if (present) { | 3748 | if (present) { |
3785 | snd_hda_codec_write(codec, 0x1c, 0, | 3749 | update_power_state(codec, 0x1c, AC_PWRST_D3); |
3786 | AC_VERB_SET_POWER_STATE, AC_PWRST_D3); | 3750 | update_power_state(codec, 0x3c, AC_PWRST_D3); |
3787 | snd_hda_codec_write(codec, 0x3c, 0, | 3751 | update_power_state(codec, 0x3e, AC_PWRST_D3); |
3788 | AC_VERB_SET_POWER_STATE, AC_PWRST_D3); | ||
3789 | snd_hda_codec_write(codec, 0x3e, 0, | ||
3790 | AC_VERB_SET_POWER_STATE, AC_PWRST_D3); | ||
3791 | } else { | 3752 | } else { |
3792 | snd_hda_codec_write(codec, 0x1c, 0, | 3753 | update_power_state(codec, 0x1c, AC_PWRST_D0); |
3793 | AC_VERB_SET_POWER_STATE, AC_PWRST_D0); | 3754 | update_power_state(codec, 0x3c, AC_PWRST_D0); |
3794 | snd_hda_codec_write(codec, 0x3c, 0, | 3755 | update_power_state(codec, 0x3e, AC_PWRST_D0); |
3795 | AC_VERB_SET_POWER_STATE, AC_PWRST_D0); | ||
3796 | snd_hda_codec_write(codec, 0x3e, 0, | ||
3797 | AC_VERB_SET_POWER_STATE, AC_PWRST_D0); | ||
3798 | } | 3756 | } |
3799 | 3757 | ||
3800 | /* PW15 (33h), MW15 (1dh), MUX15(3dh) */ | 3758 | /* PW15 (33h), MW15 (1dh), MUX15(3dh) */ |
3801 | parm = AC_PWRST_D3; | 3759 | parm = AC_PWRST_D3; |
3802 | set_pin_power_state(codec, 0x33, &parm); | 3760 | set_pin_power_state(codec, 0x33, &parm); |
3803 | snd_hda_codec_write(codec, 0x1d, 0, AC_VERB_SET_POWER_STATE, parm); | 3761 | update_power_state(codec, 0x1d, parm); |
3804 | snd_hda_codec_write(codec, 0x3d, 0, AC_VERB_SET_POWER_STATE, parm); | 3762 | update_power_state(codec, 0x3d, parm); |
3805 | 3763 | ||
3806 | } | 3764 | } |
3807 | 3765 | ||