diff options
author | Takashi Iwai <tiwai@suse.de> | 2014-02-25 06:21:03 -0500 |
---|---|---|
committer | Takashi Iwai <tiwai@suse.de> | 2014-02-25 06:27:32 -0500 |
commit | 4e76a8833fac8dc1735aa5be7d1b3c92c65e209e (patch) | |
tree | 69978ef2eca15fcfc79e42e467be616262d1ff89 /sound/pci/hda/patch_ca0132.c | |
parent | b989d0444bd4999f9130d262b5ab7123d4077df8 (diff) |
ALSA: hda - Replace with standard printk
Use dev_err() and co for messages from HD-audio controller and codec
drivers. The codec drivers are mostly bound with codec objects, so
some helper macros, codec_err(), codec_info(), etc, are provided.
They merely wrap the corresponding dev_xxx().
There are a few places still calling snd_printk() and its variants
as they are called without the codec or device context.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'sound/pci/hda/patch_ca0132.c')
-rw-r--r-- | sound/pci/hda/patch_ca0132.c | 208 |
1 files changed, 103 insertions, 105 deletions
diff --git a/sound/pci/hda/patch_ca0132.c b/sound/pci/hda/patch_ca0132.c index c7ea40f28ecc..092f2bd030bd 100644 --- a/sound/pci/hda/patch_ca0132.c +++ b/sound/pci/hda/patch_ca0132.c | |||
@@ -867,7 +867,7 @@ static int chipio_write_data_multiple(struct hda_codec *codec, | |||
867 | int status = 0; | 867 | int status = 0; |
868 | 868 | ||
869 | if (data == NULL) { | 869 | if (data == NULL) { |
870 | snd_printdd(KERN_ERR "chipio_write_data null ptr\n"); | 870 | codec_dbg(codec, "chipio_write_data null ptr\n"); |
871 | return -EINVAL; | 871 | return -EINVAL; |
872 | } | 872 | } |
873 | 873 | ||
@@ -1406,12 +1406,12 @@ static int dspio_scp(struct hda_codec *codec, | |||
1406 | return -EINVAL; | 1406 | return -EINVAL; |
1407 | 1407 | ||
1408 | if (dir == SCP_GET && reply == NULL) { | 1408 | if (dir == SCP_GET && reply == NULL) { |
1409 | snd_printdd(KERN_ERR "dspio_scp get but has no buffer\n"); | 1409 | codec_dbg(codec, "dspio_scp get but has no buffer\n"); |
1410 | return -EINVAL; | 1410 | return -EINVAL; |
1411 | } | 1411 | } |
1412 | 1412 | ||
1413 | if (reply != NULL && (reply_len == NULL || (*reply_len == 0))) { | 1413 | if (reply != NULL && (reply_len == NULL || (*reply_len == 0))) { |
1414 | snd_printdd(KERN_ERR "dspio_scp bad resp buf len parms\n"); | 1414 | codec_dbg(codec, "dspio_scp bad resp buf len parms\n"); |
1415 | return -EINVAL; | 1415 | return -EINVAL; |
1416 | } | 1416 | } |
1417 | 1417 | ||
@@ -1429,7 +1429,7 @@ static int dspio_scp(struct hda_codec *codec, | |||
1429 | sizeof(scp_reply), &ret_bytes); | 1429 | sizeof(scp_reply), &ret_bytes); |
1430 | 1430 | ||
1431 | if (status < 0) { | 1431 | if (status < 0) { |
1432 | snd_printdd(KERN_ERR "dspio_scp: send scp msg failed\n"); | 1432 | codec_dbg(codec, "dspio_scp: send scp msg failed\n"); |
1433 | return status; | 1433 | return status; |
1434 | } | 1434 | } |
1435 | 1435 | ||
@@ -1448,17 +1448,17 @@ static int dspio_scp(struct hda_codec *codec, | |||
1448 | / sizeof(unsigned int); | 1448 | / sizeof(unsigned int); |
1449 | 1449 | ||
1450 | if (*reply_len < ret_size*sizeof(unsigned int)) { | 1450 | if (*reply_len < ret_size*sizeof(unsigned int)) { |
1451 | snd_printdd(KERN_ERR "reply too long for buf\n"); | 1451 | codec_dbg(codec, "reply too long for buf\n"); |
1452 | return -EINVAL; | 1452 | return -EINVAL; |
1453 | } else if (ret_size != reply_data_size) { | 1453 | } else if (ret_size != reply_data_size) { |
1454 | snd_printdd(KERN_ERR "RetLen and HdrLen .NE.\n"); | 1454 | codec_dbg(codec, "RetLen and HdrLen .NE.\n"); |
1455 | return -EINVAL; | 1455 | return -EINVAL; |
1456 | } else { | 1456 | } else { |
1457 | *reply_len = ret_size*sizeof(unsigned int); | 1457 | *reply_len = ret_size*sizeof(unsigned int); |
1458 | memcpy(reply, scp_reply.data, *reply_len); | 1458 | memcpy(reply, scp_reply.data, *reply_len); |
1459 | } | 1459 | } |
1460 | } else { | 1460 | } else { |
1461 | snd_printdd(KERN_ERR "reply ill-formed or errflag set\n"); | 1461 | codec_dbg(codec, "reply ill-formed or errflag set\n"); |
1462 | return -EIO; | 1462 | return -EIO; |
1463 | } | 1463 | } |
1464 | 1464 | ||
@@ -1488,22 +1488,22 @@ static int dspio_alloc_dma_chan(struct hda_codec *codec, unsigned int *dma_chan) | |||
1488 | int status = 0; | 1488 | int status = 0; |
1489 | unsigned int size = sizeof(dma_chan); | 1489 | unsigned int size = sizeof(dma_chan); |
1490 | 1490 | ||
1491 | snd_printdd(KERN_INFO " dspio_alloc_dma_chan() -- begin\n"); | 1491 | codec_dbg(codec, " dspio_alloc_dma_chan() -- begin\n"); |
1492 | status = dspio_scp(codec, MASTERCONTROL, MASTERCONTROL_ALLOC_DMA_CHAN, | 1492 | status = dspio_scp(codec, MASTERCONTROL, MASTERCONTROL_ALLOC_DMA_CHAN, |
1493 | SCP_GET, NULL, 0, dma_chan, &size); | 1493 | SCP_GET, NULL, 0, dma_chan, &size); |
1494 | 1494 | ||
1495 | if (status < 0) { | 1495 | if (status < 0) { |
1496 | snd_printdd(KERN_INFO "dspio_alloc_dma_chan: SCP Failed\n"); | 1496 | codec_dbg(codec, "dspio_alloc_dma_chan: SCP Failed\n"); |
1497 | return status; | 1497 | return status; |
1498 | } | 1498 | } |
1499 | 1499 | ||
1500 | if ((*dma_chan + 1) == 0) { | 1500 | if ((*dma_chan + 1) == 0) { |
1501 | snd_printdd(KERN_INFO "no free dma channels to allocate\n"); | 1501 | codec_dbg(codec, "no free dma channels to allocate\n"); |
1502 | return -EBUSY; | 1502 | return -EBUSY; |
1503 | } | 1503 | } |
1504 | 1504 | ||
1505 | snd_printdd("dspio_alloc_dma_chan: chan=%d\n", *dma_chan); | 1505 | codec_dbg(codec, "dspio_alloc_dma_chan: chan=%d\n", *dma_chan); |
1506 | snd_printdd(KERN_INFO " dspio_alloc_dma_chan() -- complete\n"); | 1506 | codec_dbg(codec, " dspio_alloc_dma_chan() -- complete\n"); |
1507 | 1507 | ||
1508 | return status; | 1508 | return status; |
1509 | } | 1509 | } |
@@ -1516,18 +1516,18 @@ static int dspio_free_dma_chan(struct hda_codec *codec, unsigned int dma_chan) | |||
1516 | int status = 0; | 1516 | int status = 0; |
1517 | unsigned int dummy = 0; | 1517 | unsigned int dummy = 0; |
1518 | 1518 | ||
1519 | snd_printdd(KERN_INFO " dspio_free_dma_chan() -- begin\n"); | 1519 | codec_dbg(codec, " dspio_free_dma_chan() -- begin\n"); |
1520 | snd_printdd("dspio_free_dma_chan: chan=%d\n", dma_chan); | 1520 | codec_dbg(codec, "dspio_free_dma_chan: chan=%d\n", dma_chan); |
1521 | 1521 | ||
1522 | status = dspio_scp(codec, MASTERCONTROL, MASTERCONTROL_ALLOC_DMA_CHAN, | 1522 | status = dspio_scp(codec, MASTERCONTROL, MASTERCONTROL_ALLOC_DMA_CHAN, |
1523 | SCP_SET, &dma_chan, sizeof(dma_chan), NULL, &dummy); | 1523 | SCP_SET, &dma_chan, sizeof(dma_chan), NULL, &dummy); |
1524 | 1524 | ||
1525 | if (status < 0) { | 1525 | if (status < 0) { |
1526 | snd_printdd(KERN_INFO "dspio_free_dma_chan: SCP Failed\n"); | 1526 | codec_dbg(codec, "dspio_free_dma_chan: SCP Failed\n"); |
1527 | return status; | 1527 | return status; |
1528 | } | 1528 | } |
1529 | 1529 | ||
1530 | snd_printdd(KERN_INFO " dspio_free_dma_chan() -- complete\n"); | 1530 | codec_dbg(codec, " dspio_free_dma_chan() -- complete\n"); |
1531 | 1531 | ||
1532 | return status; | 1532 | return status; |
1533 | } | 1533 | } |
@@ -1575,14 +1575,14 @@ static int dsp_reset(struct hda_codec *codec) | |||
1575 | unsigned int res; | 1575 | unsigned int res; |
1576 | int retry = 20; | 1576 | int retry = 20; |
1577 | 1577 | ||
1578 | snd_printdd("dsp_reset\n"); | 1578 | codec_dbg(codec, "dsp_reset\n"); |
1579 | do { | 1579 | do { |
1580 | res = dspio_send(codec, VENDOR_DSPIO_DSP_INIT, 0); | 1580 | res = dspio_send(codec, VENDOR_DSPIO_DSP_INIT, 0); |
1581 | retry--; | 1581 | retry--; |
1582 | } while (res == -EIO && retry); | 1582 | } while (res == -EIO && retry); |
1583 | 1583 | ||
1584 | if (!retry) { | 1584 | if (!retry) { |
1585 | snd_printdd("dsp_reset timeout\n"); | 1585 | codec_dbg(codec, "dsp_reset timeout\n"); |
1586 | return -EIO; | 1586 | return -EIO; |
1587 | } | 1587 | } |
1588 | 1588 | ||
@@ -1635,39 +1635,39 @@ static int dsp_dma_setup_common(struct hda_codec *codec, | |||
1635 | unsigned int active; | 1635 | unsigned int active; |
1636 | bool code, yram; | 1636 | bool code, yram; |
1637 | 1637 | ||
1638 | snd_printdd(KERN_INFO "-- dsp_dma_setup_common() -- Begin ---------\n"); | 1638 | codec_dbg(codec, "-- dsp_dma_setup_common() -- Begin ---------\n"); |
1639 | 1639 | ||
1640 | if (dma_chan >= DSPDMAC_DMA_CFG_CHANNEL_COUNT) { | 1640 | if (dma_chan >= DSPDMAC_DMA_CFG_CHANNEL_COUNT) { |
1641 | snd_printdd(KERN_ERR "dma chan num invalid\n"); | 1641 | codec_dbg(codec, "dma chan num invalid\n"); |
1642 | return -EINVAL; | 1642 | return -EINVAL; |
1643 | } | 1643 | } |
1644 | 1644 | ||
1645 | if (dsp_is_dma_active(codec, dma_chan)) { | 1645 | if (dsp_is_dma_active(codec, dma_chan)) { |
1646 | snd_printdd(KERN_ERR "dma already active\n"); | 1646 | codec_dbg(codec, "dma already active\n"); |
1647 | return -EBUSY; | 1647 | return -EBUSY; |
1648 | } | 1648 | } |
1649 | 1649 | ||
1650 | dsp_addx = dsp_chip_to_dsp_addx(chip_addx, &code, &yram); | 1650 | dsp_addx = dsp_chip_to_dsp_addx(chip_addx, &code, &yram); |
1651 | 1651 | ||
1652 | if (dsp_addx == INVALID_CHIP_ADDRESS) { | 1652 | if (dsp_addx == INVALID_CHIP_ADDRESS) { |
1653 | snd_printdd(KERN_ERR "invalid chip addr\n"); | 1653 | codec_dbg(codec, "invalid chip addr\n"); |
1654 | return -ENXIO; | 1654 | return -ENXIO; |
1655 | } | 1655 | } |
1656 | 1656 | ||
1657 | chnl_prop = DSPDMAC_CHNLPROP_AC_MASK; | 1657 | chnl_prop = DSPDMAC_CHNLPROP_AC_MASK; |
1658 | active = 0; | 1658 | active = 0; |
1659 | 1659 | ||
1660 | snd_printdd(KERN_INFO " dsp_dma_setup_common() start reg pgm\n"); | 1660 | codec_dbg(codec, " dsp_dma_setup_common() start reg pgm\n"); |
1661 | 1661 | ||
1662 | if (ovly) { | 1662 | if (ovly) { |
1663 | status = chipio_read(codec, DSPDMAC_CHNLPROP_INST_OFFSET, | 1663 | status = chipio_read(codec, DSPDMAC_CHNLPROP_INST_OFFSET, |
1664 | &chnl_prop); | 1664 | &chnl_prop); |
1665 | 1665 | ||
1666 | if (status < 0) { | 1666 | if (status < 0) { |
1667 | snd_printdd(KERN_ERR "read CHNLPROP Reg fail\n"); | 1667 | codec_dbg(codec, "read CHNLPROP Reg fail\n"); |
1668 | return status; | 1668 | return status; |
1669 | } | 1669 | } |
1670 | snd_printdd(KERN_INFO "dsp_dma_setup_common() Read CHNLPROP\n"); | 1670 | codec_dbg(codec, "dsp_dma_setup_common() Read CHNLPROP\n"); |
1671 | } | 1671 | } |
1672 | 1672 | ||
1673 | if (!code) | 1673 | if (!code) |
@@ -1679,20 +1679,20 @@ static int dsp_dma_setup_common(struct hda_codec *codec, | |||
1679 | 1679 | ||
1680 | status = chipio_write(codec, DSPDMAC_CHNLPROP_INST_OFFSET, chnl_prop); | 1680 | status = chipio_write(codec, DSPDMAC_CHNLPROP_INST_OFFSET, chnl_prop); |
1681 | if (status < 0) { | 1681 | if (status < 0) { |
1682 | snd_printdd(KERN_ERR "write CHNLPROP Reg fail\n"); | 1682 | codec_dbg(codec, "write CHNLPROP Reg fail\n"); |
1683 | return status; | 1683 | return status; |
1684 | } | 1684 | } |
1685 | snd_printdd(KERN_INFO " dsp_dma_setup_common() Write CHNLPROP\n"); | 1685 | codec_dbg(codec, " dsp_dma_setup_common() Write CHNLPROP\n"); |
1686 | 1686 | ||
1687 | if (ovly) { | 1687 | if (ovly) { |
1688 | status = chipio_read(codec, DSPDMAC_ACTIVE_INST_OFFSET, | 1688 | status = chipio_read(codec, DSPDMAC_ACTIVE_INST_OFFSET, |
1689 | &active); | 1689 | &active); |
1690 | 1690 | ||
1691 | if (status < 0) { | 1691 | if (status < 0) { |
1692 | snd_printdd(KERN_ERR "read ACTIVE Reg fail\n"); | 1692 | codec_dbg(codec, "read ACTIVE Reg fail\n"); |
1693 | return status; | 1693 | return status; |
1694 | } | 1694 | } |
1695 | snd_printdd(KERN_INFO "dsp_dma_setup_common() Read ACTIVE\n"); | 1695 | codec_dbg(codec, "dsp_dma_setup_common() Read ACTIVE\n"); |
1696 | } | 1696 | } |
1697 | 1697 | ||
1698 | active &= (~(1 << (DSPDMAC_ACTIVE_AAR_LOBIT + dma_chan))) & | 1698 | active &= (~(1 << (DSPDMAC_ACTIVE_AAR_LOBIT + dma_chan))) & |
@@ -1700,35 +1700,35 @@ static int dsp_dma_setup_common(struct hda_codec *codec, | |||
1700 | 1700 | ||
1701 | status = chipio_write(codec, DSPDMAC_ACTIVE_INST_OFFSET, active); | 1701 | status = chipio_write(codec, DSPDMAC_ACTIVE_INST_OFFSET, active); |
1702 | if (status < 0) { | 1702 | if (status < 0) { |
1703 | snd_printdd(KERN_ERR "write ACTIVE Reg fail\n"); | 1703 | codec_dbg(codec, "write ACTIVE Reg fail\n"); |
1704 | return status; | 1704 | return status; |
1705 | } | 1705 | } |
1706 | 1706 | ||
1707 | snd_printdd(KERN_INFO " dsp_dma_setup_common() Write ACTIVE\n"); | 1707 | codec_dbg(codec, " dsp_dma_setup_common() Write ACTIVE\n"); |
1708 | 1708 | ||
1709 | status = chipio_write(codec, DSPDMAC_AUDCHSEL_INST_OFFSET(dma_chan), | 1709 | status = chipio_write(codec, DSPDMAC_AUDCHSEL_INST_OFFSET(dma_chan), |
1710 | port_map_mask); | 1710 | port_map_mask); |
1711 | if (status < 0) { | 1711 | if (status < 0) { |
1712 | snd_printdd(KERN_ERR "write AUDCHSEL Reg fail\n"); | 1712 | codec_dbg(codec, "write AUDCHSEL Reg fail\n"); |
1713 | return status; | 1713 | return status; |
1714 | } | 1714 | } |
1715 | snd_printdd(KERN_INFO " dsp_dma_setup_common() Write AUDCHSEL\n"); | 1715 | codec_dbg(codec, " dsp_dma_setup_common() Write AUDCHSEL\n"); |
1716 | 1716 | ||
1717 | status = chipio_write(codec, DSPDMAC_IRQCNT_INST_OFFSET(dma_chan), | 1717 | status = chipio_write(codec, DSPDMAC_IRQCNT_INST_OFFSET(dma_chan), |
1718 | DSPDMAC_IRQCNT_BICNT_MASK | DSPDMAC_IRQCNT_CICNT_MASK); | 1718 | DSPDMAC_IRQCNT_BICNT_MASK | DSPDMAC_IRQCNT_CICNT_MASK); |
1719 | if (status < 0) { | 1719 | if (status < 0) { |
1720 | snd_printdd(KERN_ERR "write IRQCNT Reg fail\n"); | 1720 | codec_dbg(codec, "write IRQCNT Reg fail\n"); |
1721 | return status; | 1721 | return status; |
1722 | } | 1722 | } |
1723 | snd_printdd(KERN_INFO " dsp_dma_setup_common() Write IRQCNT\n"); | 1723 | codec_dbg(codec, " dsp_dma_setup_common() Write IRQCNT\n"); |
1724 | 1724 | ||
1725 | snd_printdd( | 1725 | codec_dbg(codec, |
1726 | "ChipA=0x%x,DspA=0x%x,dmaCh=%u, " | 1726 | "ChipA=0x%x,DspA=0x%x,dmaCh=%u, " |
1727 | "CHSEL=0x%x,CHPROP=0x%x,Active=0x%x\n", | 1727 | "CHSEL=0x%x,CHPROP=0x%x,Active=0x%x\n", |
1728 | chip_addx, dsp_addx, dma_chan, | 1728 | chip_addx, dsp_addx, dma_chan, |
1729 | port_map_mask, chnl_prop, active); | 1729 | port_map_mask, chnl_prop, active); |
1730 | 1730 | ||
1731 | snd_printdd(KERN_INFO "-- dsp_dma_setup_common() -- Complete ------\n"); | 1731 | codec_dbg(codec, "-- dsp_dma_setup_common() -- Complete ------\n"); |
1732 | 1732 | ||
1733 | return 0; | 1733 | return 0; |
1734 | } | 1734 | } |
@@ -1754,20 +1754,20 @@ static int dsp_dma_setup(struct hda_codec *codec, | |||
1754 | const unsigned int max_dma_count = 1 << (DSPDMAC_XFRCNT_BCNT_HIBIT - | 1754 | const unsigned int max_dma_count = 1 << (DSPDMAC_XFRCNT_BCNT_HIBIT - |
1755 | DSPDMAC_XFRCNT_BCNT_LOBIT + 1); | 1755 | DSPDMAC_XFRCNT_BCNT_LOBIT + 1); |
1756 | 1756 | ||
1757 | snd_printdd(KERN_INFO "-- dsp_dma_setup() -- Begin ---------\n"); | 1757 | codec_dbg(codec, "-- dsp_dma_setup() -- Begin ---------\n"); |
1758 | 1758 | ||
1759 | if (count > max_dma_count) { | 1759 | if (count > max_dma_count) { |
1760 | snd_printdd(KERN_ERR "count too big\n"); | 1760 | codec_dbg(codec, "count too big\n"); |
1761 | return -EINVAL; | 1761 | return -EINVAL; |
1762 | } | 1762 | } |
1763 | 1763 | ||
1764 | dsp_addx = dsp_chip_to_dsp_addx(chip_addx, &code, &yram); | 1764 | dsp_addx = dsp_chip_to_dsp_addx(chip_addx, &code, &yram); |
1765 | if (dsp_addx == INVALID_CHIP_ADDRESS) { | 1765 | if (dsp_addx == INVALID_CHIP_ADDRESS) { |
1766 | snd_printdd(KERN_ERR "invalid chip addr\n"); | 1766 | codec_dbg(codec, "invalid chip addr\n"); |
1767 | return -ENXIO; | 1767 | return -ENXIO; |
1768 | } | 1768 | } |
1769 | 1769 | ||
1770 | snd_printdd(KERN_INFO " dsp_dma_setup() start reg pgm\n"); | 1770 | codec_dbg(codec, " dsp_dma_setup() start reg pgm\n"); |
1771 | 1771 | ||
1772 | addr_field = dsp_addx << DSPDMAC_DMACFG_DBADR_LOBIT; | 1772 | addr_field = dsp_addx << DSPDMAC_DMACFG_DBADR_LOBIT; |
1773 | incr_field = 0; | 1773 | incr_field = 0; |
@@ -1784,10 +1784,10 @@ static int dsp_dma_setup(struct hda_codec *codec, | |||
1784 | status = chipio_write(codec, DSPDMAC_DMACFG_INST_OFFSET(dma_chan), | 1784 | status = chipio_write(codec, DSPDMAC_DMACFG_INST_OFFSET(dma_chan), |
1785 | dma_cfg); | 1785 | dma_cfg); |
1786 | if (status < 0) { | 1786 | if (status < 0) { |
1787 | snd_printdd(KERN_ERR "write DMACFG Reg fail\n"); | 1787 | codec_dbg(codec, "write DMACFG Reg fail\n"); |
1788 | return status; | 1788 | return status; |
1789 | } | 1789 | } |
1790 | snd_printdd(KERN_INFO " dsp_dma_setup() Write DMACFG\n"); | 1790 | codec_dbg(codec, " dsp_dma_setup() Write DMACFG\n"); |
1791 | 1791 | ||
1792 | adr_ofs = (count - 1) << (DSPDMAC_DSPADROFS_BOFS_LOBIT + | 1792 | adr_ofs = (count - 1) << (DSPDMAC_DSPADROFS_BOFS_LOBIT + |
1793 | (code ? 0 : 1)); | 1793 | (code ? 0 : 1)); |
@@ -1795,10 +1795,10 @@ static int dsp_dma_setup(struct hda_codec *codec, | |||
1795 | status = chipio_write(codec, DSPDMAC_DSPADROFS_INST_OFFSET(dma_chan), | 1795 | status = chipio_write(codec, DSPDMAC_DSPADROFS_INST_OFFSET(dma_chan), |
1796 | adr_ofs); | 1796 | adr_ofs); |
1797 | if (status < 0) { | 1797 | if (status < 0) { |
1798 | snd_printdd(KERN_ERR "write DSPADROFS Reg fail\n"); | 1798 | codec_dbg(codec, "write DSPADROFS Reg fail\n"); |
1799 | return status; | 1799 | return status; |
1800 | } | 1800 | } |
1801 | snd_printdd(KERN_INFO " dsp_dma_setup() Write DSPADROFS\n"); | 1801 | codec_dbg(codec, " dsp_dma_setup() Write DSPADROFS\n"); |
1802 | 1802 | ||
1803 | base_cnt = (count - 1) << DSPDMAC_XFRCNT_BCNT_LOBIT; | 1803 | base_cnt = (count - 1) << DSPDMAC_XFRCNT_BCNT_LOBIT; |
1804 | 1804 | ||
@@ -1809,17 +1809,17 @@ static int dsp_dma_setup(struct hda_codec *codec, | |||
1809 | status = chipio_write(codec, | 1809 | status = chipio_write(codec, |
1810 | DSPDMAC_XFRCNT_INST_OFFSET(dma_chan), xfr_cnt); | 1810 | DSPDMAC_XFRCNT_INST_OFFSET(dma_chan), xfr_cnt); |
1811 | if (status < 0) { | 1811 | if (status < 0) { |
1812 | snd_printdd(KERN_ERR "write XFRCNT Reg fail\n"); | 1812 | codec_dbg(codec, "write XFRCNT Reg fail\n"); |
1813 | return status; | 1813 | return status; |
1814 | } | 1814 | } |
1815 | snd_printdd(KERN_INFO " dsp_dma_setup() Write XFRCNT\n"); | 1815 | codec_dbg(codec, " dsp_dma_setup() Write XFRCNT\n"); |
1816 | 1816 | ||
1817 | snd_printdd( | 1817 | codec_dbg(codec, |
1818 | "ChipA=0x%x, cnt=0x%x, DMACFG=0x%x, " | 1818 | "ChipA=0x%x, cnt=0x%x, DMACFG=0x%x, " |
1819 | "ADROFS=0x%x, XFRCNT=0x%x\n", | 1819 | "ADROFS=0x%x, XFRCNT=0x%x\n", |
1820 | chip_addx, count, dma_cfg, adr_ofs, xfr_cnt); | 1820 | chip_addx, count, dma_cfg, adr_ofs, xfr_cnt); |
1821 | 1821 | ||
1822 | snd_printdd(KERN_INFO "-- dsp_dma_setup() -- Complete ---------\n"); | 1822 | codec_dbg(codec, "-- dsp_dma_setup() -- Complete ---------\n"); |
1823 | 1823 | ||
1824 | return 0; | 1824 | return 0; |
1825 | } | 1825 | } |
@@ -1833,17 +1833,17 @@ static int dsp_dma_start(struct hda_codec *codec, | |||
1833 | unsigned int reg = 0; | 1833 | unsigned int reg = 0; |
1834 | int status = 0; | 1834 | int status = 0; |
1835 | 1835 | ||
1836 | snd_printdd(KERN_INFO "-- dsp_dma_start() -- Begin ---------\n"); | 1836 | codec_dbg(codec, "-- dsp_dma_start() -- Begin ---------\n"); |
1837 | 1837 | ||
1838 | if (ovly) { | 1838 | if (ovly) { |
1839 | status = chipio_read(codec, | 1839 | status = chipio_read(codec, |
1840 | DSPDMAC_CHNLSTART_INST_OFFSET, ®); | 1840 | DSPDMAC_CHNLSTART_INST_OFFSET, ®); |
1841 | 1841 | ||
1842 | if (status < 0) { | 1842 | if (status < 0) { |
1843 | snd_printdd(KERN_ERR "read CHNLSTART reg fail\n"); | 1843 | codec_dbg(codec, "read CHNLSTART reg fail\n"); |
1844 | return status; | 1844 | return status; |
1845 | } | 1845 | } |
1846 | snd_printdd(KERN_INFO "-- dsp_dma_start() Read CHNLSTART\n"); | 1846 | codec_dbg(codec, "-- dsp_dma_start() Read CHNLSTART\n"); |
1847 | 1847 | ||
1848 | reg &= ~(DSPDMAC_CHNLSTART_EN_MASK | | 1848 | reg &= ~(DSPDMAC_CHNLSTART_EN_MASK | |
1849 | DSPDMAC_CHNLSTART_DIS_MASK); | 1849 | DSPDMAC_CHNLSTART_DIS_MASK); |
@@ -1852,10 +1852,10 @@ static int dsp_dma_start(struct hda_codec *codec, | |||
1852 | status = chipio_write(codec, DSPDMAC_CHNLSTART_INST_OFFSET, | 1852 | status = chipio_write(codec, DSPDMAC_CHNLSTART_INST_OFFSET, |
1853 | reg | (1 << (dma_chan + DSPDMAC_CHNLSTART_EN_LOBIT))); | 1853 | reg | (1 << (dma_chan + DSPDMAC_CHNLSTART_EN_LOBIT))); |
1854 | if (status < 0) { | 1854 | if (status < 0) { |
1855 | snd_printdd(KERN_ERR "write CHNLSTART reg fail\n"); | 1855 | codec_dbg(codec, "write CHNLSTART reg fail\n"); |
1856 | return status; | 1856 | return status; |
1857 | } | 1857 | } |
1858 | snd_printdd(KERN_INFO "-- dsp_dma_start() -- Complete ---------\n"); | 1858 | codec_dbg(codec, "-- dsp_dma_start() -- Complete ---------\n"); |
1859 | 1859 | ||
1860 | return status; | 1860 | return status; |
1861 | } | 1861 | } |
@@ -1869,17 +1869,17 @@ static int dsp_dma_stop(struct hda_codec *codec, | |||
1869 | unsigned int reg = 0; | 1869 | unsigned int reg = 0; |
1870 | int status = 0; | 1870 | int status = 0; |
1871 | 1871 | ||
1872 | snd_printdd(KERN_INFO "-- dsp_dma_stop() -- Begin ---------\n"); | 1872 | codec_dbg(codec, "-- dsp_dma_stop() -- Begin ---------\n"); |
1873 | 1873 | ||
1874 | if (ovly) { | 1874 | if (ovly) { |
1875 | status = chipio_read(codec, | 1875 | status = chipio_read(codec, |
1876 | DSPDMAC_CHNLSTART_INST_OFFSET, ®); | 1876 | DSPDMAC_CHNLSTART_INST_OFFSET, ®); |
1877 | 1877 | ||
1878 | if (status < 0) { | 1878 | if (status < 0) { |
1879 | snd_printdd(KERN_ERR "read CHNLSTART reg fail\n"); | 1879 | codec_dbg(codec, "read CHNLSTART reg fail\n"); |
1880 | return status; | 1880 | return status; |
1881 | } | 1881 | } |
1882 | snd_printdd(KERN_INFO "-- dsp_dma_stop() Read CHNLSTART\n"); | 1882 | codec_dbg(codec, "-- dsp_dma_stop() Read CHNLSTART\n"); |
1883 | reg &= ~(DSPDMAC_CHNLSTART_EN_MASK | | 1883 | reg &= ~(DSPDMAC_CHNLSTART_EN_MASK | |
1884 | DSPDMAC_CHNLSTART_DIS_MASK); | 1884 | DSPDMAC_CHNLSTART_DIS_MASK); |
1885 | } | 1885 | } |
@@ -1887,10 +1887,10 @@ static int dsp_dma_stop(struct hda_codec *codec, | |||
1887 | status = chipio_write(codec, DSPDMAC_CHNLSTART_INST_OFFSET, | 1887 | status = chipio_write(codec, DSPDMAC_CHNLSTART_INST_OFFSET, |
1888 | reg | (1 << (dma_chan + DSPDMAC_CHNLSTART_DIS_LOBIT))); | 1888 | reg | (1 << (dma_chan + DSPDMAC_CHNLSTART_DIS_LOBIT))); |
1889 | if (status < 0) { | 1889 | if (status < 0) { |
1890 | snd_printdd(KERN_ERR "write CHNLSTART reg fail\n"); | 1890 | codec_dbg(codec, "write CHNLSTART reg fail\n"); |
1891 | return status; | 1891 | return status; |
1892 | } | 1892 | } |
1893 | snd_printdd(KERN_INFO "-- dsp_dma_stop() -- Complete ---------\n"); | 1893 | codec_dbg(codec, "-- dsp_dma_stop() -- Complete ---------\n"); |
1894 | 1894 | ||
1895 | return status; | 1895 | return status; |
1896 | } | 1896 | } |
@@ -1973,17 +1973,17 @@ static int dsp_allocate_ports(struct hda_codec *codec, | |||
1973 | { | 1973 | { |
1974 | int status; | 1974 | int status; |
1975 | 1975 | ||
1976 | snd_printdd(KERN_INFO " dsp_allocate_ports() -- begin\n"); | 1976 | codec_dbg(codec, " dsp_allocate_ports() -- begin\n"); |
1977 | 1977 | ||
1978 | if ((rate_multi != 1) && (rate_multi != 2) && (rate_multi != 4)) { | 1978 | if ((rate_multi != 1) && (rate_multi != 2) && (rate_multi != 4)) { |
1979 | snd_printdd(KERN_ERR "bad rate multiple\n"); | 1979 | codec_dbg(codec, "bad rate multiple\n"); |
1980 | return -EINVAL; | 1980 | return -EINVAL; |
1981 | } | 1981 | } |
1982 | 1982 | ||
1983 | status = dsp_allocate_router_ports(codec, num_chans, | 1983 | status = dsp_allocate_router_ports(codec, num_chans, |
1984 | rate_multi, 0, port_map); | 1984 | rate_multi, 0, port_map); |
1985 | 1985 | ||
1986 | snd_printdd(KERN_INFO " dsp_allocate_ports() -- complete\n"); | 1986 | codec_dbg(codec, " dsp_allocate_ports() -- complete\n"); |
1987 | 1987 | ||
1988 | return status; | 1988 | return status; |
1989 | } | 1989 | } |
@@ -2000,7 +2000,7 @@ static int dsp_allocate_ports_format(struct hda_codec *codec, | |||
2000 | unsigned int rate_multi = sample_rate_mul / sample_rate_div; | 2000 | unsigned int rate_multi = sample_rate_mul / sample_rate_div; |
2001 | 2001 | ||
2002 | if ((rate_multi != 1) && (rate_multi != 2) && (rate_multi != 4)) { | 2002 | if ((rate_multi != 1) && (rate_multi != 2) && (rate_multi != 4)) { |
2003 | snd_printdd(KERN_ERR "bad rate multiple\n"); | 2003 | codec_dbg(codec, "bad rate multiple\n"); |
2004 | return -EINVAL; | 2004 | return -EINVAL; |
2005 | } | 2005 | } |
2006 | 2006 | ||
@@ -2018,14 +2018,14 @@ static int dsp_free_ports(struct hda_codec *codec) | |||
2018 | { | 2018 | { |
2019 | int status; | 2019 | int status; |
2020 | 2020 | ||
2021 | snd_printdd(KERN_INFO " dsp_free_ports() -- begin\n"); | 2021 | codec_dbg(codec, " dsp_free_ports() -- begin\n"); |
2022 | 2022 | ||
2023 | status = dsp_free_router_ports(codec); | 2023 | status = dsp_free_router_ports(codec); |
2024 | if (status < 0) { | 2024 | if (status < 0) { |
2025 | snd_printdd(KERN_ERR "free router ports fail\n"); | 2025 | codec_dbg(codec, "free router ports fail\n"); |
2026 | return status; | 2026 | return status; |
2027 | } | 2027 | } |
2028 | snd_printdd(KERN_INFO " dsp_free_ports() -- complete\n"); | 2028 | codec_dbg(codec, " dsp_free_ports() -- complete\n"); |
2029 | 2029 | ||
2030 | return status; | 2030 | return status; |
2031 | } | 2031 | } |
@@ -2091,8 +2091,6 @@ static int dma_set_state(struct dma_engine *dma, enum dma_state state) | |||
2091 | { | 2091 | { |
2092 | bool cmd; | 2092 | bool cmd; |
2093 | 2093 | ||
2094 | snd_printdd("dma_set_state state=%d\n", state); | ||
2095 | |||
2096 | switch (state) { | 2094 | switch (state) { |
2097 | case DMA_STATE_STOP: | 2095 | case DMA_STATE_STOP: |
2098 | cmd = false; | 2096 | cmd = false; |
@@ -2195,7 +2193,7 @@ static int dspxfr_hci_write(struct hda_codec *codec, | |||
2195 | unsigned int count; | 2193 | unsigned int count; |
2196 | 2194 | ||
2197 | if (fls == NULL || fls->chip_addr != g_chip_addr_magic_value) { | 2195 | if (fls == NULL || fls->chip_addr != g_chip_addr_magic_value) { |
2198 | snd_printdd(KERN_ERR "hci_write invalid params\n"); | 2196 | codec_dbg(codec, "hci_write invalid params\n"); |
2199 | return -EINVAL; | 2197 | return -EINVAL; |
2200 | } | 2198 | } |
2201 | 2199 | ||
@@ -2204,7 +2202,7 @@ static int dspxfr_hci_write(struct hda_codec *codec, | |||
2204 | while (count >= 2) { | 2202 | while (count >= 2) { |
2205 | status = chipio_write(codec, data[0], data[1]); | 2203 | status = chipio_write(codec, data[0], data[1]); |
2206 | if (status < 0) { | 2204 | if (status < 0) { |
2207 | snd_printdd(KERN_ERR "hci_write chipio failed\n"); | 2205 | codec_dbg(codec, "hci_write chipio failed\n"); |
2208 | return status; | 2206 | return status; |
2209 | } | 2207 | } |
2210 | count -= 2; | 2208 | count -= 2; |
@@ -2264,12 +2262,12 @@ static int dspxfr_one_seg(struct hda_codec *codec, | |||
2264 | } | 2262 | } |
2265 | 2263 | ||
2266 | if (hci_write && (!fls || is_last(fls))) { | 2264 | if (hci_write && (!fls || is_last(fls))) { |
2267 | snd_printdd("hci_write\n"); | 2265 | codec_dbg(codec, "hci_write\n"); |
2268 | return dspxfr_hci_write(codec, hci_write); | 2266 | return dspxfr_hci_write(codec, hci_write); |
2269 | } | 2267 | } |
2270 | 2268 | ||
2271 | if (fls == NULL || dma_engine == NULL || port_map_mask == 0) { | 2269 | if (fls == NULL || dma_engine == NULL || port_map_mask == 0) { |
2272 | snd_printdd("Invalid Params\n"); | 2270 | codec_dbg(codec, "Invalid Params\n"); |
2273 | return -EINVAL; | 2271 | return -EINVAL; |
2274 | } | 2272 | } |
2275 | 2273 | ||
@@ -2285,7 +2283,7 @@ static int dspxfr_one_seg(struct hda_codec *codec, | |||
2285 | if (!UC_RANGE(chip_addx, words_to_write) && | 2283 | if (!UC_RANGE(chip_addx, words_to_write) && |
2286 | !X_RANGE_ALL(chip_addx, words_to_write) && | 2284 | !X_RANGE_ALL(chip_addx, words_to_write) && |
2287 | !Y_RANGE_ALL(chip_addx, words_to_write)) { | 2285 | !Y_RANGE_ALL(chip_addx, words_to_write)) { |
2288 | snd_printdd("Invalid chip_addx Params\n"); | 2286 | codec_dbg(codec, "Invalid chip_addx Params\n"); |
2289 | return -EINVAL; | 2287 | return -EINVAL; |
2290 | } | 2288 | } |
2291 | 2289 | ||
@@ -2295,7 +2293,7 @@ static int dspxfr_one_seg(struct hda_codec *codec, | |||
2295 | buffer_addx = dma_get_buffer_addr(dma_engine); | 2293 | buffer_addx = dma_get_buffer_addr(dma_engine); |
2296 | 2294 | ||
2297 | if (buffer_addx == NULL) { | 2295 | if (buffer_addx == NULL) { |
2298 | snd_printdd(KERN_ERR "dma_engine buffer NULL\n"); | 2296 | codec_dbg(codec, "dma_engine buffer NULL\n"); |
2299 | return -EINVAL; | 2297 | return -EINVAL; |
2300 | } | 2298 | } |
2301 | 2299 | ||
@@ -2308,7 +2306,7 @@ static int dspxfr_one_seg(struct hda_codec *codec, | |||
2308 | (num_chans * sample_rate_mul / sample_rate_div)); | 2306 | (num_chans * sample_rate_mul / sample_rate_div)); |
2309 | 2307 | ||
2310 | if (hda_frame_size_words == 0) { | 2308 | if (hda_frame_size_words == 0) { |
2311 | snd_printdd(KERN_ERR "frmsz zero\n"); | 2309 | codec_dbg(codec, "frmsz zero\n"); |
2312 | return -EINVAL; | 2310 | return -EINVAL; |
2313 | } | 2311 | } |
2314 | 2312 | ||
@@ -2316,14 +2314,14 @@ static int dspxfr_one_seg(struct hda_codec *codec, | |||
2316 | (unsigned int)(UC_RANGE(chip_addx, 1) ? | 2314 | (unsigned int)(UC_RANGE(chip_addx, 1) ? |
2317 | 65536 : 32768)); | 2315 | 65536 : 32768)); |
2318 | buffer_size_words -= buffer_size_words % hda_frame_size_words; | 2316 | buffer_size_words -= buffer_size_words % hda_frame_size_words; |
2319 | snd_printdd( | 2317 | codec_dbg(codec, |
2320 | "chpadr=0x%08x frmsz=%u nchan=%u " | 2318 | "chpadr=0x%08x frmsz=%u nchan=%u " |
2321 | "rate_mul=%u div=%u bufsz=%u\n", | 2319 | "rate_mul=%u div=%u bufsz=%u\n", |
2322 | chip_addx, hda_frame_size_words, num_chans, | 2320 | chip_addx, hda_frame_size_words, num_chans, |
2323 | sample_rate_mul, sample_rate_div, buffer_size_words); | 2321 | sample_rate_mul, sample_rate_div, buffer_size_words); |
2324 | 2322 | ||
2325 | if (buffer_size_words < hda_frame_size_words) { | 2323 | if (buffer_size_words < hda_frame_size_words) { |
2326 | snd_printdd(KERN_ERR "dspxfr_one_seg:failed\n"); | 2324 | codec_dbg(codec, "dspxfr_one_seg:failed\n"); |
2327 | return -EINVAL; | 2325 | return -EINVAL; |
2328 | } | 2326 | } |
2329 | 2327 | ||
@@ -2337,7 +2335,7 @@ static int dspxfr_one_seg(struct hda_codec *codec, | |||
2337 | 2335 | ||
2338 | while (words_to_write != 0) { | 2336 | while (words_to_write != 0) { |
2339 | run_size_words = min(buffer_size_words, words_to_write); | 2337 | run_size_words = min(buffer_size_words, words_to_write); |
2340 | snd_printdd("dspxfr (seg loop)cnt=%u rs=%u remainder=%u\n", | 2338 | codec_dbg(codec, "dspxfr (seg loop)cnt=%u rs=%u remainder=%u\n", |
2341 | words_to_write, run_size_words, remainder_words); | 2339 | words_to_write, run_size_words, remainder_words); |
2342 | dma_xfer(dma_engine, data, run_size_words*sizeof(u32)); | 2340 | dma_xfer(dma_engine, data, run_size_words*sizeof(u32)); |
2343 | if (!comm_dma_setup_done) { | 2341 | if (!comm_dma_setup_done) { |
@@ -2359,7 +2357,7 @@ static int dspxfr_one_seg(struct hda_codec *codec, | |||
2359 | if (status < 0) | 2357 | if (status < 0) |
2360 | return status; | 2358 | return status; |
2361 | if (!dsp_is_dma_active(codec, dma_chan)) { | 2359 | if (!dsp_is_dma_active(codec, dma_chan)) { |
2362 | snd_printdd(KERN_ERR "dspxfr:DMA did not start\n"); | 2360 | codec_dbg(codec, "dspxfr:DMA did not start\n"); |
2363 | return -EIO; | 2361 | return -EIO; |
2364 | } | 2362 | } |
2365 | status = dma_set_state(dma_engine, DMA_STATE_RUN); | 2363 | status = dma_set_state(dma_engine, DMA_STATE_RUN); |
@@ -2391,7 +2389,7 @@ static int dspxfr_one_seg(struct hda_codec *codec, | |||
2391 | if (dma_active) | 2389 | if (dma_active) |
2392 | break; | 2390 | break; |
2393 | 2391 | ||
2394 | snd_printdd(KERN_INFO "+++++ DMA complete\n"); | 2392 | codec_dbg(codec, "+++++ DMA complete\n"); |
2395 | dma_set_state(dma_engine, DMA_STATE_STOP); | 2393 | dma_set_state(dma_engine, DMA_STATE_STOP); |
2396 | status = dma_reset(dma_engine); | 2394 | status = dma_reset(dma_engine); |
2397 | 2395 | ||
@@ -2465,7 +2463,7 @@ static int dspxfr_image(struct hda_codec *codec, | |||
2465 | hda_format, &response); | 2463 | hda_format, &response); |
2466 | 2464 | ||
2467 | if (status < 0) { | 2465 | if (status < 0) { |
2468 | snd_printdd(KERN_ERR "set converter format fail\n"); | 2466 | codec_dbg(codec, "set converter format fail\n"); |
2469 | goto exit; | 2467 | goto exit; |
2470 | } | 2468 | } |
2471 | 2469 | ||
@@ -2480,7 +2478,7 @@ static int dspxfr_image(struct hda_codec *codec, | |||
2480 | if (ovly) { | 2478 | if (ovly) { |
2481 | status = dspio_alloc_dma_chan(codec, &dma_chan); | 2479 | status = dspio_alloc_dma_chan(codec, &dma_chan); |
2482 | if (status < 0) { | 2480 | if (status < 0) { |
2483 | snd_printdd(KERN_ERR "alloc dmachan fail\n"); | 2481 | codec_dbg(codec, "alloc dmachan fail\n"); |
2484 | dma_chan = INVALID_DMA_CHANNEL; | 2482 | dma_chan = INVALID_DMA_CHANNEL; |
2485 | goto exit; | 2483 | goto exit; |
2486 | } | 2484 | } |
@@ -2490,7 +2488,7 @@ static int dspxfr_image(struct hda_codec *codec, | |||
2490 | status = dsp_allocate_ports_format(codec, hda_format, | 2488 | status = dsp_allocate_ports_format(codec, hda_format, |
2491 | &port_map_mask); | 2489 | &port_map_mask); |
2492 | if (status < 0) { | 2490 | if (status < 0) { |
2493 | snd_printdd(KERN_ERR "alloc ports fail\n"); | 2491 | codec_dbg(codec, "alloc ports fail\n"); |
2494 | goto exit; | 2492 | goto exit; |
2495 | } | 2493 | } |
2496 | 2494 | ||
@@ -2498,13 +2496,13 @@ static int dspxfr_image(struct hda_codec *codec, | |||
2498 | status = codec_set_converter_stream_channel(codec, | 2496 | status = codec_set_converter_stream_channel(codec, |
2499 | WIDGET_CHIP_CTRL, stream_id, 0, &response); | 2497 | WIDGET_CHIP_CTRL, stream_id, 0, &response); |
2500 | if (status < 0) { | 2498 | if (status < 0) { |
2501 | snd_printdd(KERN_ERR "set stream chan fail\n"); | 2499 | codec_dbg(codec, "set stream chan fail\n"); |
2502 | goto exit; | 2500 | goto exit; |
2503 | } | 2501 | } |
2504 | 2502 | ||
2505 | while ((fls_data != NULL) && !is_last(fls_data)) { | 2503 | while ((fls_data != NULL) && !is_last(fls_data)) { |
2506 | if (!is_valid(fls_data)) { | 2504 | if (!is_valid(fls_data)) { |
2507 | snd_printdd(KERN_ERR "FLS check fail\n"); | 2505 | codec_dbg(codec, "FLS check fail\n"); |
2508 | status = -EINVAL; | 2506 | status = -EINVAL; |
2509 | goto exit; | 2507 | goto exit; |
2510 | } | 2508 | } |
@@ -2547,7 +2545,7 @@ exit: | |||
2547 | */ | 2545 | */ |
2548 | static void dspload_post_setup(struct hda_codec *codec) | 2546 | static void dspload_post_setup(struct hda_codec *codec) |
2549 | { | 2547 | { |
2550 | snd_printdd(KERN_INFO "---- dspload_post_setup ------\n"); | 2548 | codec_dbg(codec, "---- dspload_post_setup ------\n"); |
2551 | 2549 | ||
2552 | /*set DSP speaker to 2.0 configuration*/ | 2550 | /*set DSP speaker to 2.0 configuration*/ |
2553 | chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x18), 0x08080080); | 2551 | chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x18), 0x08080080); |
@@ -2585,7 +2583,7 @@ static int dspload_image(struct hda_codec *codec, | |||
2585 | unsigned int sample_rate; | 2583 | unsigned int sample_rate; |
2586 | unsigned short channels; | 2584 | unsigned short channels; |
2587 | 2585 | ||
2588 | snd_printdd(KERN_INFO "---- dspload_image begin ------\n"); | 2586 | codec_dbg(codec, "---- dspload_image begin ------\n"); |
2589 | if (router_chans == 0) { | 2587 | if (router_chans == 0) { |
2590 | if (!ovly) | 2588 | if (!ovly) |
2591 | router_chans = DMA_TRANSFER_FRAME_SIZE_NWORDS; | 2589 | router_chans = DMA_TRANSFER_FRAME_SIZE_NWORDS; |
@@ -2602,27 +2600,27 @@ static int dspload_image(struct hda_codec *codec, | |||
2602 | } | 2600 | } |
2603 | 2601 | ||
2604 | do { | 2602 | do { |
2605 | snd_printdd(KERN_INFO "Ready to program DMA\n"); | 2603 | codec_dbg(codec, "Ready to program DMA\n"); |
2606 | if (!ovly) | 2604 | if (!ovly) |
2607 | status = dsp_reset(codec); | 2605 | status = dsp_reset(codec); |
2608 | 2606 | ||
2609 | if (status < 0) | 2607 | if (status < 0) |
2610 | break; | 2608 | break; |
2611 | 2609 | ||
2612 | snd_printdd(KERN_INFO "dsp_reset() complete\n"); | 2610 | codec_dbg(codec, "dsp_reset() complete\n"); |
2613 | status = dspxfr_image(codec, fls, reloc, sample_rate, channels, | 2611 | status = dspxfr_image(codec, fls, reloc, sample_rate, channels, |
2614 | ovly); | 2612 | ovly); |
2615 | 2613 | ||
2616 | if (status < 0) | 2614 | if (status < 0) |
2617 | break; | 2615 | break; |
2618 | 2616 | ||
2619 | snd_printdd(KERN_INFO "dspxfr_image() complete\n"); | 2617 | codec_dbg(codec, "dspxfr_image() complete\n"); |
2620 | if (autostart && !ovly) { | 2618 | if (autostart && !ovly) { |
2621 | dspload_post_setup(codec); | 2619 | dspload_post_setup(codec); |
2622 | status = dsp_set_run_state(codec); | 2620 | status = dsp_set_run_state(codec); |
2623 | } | 2621 | } |
2624 | 2622 | ||
2625 | snd_printdd(KERN_INFO "LOAD FINISHED\n"); | 2623 | codec_dbg(codec, "LOAD FINISHED\n"); |
2626 | } while (0); | 2624 | } while (0); |
2627 | 2625 | ||
2628 | return status; | 2626 | return status; |
@@ -3131,7 +3129,7 @@ static int ca0132_select_out(struct hda_codec *codec) | |||
3131 | unsigned int tmp; | 3129 | unsigned int tmp; |
3132 | int err; | 3130 | int err; |
3133 | 3131 | ||
3134 | snd_printdd(KERN_INFO "ca0132_select_out\n"); | 3132 | codec_dbg(codec, "ca0132_select_out\n"); |
3135 | 3133 | ||
3136 | snd_hda_power_up(codec); | 3134 | snd_hda_power_up(codec); |
3137 | 3135 | ||
@@ -3149,7 +3147,7 @@ static int ca0132_select_out(struct hda_codec *codec) | |||
3149 | spec->cur_out_type = SPEAKER_OUT; | 3147 | spec->cur_out_type = SPEAKER_OUT; |
3150 | 3148 | ||
3151 | if (spec->cur_out_type == SPEAKER_OUT) { | 3149 | if (spec->cur_out_type == SPEAKER_OUT) { |
3152 | snd_printdd(KERN_INFO "ca0132_select_out speaker\n"); | 3150 | codec_dbg(codec, "ca0132_select_out speaker\n"); |
3153 | /*speaker out config*/ | 3151 | /*speaker out config*/ |
3154 | tmp = FLOAT_ONE; | 3152 | tmp = FLOAT_ONE; |
3155 | err = dspio_set_uint_param(codec, 0x80, 0x04, tmp); | 3153 | err = dspio_set_uint_param(codec, 0x80, 0x04, tmp); |
@@ -3182,7 +3180,7 @@ static int ca0132_select_out(struct hda_codec *codec) | |||
3182 | snd_hda_set_pin_ctl(codec, spec->out_pins[0], | 3180 | snd_hda_set_pin_ctl(codec, spec->out_pins[0], |
3183 | pin_ctl | PIN_OUT); | 3181 | pin_ctl | PIN_OUT); |
3184 | } else { | 3182 | } else { |
3185 | snd_printdd(KERN_INFO "ca0132_select_out hp\n"); | 3183 | codec_dbg(codec, "ca0132_select_out hp\n"); |
3186 | /*headphone out config*/ | 3184 | /*headphone out config*/ |
3187 | tmp = FLOAT_ZERO; | 3185 | tmp = FLOAT_ZERO; |
3188 | err = dspio_set_uint_param(codec, 0x80, 0x04, tmp); | 3186 | err = dspio_set_uint_param(codec, 0x80, 0x04, tmp); |
@@ -3287,7 +3285,7 @@ static int ca0132_select_mic(struct hda_codec *codec) | |||
3287 | int jack_present; | 3285 | int jack_present; |
3288 | int auto_jack; | 3286 | int auto_jack; |
3289 | 3287 | ||
3290 | snd_printdd(KERN_INFO "ca0132_select_mic\n"); | 3288 | codec_dbg(codec, "ca0132_select_mic\n"); |
3291 | 3289 | ||
3292 | snd_hda_power_up(codec); | 3290 | snd_hda_power_up(codec); |
3293 | 3291 | ||
@@ -3409,7 +3407,7 @@ static int ca0132_effects_set(struct hda_codec *codec, hda_nid_t nid, long val) | |||
3409 | val = 0; | 3407 | val = 0; |
3410 | } | 3408 | } |
3411 | 3409 | ||
3412 | snd_printdd(KERN_INFO "ca0132_effect_set: nid=0x%x, val=%ld\n", | 3410 | codec_dbg(codec, "ca0132_effect_set: nid=0x%x, val=%ld\n", |
3413 | nid, val); | 3411 | nid, val); |
3414 | 3412 | ||
3415 | on = (val == 0) ? FLOAT_ZERO : FLOAT_ONE; | 3413 | on = (val == 0) ? FLOAT_ZERO : FLOAT_ONE; |
@@ -3431,7 +3429,7 @@ static int ca0132_pe_switch_set(struct hda_codec *codec) | |||
3431 | hda_nid_t nid; | 3429 | hda_nid_t nid; |
3432 | int i, ret = 0; | 3430 | int i, ret = 0; |
3433 | 3431 | ||
3434 | snd_printdd(KERN_INFO "ca0132_pe_switch_set: val=%ld\n", | 3432 | codec_dbg(codec, "ca0132_pe_switch_set: val=%ld\n", |
3435 | spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]); | 3433 | spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]); |
3436 | 3434 | ||
3437 | i = OUT_EFFECT_START_NID - EFFECT_START_NID; | 3435 | i = OUT_EFFECT_START_NID - EFFECT_START_NID; |
@@ -3477,7 +3475,7 @@ static int ca0132_cvoice_switch_set(struct hda_codec *codec) | |||
3477 | int i, ret = 0; | 3475 | int i, ret = 0; |
3478 | unsigned int oldval; | 3476 | unsigned int oldval; |
3479 | 3477 | ||
3480 | snd_printdd(KERN_INFO "ca0132_cvoice_switch_set: val=%ld\n", | 3478 | codec_dbg(codec, "ca0132_cvoice_switch_set: val=%ld\n", |
3481 | spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID]); | 3479 | spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID]); |
3482 | 3480 | ||
3483 | i = IN_EFFECT_START_NID - EFFECT_START_NID; | 3481 | i = IN_EFFECT_START_NID - EFFECT_START_NID; |
@@ -3607,7 +3605,7 @@ static int ca0132_voicefx_put(struct snd_kcontrol *kcontrol, | |||
3607 | if (sel >= items) | 3605 | if (sel >= items) |
3608 | return 0; | 3606 | return 0; |
3609 | 3607 | ||
3610 | snd_printdd(KERN_INFO "ca0132_voicefx_put: sel=%d, preset=%s\n", | 3608 | codec_dbg(codec, "ca0132_voicefx_put: sel=%d, preset=%s\n", |
3611 | sel, ca0132_voicefx_presets[sel].name); | 3609 | sel, ca0132_voicefx_presets[sel].name); |
3612 | 3610 | ||
3613 | /* | 3611 | /* |
@@ -3678,7 +3676,7 @@ static int ca0132_switch_put(struct snd_kcontrol *kcontrol, | |||
3678 | long *valp = ucontrol->value.integer.value; | 3676 | long *valp = ucontrol->value.integer.value; |
3679 | int changed = 1; | 3677 | int changed = 1; |
3680 | 3678 | ||
3681 | snd_printdd(KERN_INFO "ca0132_switch_put: nid=0x%x, val=%ld\n", | 3679 | codec_dbg(codec, "ca0132_switch_put: nid=0x%x, val=%ld\n", |
3682 | nid, *valp); | 3680 | nid, *valp); |
3683 | 3681 | ||
3684 | snd_hda_power_up(codec); | 3682 | snd_hda_power_up(codec); |
@@ -4141,7 +4139,7 @@ static void ca0132_set_dmic(struct hda_codec *codec, int enable) | |||
4141 | u8 val; | 4139 | u8 val; |
4142 | unsigned int oldval; | 4140 | unsigned int oldval; |
4143 | 4141 | ||
4144 | snd_printdd(KERN_INFO "ca0132_set_dmic: enable=%d\n", enable); | 4142 | codec_dbg(codec, "ca0132_set_dmic: enable=%d\n", enable); |
4145 | 4143 | ||
4146 | oldval = stop_mic1(codec); | 4144 | oldval = stop_mic1(codec); |
4147 | ca0132_set_vipsource(codec, 0); | 4145 | ca0132_set_vipsource(codec, 0); |
@@ -4249,7 +4247,7 @@ static void ca0132_refresh_widget_caps(struct hda_codec *codec) | |||
4249 | int i; | 4247 | int i; |
4250 | hda_nid_t nid; | 4248 | hda_nid_t nid; |
4251 | 4249 | ||
4252 | snd_printdd(KERN_INFO "ca0132_refresh_widget_caps.\n"); | 4250 | codec_dbg(codec, "ca0132_refresh_widget_caps.\n"); |
4253 | nid = codec->start_nid; | 4251 | nid = codec->start_nid; |
4254 | for (i = 0; i < codec->num_nodes; i++, nid++) | 4252 | for (i = 0; i < codec->num_nodes; i++, nid++) |
4255 | codec->wcaps[i] = snd_hda_param_read(codec, nid, | 4253 | codec->wcaps[i] = snd_hda_param_read(codec, nid, |
@@ -4393,7 +4391,7 @@ static void ca0132_process_dsp_response(struct hda_codec *codec) | |||
4393 | { | 4391 | { |
4394 | struct ca0132_spec *spec = codec->spec; | 4392 | struct ca0132_spec *spec = codec->spec; |
4395 | 4393 | ||
4396 | snd_printdd(KERN_INFO "ca0132_process_dsp_response\n"); | 4394 | codec_dbg(codec, "ca0132_process_dsp_response\n"); |
4397 | if (spec->wait_scp) { | 4395 | if (spec->wait_scp) { |
4398 | if (dspio_get_response_data(codec) >= 0) | 4396 | if (dspio_get_response_data(codec) >= 0) |
4399 | spec->wait_scp = 0; | 4397 | spec->wait_scp = 0; |
@@ -4412,7 +4410,7 @@ static void ca0132_unsol_event(struct hda_codec *codec, unsigned int res) | |||
4412 | res = snd_hda_jack_get_action(codec, | 4410 | res = snd_hda_jack_get_action(codec, |
4413 | (res >> AC_UNSOL_RES_TAG_SHIFT) & 0x3f); | 4411 | (res >> AC_UNSOL_RES_TAG_SHIFT) & 0x3f); |
4414 | 4412 | ||
4415 | snd_printdd(KERN_INFO "snd_hda_jack_get_action: 0x%x\n", res); | 4413 | codec_dbg(codec, "snd_hda_jack_get_action: 0x%x\n", res); |
4416 | 4414 | ||
4417 | switch (res) { | 4415 | switch (res) { |
4418 | case UNSOL_TAG_HP: | 4416 | case UNSOL_TAG_HP: |
@@ -4657,7 +4655,7 @@ static int patch_ca0132(struct hda_codec *codec) | |||
4657 | struct ca0132_spec *spec; | 4655 | struct ca0132_spec *spec; |
4658 | int err; | 4656 | int err; |
4659 | 4657 | ||
4660 | snd_printdd("patch_ca0132\n"); | 4658 | codec_dbg(codec, "patch_ca0132\n"); |
4661 | 4659 | ||
4662 | spec = kzalloc(sizeof(*spec), GFP_KERNEL); | 4660 | spec = kzalloc(sizeof(*spec), GFP_KERNEL); |
4663 | if (!spec) | 4661 | if (!spec) |