diff options
author | Matt <matt@embeddedalley.com> | 2005-07-04 11:49:55 -0400 |
---|---|---|
committer | Jaroslav Kysela <perex@suse.cz> | 2005-07-28 06:21:48 -0400 |
commit | 41e2fce431070cb2d91391808077378582d3e6b1 (patch) | |
tree | 4a26b2e7fc1b348cdef1fb56b0a1bd24639300f6 /sound/pci/hda/hda_intel.c | |
parent | bbd4615cdb68de943b2814e956ec14899606dc45 (diff) |
[ALSA] hda: enable unsolicited responses
HDA Intel driver
Patch enables unsolicited responses on the HDA controller. Without
the UREN bit set, the controller will not place unsolicited responses
in a RIRB.
Signed-off-by: Matt <matt@embeddedalley.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'sound/pci/hda/hda_intel.c')
-rw-r--r-- | sound/pci/hda/hda_intel.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 5e0cca36ed57..288ab0764830 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c | |||
@@ -178,6 +178,9 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 }; | |||
178 | #define ICH6_INT_CTRL_EN 0x40000000 /* controller interrupt enable bit */ | 178 | #define ICH6_INT_CTRL_EN 0x40000000 /* controller interrupt enable bit */ |
179 | #define ICH6_INT_GLOBAL_EN 0x80000000 /* global interrupt enable bit */ | 179 | #define ICH6_INT_GLOBAL_EN 0x80000000 /* global interrupt enable bit */ |
180 | 180 | ||
181 | /* GCTL unsolicited response enable bit */ | ||
182 | #define ICH6_GCTL_UREN (1<<8) | ||
183 | |||
181 | /* GCTL reset bit */ | 184 | /* GCTL reset bit */ |
182 | #define ICH6_GCTL_RESET (1<<0) | 185 | #define ICH6_GCTL_RESET (1<<0) |
183 | 186 | ||
@@ -562,6 +565,9 @@ static int azx_reset(azx_t *chip) | |||
562 | return -EBUSY; | 565 | return -EBUSY; |
563 | } | 566 | } |
564 | 567 | ||
568 | /* Accept unsolicited responses */ | ||
569 | azx_writel(chip, GCTL, azx_readl(chip, GCTL) | ICH6_GCTL_UREN); | ||
570 | |||
565 | /* detect codecs */ | 571 | /* detect codecs */ |
566 | if (! chip->codec_mask) { | 572 | if (! chip->codec_mask) { |
567 | chip->codec_mask = azx_readw(chip, STATESTS); | 573 | chip->codec_mask = azx_readw(chip, STATESTS); |