diff options
author | Takashi Iwai <tiwai@suse.de> | 2009-05-26 09:22:00 -0400 |
---|---|---|
committer | Takashi Iwai <tiwai@suse.de> | 2009-05-26 09:22:00 -0400 |
commit | 8174086167d43d0fd7b21928074145ae1d15bbab (patch) | |
tree | 130e12023bdca3468f1e12514ef0ae2d51483f01 /sound/pci/hda/hda_intel.c | |
parent | 20e91c575088337cb94f2ed48380efc305dcb81d (diff) |
ALSA: hda - Allow concurrent RIRB access in single_cmd mode
In the single_cmd mode, the current driver code doesn't do any update
for RIRB just for any safety reason. But, actually the RIRB and
single_cmd mode don't conflict. Unsolicited events can be delivered
even while using the single_cmd mode.
This patch allows the handling of unsolicited events with single_cmd
mode, just always checking RIRB independent from single_cmd flag.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'sound/pci/hda/hda_intel.c')
-rw-r--r-- | sound/pci/hda/hda_intel.c | 13 |
1 files changed, 5 insertions, 8 deletions
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 82d5218a0125..01d8d97dca4f 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c | |||
@@ -901,8 +901,7 @@ static void azx_init_chip(struct azx *chip) | |||
901 | azx_int_enable(chip); | 901 | azx_int_enable(chip); |
902 | 902 | ||
903 | /* initialize the codec command I/O */ | 903 | /* initialize the codec command I/O */ |
904 | if (!chip->single_cmd) | 904 | azx_init_cmd_io(chip); |
905 | azx_init_cmd_io(chip); | ||
906 | 905 | ||
907 | /* program the position buffer */ | 906 | /* program the position buffer */ |
908 | azx_writel(chip, DPLBASE, (u32)chip->posbuf.addr); | 907 | azx_writel(chip, DPLBASE, (u32)chip->posbuf.addr); |
@@ -1018,7 +1017,7 @@ static irqreturn_t azx_interrupt(int irq, void *dev_id) | |||
1018 | /* clear rirb int */ | 1017 | /* clear rirb int */ |
1019 | status = azx_readb(chip, RIRBSTS); | 1018 | status = azx_readb(chip, RIRBSTS); |
1020 | if (status & RIRB_INT_MASK) { | 1019 | if (status & RIRB_INT_MASK) { |
1021 | if (!chip->single_cmd && (status & RIRB_INT_RESPONSE)) | 1020 | if (status & RIRB_INT_RESPONSE) |
1022 | azx_update_rirb(chip); | 1021 | azx_update_rirb(chip); |
1023 | azx_writeb(chip, RIRBSTS, RIRB_INT_MASK); | 1022 | azx_writeb(chip, RIRBSTS, RIRB_INT_MASK); |
1024 | } | 1023 | } |
@@ -2338,11 +2337,9 @@ static int __devinit azx_create(struct snd_card *card, struct pci_dev *pci, | |||
2338 | goto errout; | 2337 | goto errout; |
2339 | } | 2338 | } |
2340 | /* allocate CORB/RIRB */ | 2339 | /* allocate CORB/RIRB */ |
2341 | if (!chip->single_cmd) { | 2340 | err = azx_alloc_cmd_io(chip); |
2342 | err = azx_alloc_cmd_io(chip); | 2341 | if (err < 0) |
2343 | if (err < 0) | 2342 | goto errout; |
2344 | goto errout; | ||
2345 | } | ||
2346 | 2343 | ||
2347 | /* initialize streams */ | 2344 | /* initialize streams */ |
2348 | azx_init_stream(chip); | 2345 | azx_init_stream(chip); |