diff options
author | Takashi Iwai <tiwai@suse.de> | 2007-07-27 10:52:19 -0400 |
---|---|---|
committer | Jaroslav Kysela <perex@perex.cz> | 2007-10-16 09:58:09 -0400 |
commit | d01ce99fc53271cd8ef0ef6b9a2790177fd410a1 (patch) | |
tree | d6723036b6bd896c120cf49dd049ddf182ec703d /sound/pci/hda/hda_intel.c | |
parent | e2340465ec9587362a057524d3e2163377366771 (diff) |
[ALSA] hda-intel - Coding style fixes
Fix codes to follow more to the standard kernel coding style.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Jaroslav Kysela <perex@suse.cz>
Diffstat (limited to 'sound/pci/hda/hda_intel.c')
-rw-r--r-- | sound/pci/hda/hda_intel.c | 188 |
1 files changed, 119 insertions, 69 deletions
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 92bc8b3fa2a0..ebb442dcc027 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c | |||
@@ -1,6 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * | 2 | * |
3 | * hda_intel.c - Implementation of primary alsa driver code base for Intel HD Audio. | 3 | * hda_intel.c - Implementation of primary alsa driver code base |
4 | * for Intel HD Audio. | ||
4 | * | 5 | * |
5 | * Copyright(c) 2004 Intel Corporation. All rights reserved. | 6 | * Copyright(c) 2004 Intel Corporation. All rights reserved. |
6 | * | 7 | * |
@@ -64,11 +65,13 @@ MODULE_PARM_DESC(id, "ID string for Intel HD audio interface."); | |||
64 | module_param(model, charp, 0444); | 65 | module_param(model, charp, 0444); |
65 | MODULE_PARM_DESC(model, "Use the given board model."); | 66 | MODULE_PARM_DESC(model, "Use the given board model."); |
66 | module_param(position_fix, int, 0444); | 67 | module_param(position_fix, int, 0444); |
67 | MODULE_PARM_DESC(position_fix, "Fix DMA pointer (0 = auto, 1 = none, 2 = POSBUF, 3 = FIFO size)."); | 68 | MODULE_PARM_DESC(position_fix, "Fix DMA pointer " |
69 | "(0 = auto, 1 = none, 2 = POSBUF, 3 = FIFO size)."); | ||
68 | module_param(probe_mask, int, 0444); | 70 | module_param(probe_mask, int, 0444); |
69 | MODULE_PARM_DESC(probe_mask, "Bitmask to probe codecs (default = -1)."); | 71 | MODULE_PARM_DESC(probe_mask, "Bitmask to probe codecs (default = -1)."); |
70 | module_param(single_cmd, bool, 0444); | 72 | module_param(single_cmd, bool, 0444); |
71 | MODULE_PARM_DESC(single_cmd, "Use single command to communicate with codecs (for debugging only)."); | 73 | MODULE_PARM_DESC(single_cmd, "Use single command to communicate with codecs " |
74 | "(for debugging only)."); | ||
72 | module_param(enable_msi, int, 0); | 75 | module_param(enable_msi, int, 0); |
73 | MODULE_PARM_DESC(enable_msi, "Enable Message Signaled Interrupt (MSI)"); | 76 | MODULE_PARM_DESC(enable_msi, "Enable Message Signaled Interrupt (MSI)"); |
74 | 77 | ||
@@ -213,15 +216,16 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 }; | |||
213 | #define SD_INT_DESC_ERR 0x10 /* descriptor error interrupt */ | 216 | #define SD_INT_DESC_ERR 0x10 /* descriptor error interrupt */ |
214 | #define SD_INT_FIFO_ERR 0x08 /* FIFO error interrupt */ | 217 | #define SD_INT_FIFO_ERR 0x08 /* FIFO error interrupt */ |
215 | #define SD_INT_COMPLETE 0x04 /* completion interrupt */ | 218 | #define SD_INT_COMPLETE 0x04 /* completion interrupt */ |
216 | #define SD_INT_MASK (SD_INT_DESC_ERR|SD_INT_FIFO_ERR|SD_INT_COMPLETE) | 219 | #define SD_INT_MASK (SD_INT_DESC_ERR|SD_INT_FIFO_ERR|\ |
220 | SD_INT_COMPLETE) | ||
217 | 221 | ||
218 | /* SD_STS */ | 222 | /* SD_STS */ |
219 | #define SD_STS_FIFO_READY 0x20 /* FIFO ready */ | 223 | #define SD_STS_FIFO_READY 0x20 /* FIFO ready */ |
220 | 224 | ||
221 | /* INTCTL and INTSTS */ | 225 | /* INTCTL and INTSTS */ |
222 | #define ICH6_INT_ALL_STREAM 0xff /* all stream interrupts */ | 226 | #define ICH6_INT_ALL_STREAM 0xff /* all stream interrupts */ |
223 | #define ICH6_INT_CTRL_EN 0x40000000 /* controller interrupt enable bit */ | 227 | #define ICH6_INT_CTRL_EN 0x40000000 /* controller interrupt enable bit */ |
224 | #define ICH6_INT_GLOBAL_EN 0x80000000 /* global interrupt enable bit */ | 228 | #define ICH6_INT_GLOBAL_EN 0x80000000 /* global interrupt enable bit */ |
225 | 229 | ||
226 | /* GCTL unsolicited response enable bit */ | 230 | /* GCTL unsolicited response enable bit */ |
227 | #define ICH6_GCTL_UREN (1<<8) | 231 | #define ICH6_GCTL_UREN (1<<8) |
@@ -257,22 +261,26 @@ enum { | |||
257 | */ | 261 | */ |
258 | 262 | ||
259 | struct azx_dev { | 263 | struct azx_dev { |
260 | u32 *bdl; /* virtual address of the BDL */ | 264 | u32 *bdl; /* virtual address of the BDL */ |
261 | dma_addr_t bdl_addr; /* physical address of the BDL */ | 265 | dma_addr_t bdl_addr; /* physical address of the BDL */ |
262 | u32 *posbuf; /* position buffer pointer */ | 266 | u32 *posbuf; /* position buffer pointer */ |
263 | 267 | ||
264 | unsigned int bufsize; /* size of the play buffer in bytes */ | 268 | unsigned int bufsize; /* size of the play buffer in bytes */ |
265 | unsigned int fragsize; /* size of each period in bytes */ | 269 | unsigned int fragsize; /* size of each period in bytes */ |
266 | unsigned int frags; /* number for period in the play buffer */ | 270 | unsigned int frags; /* number for period in the play buffer */ |
267 | unsigned int fifo_size; /* FIFO size */ | 271 | unsigned int fifo_size; /* FIFO size */ |
268 | 272 | ||
269 | void __iomem *sd_addr; /* stream descriptor pointer */ | 273 | void __iomem *sd_addr; /* stream descriptor pointer */ |
270 | 274 | ||
271 | u32 sd_int_sta_mask; /* stream int status mask */ | 275 | u32 sd_int_sta_mask; /* stream int status mask */ |
272 | 276 | ||
273 | /* pcm support */ | 277 | /* pcm support */ |
274 | struct snd_pcm_substream *substream; /* assigned substream, set in PCM open */ | 278 | struct snd_pcm_substream *substream; /* assigned substream, |
275 | unsigned int format_val; /* format value to be set in the controller and the codec */ | 279 | * set in PCM open |
280 | */ | ||
281 | unsigned int format_val; /* format value to be set in the | ||
282 | * controller and the codec | ||
283 | */ | ||
276 | unsigned char stream_tag; /* assigned stream */ | 284 | unsigned char stream_tag; /* assigned stream */ |
277 | unsigned char index; /* stream index */ | 285 | unsigned char index; /* stream index */ |
278 | /* for sanity check of position buffer */ | 286 | /* for sanity check of position buffer */ |
@@ -418,7 +426,8 @@ static int azx_alloc_cmd_io(struct azx *chip) | |||
418 | int err; | 426 | int err; |
419 | 427 | ||
420 | /* single page (at least 4096 bytes) must suffice for both ringbuffes */ | 428 | /* single page (at least 4096 bytes) must suffice for both ringbuffes */ |
421 | err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), | 429 | err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, |
430 | snd_dma_pci_data(chip->pci), | ||
422 | PAGE_SIZE, &chip->rb); | 431 | PAGE_SIZE, &chip->rb); |
423 | if (err < 0) { | 432 | if (err < 0) { |
424 | snd_printk(KERN_ERR SFX "cannot allocate CORB/RIRB\n"); | 433 | snd_printk(KERN_ERR SFX "cannot allocate CORB/RIRB\n"); |
@@ -531,7 +540,7 @@ static unsigned int azx_rirb_get_response(struct hda_codec *codec) | |||
531 | azx_update_rirb(chip); | 540 | azx_update_rirb(chip); |
532 | spin_unlock_irq(&chip->reg_lock); | 541 | spin_unlock_irq(&chip->reg_lock); |
533 | } | 542 | } |
534 | if (! chip->rirb.cmds) | 543 | if (!chip->rirb.cmds) |
535 | return chip->rirb.res; /* the last value */ | 544 | return chip->rirb.res; /* the last value */ |
536 | schedule_timeout(1); | 545 | schedule_timeout(1); |
537 | } while (time_after_eq(timeout, jiffies)); | 546 | } while (time_after_eq(timeout, jiffies)); |
@@ -585,16 +594,19 @@ static int azx_single_send_cmd(struct hda_codec *codec, u32 val) | |||
585 | 594 | ||
586 | while (timeout--) { | 595 | while (timeout--) { |
587 | /* check ICB busy bit */ | 596 | /* check ICB busy bit */ |
588 | if (! (azx_readw(chip, IRS) & ICH6_IRS_BUSY)) { | 597 | if (!((azx_readw(chip, IRS) & ICH6_IRS_BUSY))) { |
589 | /* Clear IRV valid bit */ | 598 | /* Clear IRV valid bit */ |
590 | azx_writew(chip, IRS, azx_readw(chip, IRS) | ICH6_IRS_VALID); | 599 | azx_writew(chip, IRS, azx_readw(chip, IRS) | |
600 | ICH6_IRS_VALID); | ||
591 | azx_writel(chip, IC, val); | 601 | azx_writel(chip, IC, val); |
592 | azx_writew(chip, IRS, azx_readw(chip, IRS) | ICH6_IRS_BUSY); | 602 | azx_writew(chip, IRS, azx_readw(chip, IRS) | |
603 | ICH6_IRS_BUSY); | ||
593 | return 0; | 604 | return 0; |
594 | } | 605 | } |
595 | udelay(1); | 606 | udelay(1); |
596 | } | 607 | } |
597 | snd_printd(SFX "send_cmd timeout: IRS=0x%x, val=0x%x\n", azx_readw(chip, IRS), val); | 608 | snd_printd(SFX "send_cmd timeout: IRS=0x%x, val=0x%x\n", |
609 | azx_readw(chip, IRS), val); | ||
598 | return -EIO; | 610 | return -EIO; |
599 | } | 611 | } |
600 | 612 | ||
@@ -610,7 +622,8 @@ static unsigned int azx_single_get_response(struct hda_codec *codec) | |||
610 | return azx_readl(chip, IR); | 622 | return azx_readl(chip, IR); |
611 | udelay(1); | 623 | udelay(1); |
612 | } | 624 | } |
613 | snd_printd(SFX "get_response timeout: IRS=0x%x\n", azx_readw(chip, IRS)); | 625 | snd_printd(SFX "get_response timeout: IRS=0x%x\n", |
626 | azx_readw(chip, IRS)); | ||
614 | return (unsigned int)-1; | 627 | return (unsigned int)-1; |
615 | } | 628 | } |
616 | 629 | ||
@@ -785,7 +798,8 @@ static void azx_init_chip(struct azx *chip) | |||
785 | 798 | ||
786 | /* Clear bits 0-2 of PCI register TCSEL (at offset 0x44) | 799 | /* Clear bits 0-2 of PCI register TCSEL (at offset 0x44) |
787 | * TCSEL == Traffic Class Select Register, which sets PCI express QOS | 800 | * TCSEL == Traffic Class Select Register, which sets PCI express QOS |
788 | * Ensuring these bits are 0 clears playback static on some HD Audio codecs | 801 | * Ensuring these bits are 0 clears playback static on some HD Audio |
802 | * codecs | ||
789 | */ | 803 | */ |
790 | pci_read_config_byte (chip->pci, ICH6_PCIREG_TCSEL, ®); | 804 | pci_read_config_byte (chip->pci, ICH6_PCIREG_TCSEL, ®); |
791 | pci_write_config_byte(chip->pci, ICH6_PCIREG_TCSEL, reg & 0xf8); | 805 | pci_write_config_byte(chip->pci, ICH6_PCIREG_TCSEL, reg & 0xf8); |
@@ -808,10 +822,13 @@ static void azx_init_chip(struct azx *chip) | |||
808 | switch (chip->driver_type) { | 822 | switch (chip->driver_type) { |
809 | case AZX_DRIVER_ATI: | 823 | case AZX_DRIVER_ATI: |
810 | /* For ATI SB450 azalia HD audio, we need to enable snoop */ | 824 | /* For ATI SB450 azalia HD audio, we need to enable snoop */ |
811 | pci_read_config_byte(chip->pci, ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, | 825 | pci_read_config_byte(chip->pci, |
826 | ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, | ||
812 | ®); | 827 | ®); |
813 | pci_write_config_byte(chip->pci, ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, | 828 | pci_write_config_byte(chip->pci, |
814 | (reg & 0xf8) | ATI_SB450_HDAUDIO_ENABLE_SNOOP); | 829 | ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, |
830 | (reg & 0xf8) | | ||
831 | ATI_SB450_HDAUDIO_ENABLE_SNOOP); | ||
815 | break; | 832 | break; |
816 | case AZX_DRIVER_NVIDIA: | 833 | case AZX_DRIVER_NVIDIA: |
817 | /* For NVIDIA HDA, enable snoop */ | 834 | /* For NVIDIA HDA, enable snoop */ |
@@ -857,7 +874,7 @@ static irqreturn_t azx_interrupt(int irq, void *dev_id) | |||
857 | /* clear rirb int */ | 874 | /* clear rirb int */ |
858 | status = azx_readb(chip, RIRBSTS); | 875 | status = azx_readb(chip, RIRBSTS); |
859 | if (status & RIRB_INT_MASK) { | 876 | if (status & RIRB_INT_MASK) { |
860 | if (! chip->single_cmd && (status & RIRB_INT_RESPONSE)) | 877 | if (!chip->single_cmd && (status & RIRB_INT_RESPONSE)) |
861 | azx_update_rirb(chip); | 878 | azx_update_rirb(chip); |
862 | azx_writeb(chip, RIRBSTS, RIRB_INT_MASK); | 879 | azx_writeb(chip, RIRBSTS, RIRB_INT_MASK); |
863 | } | 880 | } |
@@ -911,9 +928,11 @@ static int azx_setup_controller(struct azx *chip, struct azx_dev *azx_dev) | |||
911 | int timeout; | 928 | int timeout; |
912 | 929 | ||
913 | /* make sure the run bit is zero for SD */ | 930 | /* make sure the run bit is zero for SD */ |
914 | azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) & ~SD_CTL_DMA_START); | 931 | azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) & |
932 | ~SD_CTL_DMA_START); | ||
915 | /* reset stream */ | 933 | /* reset stream */ |
916 | azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) | SD_CTL_STREAM_RESET); | 934 | azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) | |
935 | SD_CTL_STREAM_RESET); | ||
917 | udelay(3); | 936 | udelay(3); |
918 | timeout = 300; | 937 | timeout = 300; |
919 | while (!((val = azx_sd_readb(azx_dev, SD_CTL)) & SD_CTL_STREAM_RESET) && | 938 | while (!((val = azx_sd_readb(azx_dev, SD_CTL)) & SD_CTL_STREAM_RESET) && |
@@ -931,7 +950,7 @@ static int azx_setup_controller(struct azx *chip, struct azx_dev *azx_dev) | |||
931 | 950 | ||
932 | /* program the stream_tag */ | 951 | /* program the stream_tag */ |
933 | azx_sd_writel(azx_dev, SD_CTL, | 952 | azx_sd_writel(azx_dev, SD_CTL, |
934 | (azx_sd_readl(azx_dev, SD_CTL) & ~SD_CTL_STREAM_TAG_MASK) | | 953 | (azx_sd_readl(azx_dev, SD_CTL) & ~SD_CTL_STREAM_TAG_MASK)| |
935 | (azx_dev->stream_tag << SD_CTL_STREAM_TAG_SHIFT)); | 954 | (azx_dev->stream_tag << SD_CTL_STREAM_TAG_SHIFT)); |
936 | 955 | ||
937 | /* program the length of samples in cyclic buffer */ | 956 | /* program the length of samples in cyclic buffer */ |
@@ -951,11 +970,13 @@ static int azx_setup_controller(struct azx *chip, struct azx_dev *azx_dev) | |||
951 | azx_sd_writel(azx_dev, SD_BDLPU, upper_32bit(azx_dev->bdl_addr)); | 970 | azx_sd_writel(azx_dev, SD_BDLPU, upper_32bit(azx_dev->bdl_addr)); |
952 | 971 | ||
953 | /* enable the position buffer */ | 972 | /* enable the position buffer */ |
954 | if (! (azx_readl(chip, DPLBASE) & ICH6_DPLBASE_ENABLE)) | 973 | if (!(azx_readl(chip, DPLBASE) & ICH6_DPLBASE_ENABLE)) |
955 | azx_writel(chip, DPLBASE, (u32)chip->posbuf.addr | ICH6_DPLBASE_ENABLE); | 974 | azx_writel(chip, DPLBASE, |
975 | (u32)chip->posbuf.addr |ICH6_DPLBASE_ENABLE); | ||
956 | 976 | ||
957 | /* set the interrupt enable bits in the descriptor control register */ | 977 | /* set the interrupt enable bits in the descriptor control register */ |
958 | azx_sd_writel(azx_dev, SD_CTL, azx_sd_readl(azx_dev, SD_CTL) | SD_INT_MASK); | 978 | azx_sd_writel(azx_dev, SD_CTL, |
979 | azx_sd_readl(azx_dev, SD_CTL) | SD_INT_MASK); | ||
959 | 980 | ||
960 | return 0; | 981 | return 0; |
961 | } | 982 | } |
@@ -987,7 +1008,8 @@ static int __devinit azx_codec_create(struct azx *chip, const char *model) | |||
987 | bus_temp.ops.command = azx_send_cmd; | 1008 | bus_temp.ops.command = azx_send_cmd; |
988 | bus_temp.ops.get_response = azx_get_response; | 1009 | bus_temp.ops.get_response = azx_get_response; |
989 | 1010 | ||
990 | if ((err = snd_hda_bus_new(chip->card, &bus_temp, &chip->bus)) < 0) | 1011 | err = snd_hda_bus_new(chip->card, &bus_temp, &chip->bus); |
1012 | if (err < 0) | ||
991 | return err; | 1013 | return err; |
992 | 1014 | ||
993 | codecs = audio_codecs = 0; | 1015 | codecs = audio_codecs = 0; |
@@ -1038,7 +1060,7 @@ static inline struct azx_dev *azx_assign_device(struct azx *chip, int stream) | |||
1038 | nums = chip->capture_streams; | 1060 | nums = chip->capture_streams; |
1039 | } | 1061 | } |
1040 | for (i = 0; i < nums; i++, dev++) | 1062 | for (i = 0; i < nums; i++, dev++) |
1041 | if (! chip->azx_dev[dev].opened) { | 1063 | if (!chip->azx_dev[dev].opened) { |
1042 | chip->azx_dev[dev].opened = 1; | 1064 | chip->azx_dev[dev].opened = 1; |
1043 | return &chip->azx_dev[dev]; | 1065 | return &chip->azx_dev[dev]; |
1044 | } | 1066 | } |
@@ -1052,7 +1074,8 @@ static inline void azx_release_device(struct azx_dev *azx_dev) | |||
1052 | } | 1074 | } |
1053 | 1075 | ||
1054 | static struct snd_pcm_hardware azx_pcm_hw = { | 1076 | static struct snd_pcm_hardware azx_pcm_hw = { |
1055 | .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | | 1077 | .info = (SNDRV_PCM_INFO_MMAP | |
1078 | SNDRV_PCM_INFO_INTERLEAVED | | ||
1056 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | 1079 | SNDRV_PCM_INFO_BLOCK_TRANSFER | |
1057 | SNDRV_PCM_INFO_MMAP_VALID | | 1080 | SNDRV_PCM_INFO_MMAP_VALID | |
1058 | /* No full-resume yet implemented */ | 1081 | /* No full-resume yet implemented */ |
@@ -1105,7 +1128,8 @@ static int azx_pcm_open(struct snd_pcm_substream *substream) | |||
1105 | 128); | 1128 | 128); |
1106 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, | 1129 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, |
1107 | 128); | 1130 | 128); |
1108 | if ((err = hinfo->ops.open(hinfo, apcm->codec, substream)) < 0) { | 1131 | err = hinfo->ops.open(hinfo, apcm->codec, substream); |
1132 | if (err < 0) { | ||
1109 | azx_release_device(azx_dev); | 1133 | azx_release_device(azx_dev); |
1110 | mutex_unlock(&chip->open_mutex); | 1134 | mutex_unlock(&chip->open_mutex); |
1111 | return err; | 1135 | return err; |
@@ -1139,9 +1163,11 @@ static int azx_pcm_close(struct snd_pcm_substream *substream) | |||
1139 | return 0; | 1163 | return 0; |
1140 | } | 1164 | } |
1141 | 1165 | ||
1142 | static int azx_pcm_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *hw_params) | 1166 | static int azx_pcm_hw_params(struct snd_pcm_substream *substream, |
1167 | struct snd_pcm_hw_params *hw_params) | ||
1143 | { | 1168 | { |
1144 | return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); | 1169 | return snd_pcm_lib_malloc_pages(substream, |
1170 | params_buffer_bytes(hw_params)); | ||
1145 | } | 1171 | } |
1146 | 1172 | ||
1147 | static int azx_pcm_hw_free(struct snd_pcm_substream *substream) | 1173 | static int azx_pcm_hw_free(struct snd_pcm_substream *substream) |
@@ -1175,13 +1201,15 @@ static int azx_pcm_prepare(struct snd_pcm_substream *substream) | |||
1175 | runtime->channels, | 1201 | runtime->channels, |
1176 | runtime->format, | 1202 | runtime->format, |
1177 | hinfo->maxbps); | 1203 | hinfo->maxbps); |
1178 | if (! azx_dev->format_val) { | 1204 | if (!azx_dev->format_val) { |
1179 | snd_printk(KERN_ERR SFX "invalid format_val, rate=%d, ch=%d, format=%d\n", | 1205 | snd_printk(KERN_ERR SFX |
1206 | "invalid format_val, rate=%d, ch=%d, format=%d\n", | ||
1180 | runtime->rate, runtime->channels, runtime->format); | 1207 | runtime->rate, runtime->channels, runtime->format); |
1181 | return -EINVAL; | 1208 | return -EINVAL; |
1182 | } | 1209 | } |
1183 | 1210 | ||
1184 | snd_printdd("azx_pcm_prepare: bufsize=0x%x, fragsize=0x%x, format=0x%x\n", | 1211 | snd_printdd("azx_pcm_prepare: bufsize=0x%x, fragsize=0x%x, " |
1212 | "format=0x%x\n", | ||
1185 | azx_dev->bufsize, azx_dev->fragsize, azx_dev->format_val); | 1213 | azx_dev->bufsize, azx_dev->fragsize, azx_dev->format_val); |
1186 | azx_setup_periods(azx_dev); | 1214 | azx_setup_periods(azx_dev); |
1187 | azx_setup_controller(chip, azx_dev); | 1215 | azx_setup_controller(chip, azx_dev); |
@@ -1223,7 +1251,8 @@ static int azx_pcm_trigger(struct snd_pcm_substream *substream, int cmd) | |||
1223 | cmd == SNDRV_PCM_TRIGGER_SUSPEND || | 1251 | cmd == SNDRV_PCM_TRIGGER_SUSPEND || |
1224 | cmd == SNDRV_PCM_TRIGGER_STOP) { | 1252 | cmd == SNDRV_PCM_TRIGGER_STOP) { |
1225 | int timeout = 5000; | 1253 | int timeout = 5000; |
1226 | while (azx_sd_readb(azx_dev, SD_CTL) & SD_CTL_DMA_START && --timeout) | 1254 | while ((azx_sd_readb(azx_dev, SD_CTL) & SD_CTL_DMA_START) && |
1255 | --timeout) | ||
1227 | ; | 1256 | ; |
1228 | } | 1257 | } |
1229 | return err; | 1258 | return err; |
@@ -1241,7 +1270,7 @@ static snd_pcm_uframes_t azx_pcm_pointer(struct snd_pcm_substream *substream) | |||
1241 | /* use the position buffer */ | 1270 | /* use the position buffer */ |
1242 | pos = le32_to_cpu(*azx_dev->posbuf); | 1271 | pos = le32_to_cpu(*azx_dev->posbuf); |
1243 | if (chip->position_fix == POS_FIX_AUTO && | 1272 | if (chip->position_fix == POS_FIX_AUTO && |
1244 | azx_dev->period_intr == 1 && ! pos) { | 1273 | azx_dev->period_intr == 1 && !pos) { |
1245 | printk(KERN_WARNING | 1274 | printk(KERN_WARNING |
1246 | "hda-intel: Invalid position buffer, " | 1275 | "hda-intel: Invalid position buffer, " |
1247 | "using LPIB read method instead.\n"); | 1276 | "using LPIB read method instead.\n"); |
@@ -1292,7 +1321,8 @@ static int __devinit create_codec_pcm(struct azx *chip, struct hda_codec *codec, | |||
1292 | snd_assert(cpcm->name, return -EINVAL); | 1321 | snd_assert(cpcm->name, return -EINVAL); |
1293 | 1322 | ||
1294 | err = snd_pcm_new(chip->card, cpcm->name, pcm_dev, | 1323 | err = snd_pcm_new(chip->card, cpcm->name, pcm_dev, |
1295 | cpcm->stream[0].substreams, cpcm->stream[1].substreams, | 1324 | cpcm->stream[0].substreams, |
1325 | cpcm->stream[1].substreams, | ||
1296 | &pcm); | 1326 | &pcm); |
1297 | if (err < 0) | 1327 | if (err < 0) |
1298 | return err; | 1328 | return err; |
@@ -1327,7 +1357,8 @@ static int __devinit azx_pcm_create(struct azx *chip) | |||
1327 | int c, err; | 1357 | int c, err; |
1328 | int pcm_dev; | 1358 | int pcm_dev; |
1329 | 1359 | ||
1330 | if ((err = snd_hda_build_pcms(chip->bus)) < 0) | 1360 | err = snd_hda_build_pcms(chip->bus); |
1361 | if (err < 0) | ||
1331 | return err; | 1362 | return err; |
1332 | 1363 | ||
1333 | /* create audio PCMs */ | 1364 | /* create audio PCMs */ |
@@ -1338,10 +1369,12 @@ static int __devinit azx_pcm_create(struct azx *chip) | |||
1338 | if (codec->pcm_info[c].is_modem) | 1369 | if (codec->pcm_info[c].is_modem) |
1339 | continue; /* create later */ | 1370 | continue; /* create later */ |
1340 | if (pcm_dev >= AZX_MAX_AUDIO_PCMS) { | 1371 | if (pcm_dev >= AZX_MAX_AUDIO_PCMS) { |
1341 | snd_printk(KERN_ERR SFX "Too many audio PCMs\n"); | 1372 | snd_printk(KERN_ERR SFX |
1373 | "Too many audio PCMs\n"); | ||
1342 | return -EINVAL; | 1374 | return -EINVAL; |
1343 | } | 1375 | } |
1344 | err = create_codec_pcm(chip, codec, &codec->pcm_info[c], pcm_dev); | 1376 | err = create_codec_pcm(chip, codec, |
1377 | &codec->pcm_info[c], pcm_dev); | ||
1345 | if (err < 0) | 1378 | if (err < 0) |
1346 | return err; | 1379 | return err; |
1347 | pcm_dev++; | 1380 | pcm_dev++; |
@@ -1353,13 +1386,15 @@ static int __devinit azx_pcm_create(struct azx *chip) | |||
1353 | list_for_each(p, &chip->bus->codec_list) { | 1386 | list_for_each(p, &chip->bus->codec_list) { |
1354 | codec = list_entry(p, struct hda_codec, list); | 1387 | codec = list_entry(p, struct hda_codec, list); |
1355 | for (c = 0; c < codec->num_pcms; c++) { | 1388 | for (c = 0; c < codec->num_pcms; c++) { |
1356 | if (! codec->pcm_info[c].is_modem) | 1389 | if (!codec->pcm_info[c].is_modem) |
1357 | continue; /* already created */ | 1390 | continue; /* already created */ |
1358 | if (pcm_dev >= AZX_MAX_PCMS) { | 1391 | if (pcm_dev >= AZX_MAX_PCMS) { |
1359 | snd_printk(KERN_ERR SFX "Too many modem PCMs\n"); | 1392 | snd_printk(KERN_ERR SFX |
1393 | "Too many modem PCMs\n"); | ||
1360 | return -EINVAL; | 1394 | return -EINVAL; |
1361 | } | 1395 | } |
1362 | err = create_codec_pcm(chip, codec, &codec->pcm_info[c], pcm_dev); | 1396 | err = create_codec_pcm(chip, codec, |
1397 | &codec->pcm_info[c], pcm_dev); | ||
1363 | if (err < 0) | 1398 | if (err < 0) |
1364 | return err; | 1399 | return err; |
1365 | chip->pcm[pcm_dev]->dev_class = SNDRV_PCM_CLASS_MODEM; | 1400 | chip->pcm[pcm_dev]->dev_class = SNDRV_PCM_CLASS_MODEM; |
@@ -1386,7 +1421,8 @@ static int __devinit azx_init_stream(struct azx *chip) | |||
1386 | int i; | 1421 | int i; |
1387 | 1422 | ||
1388 | /* initialize each stream (aka device) | 1423 | /* initialize each stream (aka device) |
1389 | * assign the starting bdl address to each stream (device) and initialize | 1424 | * assign the starting bdl address to each stream (device) |
1425 | * and initialize | ||
1390 | */ | 1426 | */ |
1391 | for (i = 0; i < chip->num_streams; i++) { | 1427 | for (i = 0; i < chip->num_streams; i++) { |
1392 | unsigned int off = sizeof(u32) * (i * AZX_MAX_FRAG * 4); | 1428 | unsigned int off = sizeof(u32) * (i * AZX_MAX_FRAG * 4); |
@@ -1650,28 +1686,35 @@ static int __devinit azx_create(struct snd_card *card, struct pci_dev *pci, | |||
1650 | break; | 1686 | break; |
1651 | } | 1687 | } |
1652 | chip->num_streams = chip->playback_streams + chip->capture_streams; | 1688 | chip->num_streams = chip->playback_streams + chip->capture_streams; |
1653 | chip->azx_dev = kcalloc(chip->num_streams, sizeof(*chip->azx_dev), GFP_KERNEL); | 1689 | chip->azx_dev = kcalloc(chip->num_streams, sizeof(*chip->azx_dev), |
1690 | GFP_KERNEL); | ||
1654 | if (!chip->azx_dev) { | 1691 | if (!chip->azx_dev) { |
1655 | snd_printk(KERN_ERR "cannot malloc azx_dev\n"); | 1692 | snd_printk(KERN_ERR "cannot malloc azx_dev\n"); |
1656 | goto errout; | 1693 | goto errout; |
1657 | } | 1694 | } |
1658 | 1695 | ||
1659 | /* allocate memory for the BDL for each stream */ | 1696 | /* allocate memory for the BDL for each stream */ |
1660 | if ((err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), | 1697 | err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, |
1661 | BDL_SIZE, &chip->bdl)) < 0) { | 1698 | snd_dma_pci_data(chip->pci), |
1699 | BDL_SIZE, &chip->bdl); | ||
1700 | if (err < 0) { | ||
1662 | snd_printk(KERN_ERR SFX "cannot allocate BDL\n"); | 1701 | snd_printk(KERN_ERR SFX "cannot allocate BDL\n"); |
1663 | goto errout; | 1702 | goto errout; |
1664 | } | 1703 | } |
1665 | /* allocate memory for the position buffer */ | 1704 | /* allocate memory for the position buffer */ |
1666 | if ((err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), | 1705 | err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, |
1667 | chip->num_streams * 8, &chip->posbuf)) < 0) { | 1706 | snd_dma_pci_data(chip->pci), |
1707 | chip->num_streams * 8, &chip->posbuf); | ||
1708 | if (err < 0) { | ||
1668 | snd_printk(KERN_ERR SFX "cannot allocate posbuf\n"); | 1709 | snd_printk(KERN_ERR SFX "cannot allocate posbuf\n"); |
1669 | goto errout; | 1710 | goto errout; |
1670 | } | 1711 | } |
1671 | /* allocate CORB/RIRB */ | 1712 | /* allocate CORB/RIRB */ |
1672 | if (! chip->single_cmd) | 1713 | if (!chip->single_cmd) { |
1673 | if ((err = azx_alloc_cmd_io(chip)) < 0) | 1714 | err = azx_alloc_cmd_io(chip); |
1715 | if (err < 0) | ||
1674 | goto errout; | 1716 | goto errout; |
1717 | } | ||
1675 | 1718 | ||
1676 | /* initialize streams */ | 1719 | /* initialize streams */ |
1677 | azx_init_stream(chip); | 1720 | azx_init_stream(chip); |
@@ -1688,14 +1731,16 @@ static int __devinit azx_create(struct snd_card *card, struct pci_dev *pci, | |||
1688 | goto errout; | 1731 | goto errout; |
1689 | } | 1732 | } |
1690 | 1733 | ||
1691 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) <0) { | 1734 | err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); |
1735 | if (err <0) { | ||
1692 | snd_printk(KERN_ERR SFX "Error creating device [card]!\n"); | 1736 | snd_printk(KERN_ERR SFX "Error creating device [card]!\n"); |
1693 | goto errout; | 1737 | goto errout; |
1694 | } | 1738 | } |
1695 | 1739 | ||
1696 | strcpy(card->driver, "HDA-Intel"); | 1740 | strcpy(card->driver, "HDA-Intel"); |
1697 | strcpy(card->shortname, driver_short_names[chip->driver_type]); | 1741 | strcpy(card->shortname, driver_short_names[chip->driver_type]); |
1698 | sprintf(card->longname, "%s at 0x%lx irq %i", card->shortname, chip->addr, chip->irq); | 1742 | sprintf(card->longname, "%s at 0x%lx irq %i", |
1743 | card->shortname, chip->addr, chip->irq); | ||
1699 | 1744 | ||
1700 | *rchip = chip; | 1745 | *rchip = chip; |
1701 | return 0; | 1746 | return 0; |
@@ -1705,7 +1750,8 @@ static int __devinit azx_create(struct snd_card *card, struct pci_dev *pci, | |||
1705 | return err; | 1750 | return err; |
1706 | } | 1751 | } |
1707 | 1752 | ||
1708 | static int __devinit azx_probe(struct pci_dev *pci, const struct pci_device_id *pci_id) | 1753 | static int __devinit azx_probe(struct pci_dev *pci, |
1754 | const struct pci_device_id *pci_id) | ||
1709 | { | 1755 | { |
1710 | struct snd_card *card; | 1756 | struct snd_card *card; |
1711 | struct azx *chip; | 1757 | struct azx *chip; |
@@ -1725,26 +1771,30 @@ static int __devinit azx_probe(struct pci_dev *pci, const struct pci_device_id * | |||
1725 | card->private_data = chip; | 1771 | card->private_data = chip; |
1726 | 1772 | ||
1727 | /* create codec instances */ | 1773 | /* create codec instances */ |
1728 | if ((err = azx_codec_create(chip, model)) < 0) { | 1774 | err = azx_codec_create(chip, model); |
1775 | if (err < 0) { | ||
1729 | snd_card_free(card); | 1776 | snd_card_free(card); |
1730 | return err; | 1777 | return err; |
1731 | } | 1778 | } |
1732 | 1779 | ||
1733 | /* create PCM streams */ | 1780 | /* create PCM streams */ |
1734 | if ((err = azx_pcm_create(chip)) < 0) { | 1781 | err = azx_pcm_create(chip); |
1782 | if (err < 0) { | ||
1735 | snd_card_free(card); | 1783 | snd_card_free(card); |
1736 | return err; | 1784 | return err; |
1737 | } | 1785 | } |
1738 | 1786 | ||
1739 | /* create mixer controls */ | 1787 | /* create mixer controls */ |
1740 | if ((err = azx_mixer_create(chip)) < 0) { | 1788 | err = azx_mixer_create(chip); |
1789 | if (err < 0) { | ||
1741 | snd_card_free(card); | 1790 | snd_card_free(card); |
1742 | return err; | 1791 | return err; |
1743 | } | 1792 | } |
1744 | 1793 | ||
1745 | snd_card_set_dev(card, &pci->dev); | 1794 | snd_card_set_dev(card, &pci->dev); |
1746 | 1795 | ||
1747 | if ((err = snd_card_register(card)) < 0) { | 1796 | err = snd_card_register(card); |
1797 | if (err < 0) { | ||
1748 | snd_card_free(card); | 1798 | snd_card_free(card); |
1749 | return err; | 1799 | return err; |
1750 | } | 1800 | } |