diff options
author | Andrew Paprocki <andrew@ishiboo.com> | 2008-01-18 06:51:11 -0500 |
---|---|---|
committer | Jaroslav Kysela <perex@perex.cz> | 2008-01-31 11:30:04 -0500 |
commit | 797760ab14db4e82a50c06a9916dd5c6147b415b (patch) | |
tree | c60c279c9dbbe81d399a0d6a7648cfacb2bef60d /sound/pci/hda/hda_codec.h | |
parent | e0059549345903195d6eb796c22048204c40a785 (diff) |
[ALSA] hda_proc - Add a number of new settings to proc codec output
This patch adds additional output to the /proc codec#X info.
The following pieces of information are added to the output:
- Balanced, L/R swap, trigger, impedance sense pin capabilities
- Vref pin capabilities
- Current Vref pin widget control setting
- Default configuration association, sequence, and misc bit test
- EAPD/BTL bits conveying balanced mode, EAPD, and L/R swap
- Power state modified to show state name as well as setting vs actual value
- GPIO parameter output on Audio Function Group, including enumeration of IO
pins which are indicated present (Any I and O pins are not output at this
time)
- Stripe and L/R swap widget capabilities
- All digital converter bits: enable, validity, validity config, preemphasis,
copyright, non-audio, professional, generation level, and content category
- Converter stream and channel values for in/out widgets
- SDI select value for in widgets
- Unsolicited response widget capability tag and enabled bit
- Delay widget capability value
- Processing widget capability benign bit and number of coefficients
- Realtek Define Registers: processing coefficient, coefficient index
[Also, fixed space/tab issues and make codes a bit more readable
-- Takashi]
Signed-off-by: Andrew Paprocki <andrew@ishiboo.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Jaroslav Kysela <perex@perex.cz>
Diffstat (limited to 'sound/pci/hda/hda_codec.h')
-rw-r--r-- | sound/pci/hda/hda_codec.h | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/sound/pci/hda/hda_codec.h b/sound/pci/hda/hda_codec.h index 719e46f6fb36..eb4a2ae792e9 100644 --- a/sound/pci/hda/hda_codec.h +++ b/sound/pci/hda/hda_codec.h | |||
@@ -84,7 +84,9 @@ enum { | |||
84 | #define AC_VERB_GET_GPIO_DATA 0x0f15 | 84 | #define AC_VERB_GET_GPIO_DATA 0x0f15 |
85 | #define AC_VERB_GET_GPIO_MASK 0x0f16 | 85 | #define AC_VERB_GET_GPIO_MASK 0x0f16 |
86 | #define AC_VERB_GET_GPIO_DIRECTION 0x0f17 | 86 | #define AC_VERB_GET_GPIO_DIRECTION 0x0f17 |
87 | #define AC_VERB_GET_GPIO_WAKE_MASK 0x0f18 | ||
87 | #define AC_VERB_GET_GPIO_UNSOLICITED_RSP_MASK 0x0f19 | 88 | #define AC_VERB_GET_GPIO_UNSOLICITED_RSP_MASK 0x0f19 |
89 | #define AC_VERB_GET_GPIO_STICKY_MASK 0x0f1a | ||
88 | #define AC_VERB_GET_CONFIG_DEFAULT 0x0f1c | 90 | #define AC_VERB_GET_CONFIG_DEFAULT 0x0f1c |
89 | /* f20: AFG/MFG */ | 91 | /* f20: AFG/MFG */ |
90 | #define AC_VERB_GET_SUBSYSTEM_ID 0x0f20 | 92 | #define AC_VERB_GET_SUBSYSTEM_ID 0x0f20 |
@@ -112,7 +114,9 @@ enum { | |||
112 | #define AC_VERB_SET_GPIO_DATA 0x715 | 114 | #define AC_VERB_SET_GPIO_DATA 0x715 |
113 | #define AC_VERB_SET_GPIO_MASK 0x716 | 115 | #define AC_VERB_SET_GPIO_MASK 0x716 |
114 | #define AC_VERB_SET_GPIO_DIRECTION 0x717 | 116 | #define AC_VERB_SET_GPIO_DIRECTION 0x717 |
117 | #define AC_VERB_SET_GPIO_WAKE_MASK 0x718 | ||
115 | #define AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK 0x719 | 118 | #define AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK 0x719 |
119 | #define AC_VERB_SET_GPIO_STICKY_MASK 0x71a | ||
116 | #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_0 0x71c | 120 | #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_0 0x71c |
117 | #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_1 0x71d | 121 | #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_1 0x71d |
118 | #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_2 0x71e | 122 | #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_2 0x71e |
@@ -185,6 +189,27 @@ enum { | |||
185 | #define AC_SUPFMT_FLOAT32 (1<<1) | 189 | #define AC_SUPFMT_FLOAT32 (1<<1) |
186 | #define AC_SUPFMT_AC3 (1<<2) | 190 | #define AC_SUPFMT_AC3 (1<<2) |
187 | 191 | ||
192 | /* GP I/O count */ | ||
193 | #define AC_GPIO_IO_COUNT (0xff<<0) | ||
194 | #define AC_GPIO_O_COUNT (0xff<<8) | ||
195 | #define AC_GPIO_O_COUNT_SHIFT 8 | ||
196 | #define AC_GPIO_I_COUNT (0xff<<16) | ||
197 | #define AC_GPIO_I_COUNT_SHIFT 16 | ||
198 | #define AC_GPIO_UNSOLICITED (1<<30) | ||
199 | #define AC_GPIO_WAKE (1<<31) | ||
200 | |||
201 | /* Converter stream, channel */ | ||
202 | #define AC_CONV_CHANNEL (0xf<<0) | ||
203 | #define AC_CONV_STREAM (0xf<<4) | ||
204 | #define AC_CONV_STREAM_SHIFT 4 | ||
205 | |||
206 | /* Input converter SDI select */ | ||
207 | #define AC_SDI_SELECT (0xf<<0) | ||
208 | |||
209 | /* Unsolicited response */ | ||
210 | #define AC_UNSOL_TAG (0x3f<<0) | ||
211 | #define AC_UNSOL_ENABLED (1<<7) | ||
212 | |||
188 | /* Pin widget capabilies */ | 213 | /* Pin widget capabilies */ |
189 | #define AC_PINCAP_IMP_SENSE (1<<0) /* impedance sense capable */ | 214 | #define AC_PINCAP_IMP_SENSE (1<<0) /* impedance sense capable */ |
190 | #define AC_PINCAP_TRIG_REQ (1<<1) /* trigger required */ | 215 | #define AC_PINCAP_TRIG_REQ (1<<1) /* trigger required */ |
@@ -230,6 +255,9 @@ enum { | |||
230 | #define AC_PWRST_D3SUP (1<<3) | 255 | #define AC_PWRST_D3SUP (1<<3) |
231 | 256 | ||
232 | /* Power state values */ | 257 | /* Power state values */ |
258 | #define AC_PWRST_SETTING (0xf<<0) | ||
259 | #define AC_PWRST_ACTUAL (0xf<<4) | ||
260 | #define AC_PWRST_ACTUAL_SHIFT 4 | ||
233 | #define AC_PWRST_D0 0x00 | 261 | #define AC_PWRST_D0 0x00 |
234 | #define AC_PWRST_D1 0x01 | 262 | #define AC_PWRST_D1 0x01 |
235 | #define AC_PWRST_D2 0x02 | 263 | #define AC_PWRST_D2 0x02 |
@@ -238,6 +266,7 @@ enum { | |||
238 | /* Processing capabilies */ | 266 | /* Processing capabilies */ |
239 | #define AC_PCAP_BENIGN (1<<0) | 267 | #define AC_PCAP_BENIGN (1<<0) |
240 | #define AC_PCAP_NUM_COEF (0xff<<8) | 268 | #define AC_PCAP_NUM_COEF (0xff<<8) |
269 | #define AC_PCAP_NUM_COEF_SHIFT 8 | ||
241 | 270 | ||
242 | /* Volume knobs capabilities */ | 271 | /* Volume knobs capabilities */ |
243 | #define AC_KNBCAP_NUM_STEPS (0x7f<<0) | 272 | #define AC_KNBCAP_NUM_STEPS (0x7f<<0) |
@@ -274,6 +303,9 @@ enum { | |||
274 | #define AC_DIG1_PROFESSIONAL (1<<6) | 303 | #define AC_DIG1_PROFESSIONAL (1<<6) |
275 | #define AC_DIG1_LEVEL (1<<7) | 304 | #define AC_DIG1_LEVEL (1<<7) |
276 | 305 | ||
306 | /* DIGITAL2 bits */ | ||
307 | #define AC_DIG2_CC (0x7f<<0) | ||
308 | |||
277 | /* Pin widget control - 8bit */ | 309 | /* Pin widget control - 8bit */ |
278 | #define AC_PINCTL_VREFEN (0x7<<0) | 310 | #define AC_PINCTL_VREFEN (0x7<<0) |
279 | #define AC_PINCTL_VREF_HIZ 0 /* Hi-Z */ | 311 | #define AC_PINCTL_VREF_HIZ 0 /* Hi-Z */ |
@@ -288,12 +320,22 @@ enum { | |||
288 | /* Unsolicited response - 8bit */ | 320 | /* Unsolicited response - 8bit */ |
289 | #define AC_USRSP_EN (1<<7) | 321 | #define AC_USRSP_EN (1<<7) |
290 | 322 | ||
323 | /* Pin sense - 32bit */ | ||
324 | #define AC_PINSENSE_IMPEDANCE_MASK (0x7fffffff) | ||
325 | #define AC_PINSENSE_PRESENCE (1<<31) | ||
326 | |||
327 | /* EAPD/BTL enable - 32bit */ | ||
328 | #define AC_EAPDBTL_BALANCED (1<<0) | ||
329 | #define AC_EAPDBTL_EAPD (1<<1) | ||
330 | #define AC_EAPDBTL_LR_SWAP (1<<2) | ||
331 | |||
291 | /* configuration default - 32bit */ | 332 | /* configuration default - 32bit */ |
292 | #define AC_DEFCFG_SEQUENCE (0xf<<0) | 333 | #define AC_DEFCFG_SEQUENCE (0xf<<0) |
293 | #define AC_DEFCFG_DEF_ASSOC (0xf<<4) | 334 | #define AC_DEFCFG_DEF_ASSOC (0xf<<4) |
294 | #define AC_DEFCFG_ASSOC_SHIFT 4 | 335 | #define AC_DEFCFG_ASSOC_SHIFT 4 |
295 | #define AC_DEFCFG_MISC (0xf<<8) | 336 | #define AC_DEFCFG_MISC (0xf<<8) |
296 | #define AC_DEFCFG_MISC_SHIFT 8 | 337 | #define AC_DEFCFG_MISC_SHIFT 8 |
338 | #define AC_DEFCFG_MISC_NO_PRESENCE (1<<0) | ||
297 | #define AC_DEFCFG_COLOR (0xf<<12) | 339 | #define AC_DEFCFG_COLOR (0xf<<12) |
298 | #define AC_DEFCFG_COLOR_SHIFT 12 | 340 | #define AC_DEFCFG_COLOR_SHIFT 12 |
299 | #define AC_DEFCFG_CONN_TYPE (0xf<<16) | 341 | #define AC_DEFCFG_CONN_TYPE (0xf<<16) |