diff options
author | Ctirad Fertr <c.fertr@gmail.com> | 2007-12-13 10:27:13 -0500 |
---|---|---|
committer | Mercurial server <hg@alsa0.alsa-project.org> | 2008-01-31 11:30:24 -0500 |
commit | 1c02e36681ae20a796204e8d629d13fa9d5e20b5 (patch) | |
tree | 7ae5336de469988b889fd57be64bd2f531213c98 /sound/pci/emu10k1 | |
parent | 190d2c46e52592ba092e8bf8acd4427c920f2d69 (diff) |
[ALSA] emu10k1 - 1616(M) cardbus improvements
This patch improves E-Mu 1616(M) cardbus support. It adds definitions of the
new Microdock and 1010 cardbus registers (thanks again for descriptions
James) and improves mixer for this card. Now you can use S/PDIF and ADAT on
Mirodock and also use headpohone output on host cardbus card as another
independent output.
Signed-off-by: Ctirad Fertr <c.fertr@gmail.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Jaroslav Kysela <perex@perex.cz>
Diffstat (limited to 'sound/pci/emu10k1')
-rw-r--r-- | sound/pci/emu10k1/emu10k1_main.c | 181 | ||||
-rw-r--r-- | sound/pci/emu10k1/emumixer.c | 269 |
2 files changed, 351 insertions, 99 deletions
diff --git a/sound/pci/emu10k1/emu10k1_main.c b/sound/pci/emu10k1/emu10k1_main.c index da660676680e..54b978e74f58 100644 --- a/sound/pci/emu10k1/emu10k1_main.c +++ b/sound/pci/emu10k1/emu10k1_main.c | |||
@@ -1103,79 +1103,114 @@ static int snd_emu10k1_emu1010_init(struct snd_emu10k1 * emu) | |||
1103 | EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */ | 1103 | EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */ |
1104 | #endif | 1104 | #endif |
1105 | /* Default outputs */ | 1105 | /* Default outputs */ |
1106 | snd_emu1010_fpga_link_dst_src_write(emu, | 1106 | if (emu->card_capabilities->emu_model == 3) { |
1107 | EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */ | 1107 | /* 1616(M) cardbus default outputs */ |
1108 | emu->emu1010.output_source[0] = 21; | 1108 | /* ALICE2 bus 0xa0 */ |
1109 | snd_emu1010_fpga_link_dst_src_write(emu, | 1109 | snd_emu1010_fpga_link_dst_src_write(emu, |
1110 | EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); | 1110 | EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0); |
1111 | emu->emu1010.output_source[1] = 22; | 1111 | emu->emu1010.output_source[0] = 17; |
1112 | snd_emu1010_fpga_link_dst_src_write(emu, | 1112 | snd_emu1010_fpga_link_dst_src_write(emu, |
1113 | EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2); | 1113 | EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); |
1114 | emu->emu1010.output_source[2] = 23; | 1114 | emu->emu1010.output_source[1] = 18; |
1115 | snd_emu1010_fpga_link_dst_src_write(emu, | 1115 | snd_emu1010_fpga_link_dst_src_write(emu, |
1116 | EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); | 1116 | EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2); |
1117 | emu->emu1010.output_source[3] = 24; | 1117 | emu->emu1010.output_source[2] = 19; |
1118 | snd_emu1010_fpga_link_dst_src_write(emu, | 1118 | snd_emu1010_fpga_link_dst_src_write(emu, |
1119 | EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4); | 1119 | EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); |
1120 | emu->emu1010.output_source[4] = 25; | 1120 | emu->emu1010.output_source[3] = 20; |
1121 | snd_emu1010_fpga_link_dst_src_write(emu, | 1121 | snd_emu1010_fpga_link_dst_src_write(emu, |
1122 | EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5); | 1122 | EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4); |
1123 | emu->emu1010.output_source[5] = 26; | 1123 | emu->emu1010.output_source[4] = 21; |
1124 | snd_emu1010_fpga_link_dst_src_write(emu, | 1124 | snd_emu1010_fpga_link_dst_src_write(emu, |
1125 | EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6); | 1125 | EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5); |
1126 | emu->emu1010.output_source[6] = 27; | 1126 | emu->emu1010.output_source[5] = 22; |
1127 | snd_emu1010_fpga_link_dst_src_write(emu, | 1127 | /* ALICE2 bus 0xa0 */ |
1128 | EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7); | 1128 | snd_emu1010_fpga_link_dst_src_write(emu, |
1129 | emu->emu1010.output_source[7] = 28; | 1129 | EMU_DST_MANA_DAC_LEFT, EMU_SRC_ALICE_EMU32A + 0); |
1130 | snd_emu1010_fpga_link_dst_src_write(emu, | 1130 | emu->emu1010.output_source[16] = 17; |
1131 | EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */ | 1131 | snd_emu1010_fpga_link_dst_src_write(emu, |
1132 | emu->emu1010.output_source[8] = 21; | 1132 | EMU_DST_MANA_DAC_RIGHT, EMU_SRC_ALICE_EMU32A + 1); |
1133 | snd_emu1010_fpga_link_dst_src_write(emu, | 1133 | emu->emu1010.output_source[17] = 18; |
1134 | EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); | 1134 | } else { |
1135 | emu->emu1010.output_source[9] = 22; | 1135 | /* ALICE2 bus 0xa0 */ |
1136 | snd_emu1010_fpga_link_dst_src_write(emu, | 1136 | snd_emu1010_fpga_link_dst_src_write(emu, |
1137 | EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */ | 1137 | EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0); |
1138 | emu->emu1010.output_source[10] = 21; | 1138 | emu->emu1010.output_source[0] = 21; |
1139 | snd_emu1010_fpga_link_dst_src_write(emu, | 1139 | snd_emu1010_fpga_link_dst_src_write(emu, |
1140 | EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); | 1140 | EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); |
1141 | emu->emu1010.output_source[11] = 22; | 1141 | emu->emu1010.output_source[1] = 22; |
1142 | snd_emu1010_fpga_link_dst_src_write(emu, | 1142 | snd_emu1010_fpga_link_dst_src_write(emu, |
1143 | EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */ | 1143 | EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2); |
1144 | emu->emu1010.output_source[12] = 21; | 1144 | emu->emu1010.output_source[2] = 23; |
1145 | snd_emu1010_fpga_link_dst_src_write(emu, | 1145 | snd_emu1010_fpga_link_dst_src_write(emu, |
1146 | EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); | 1146 | EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); |
1147 | emu->emu1010.output_source[13] = 22; | 1147 | emu->emu1010.output_source[3] = 24; |
1148 | snd_emu1010_fpga_link_dst_src_write(emu, | 1148 | snd_emu1010_fpga_link_dst_src_write(emu, |
1149 | EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */ | 1149 | EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4); |
1150 | emu->emu1010.output_source[14] = 21; | 1150 | emu->emu1010.output_source[4] = 25; |
1151 | snd_emu1010_fpga_link_dst_src_write(emu, | 1151 | snd_emu1010_fpga_link_dst_src_write(emu, |
1152 | EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); | 1152 | EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5); |
1153 | emu->emu1010.output_source[15] = 22; | 1153 | emu->emu1010.output_source[5] = 26; |
1154 | snd_emu1010_fpga_link_dst_src_write(emu, | 1154 | snd_emu1010_fpga_link_dst_src_write(emu, |
1155 | EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */ | 1155 | EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6); |
1156 | emu->emu1010.output_source[16] = 21; | 1156 | emu->emu1010.output_source[6] = 27; |
1157 | snd_emu1010_fpga_link_dst_src_write(emu, | 1157 | snd_emu1010_fpga_link_dst_src_write(emu, |
1158 | EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1); | 1158 | EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7); |
1159 | emu->emu1010.output_source[17] = 22; | 1159 | emu->emu1010.output_source[7] = 28; |
1160 | snd_emu1010_fpga_link_dst_src_write(emu, | 1160 | /* ALICE2 bus 0xa0 */ |
1161 | EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2); | 1161 | snd_emu1010_fpga_link_dst_src_write(emu, |
1162 | emu->emu1010.output_source[18] = 23; | 1162 | EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0); |
1163 | snd_emu1010_fpga_link_dst_src_write(emu, | 1163 | emu->emu1010.output_source[8] = 21; |
1164 | EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3); | 1164 | snd_emu1010_fpga_link_dst_src_write(emu, |
1165 | emu->emu1010.output_source[19] = 24; | 1165 | EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); |
1166 | snd_emu1010_fpga_link_dst_src_write(emu, | 1166 | emu->emu1010.output_source[9] = 22; |
1167 | EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4); | 1167 | /* ALICE2 bus 0xa0 */ |
1168 | emu->emu1010.output_source[20] = 25; | 1168 | snd_emu1010_fpga_link_dst_src_write(emu, |
1169 | snd_emu1010_fpga_link_dst_src_write(emu, | 1169 | EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0); |
1170 | EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5); | 1170 | emu->emu1010.output_source[10] = 21; |
1171 | emu->emu1010.output_source[21] = 26; | 1171 | snd_emu1010_fpga_link_dst_src_write(emu, |
1172 | snd_emu1010_fpga_link_dst_src_write(emu, | 1172 | EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); |
1173 | EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6); | 1173 | emu->emu1010.output_source[11] = 22; |
1174 | emu->emu1010.output_source[22] = 27; | 1174 | /* ALICE2 bus 0xa0 */ |
1175 | snd_emu1010_fpga_link_dst_src_write(emu, | 1175 | snd_emu1010_fpga_link_dst_src_write(emu, |
1176 | EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7); | 1176 | EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0); |
1177 | emu->emu1010.output_source[23] = 28; | 1177 | emu->emu1010.output_source[12] = 21; |
1178 | 1178 | snd_emu1010_fpga_link_dst_src_write(emu, | |
1179 | EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); | ||
1180 | emu->emu1010.output_source[13] = 22; | ||
1181 | /* ALICE2 bus 0xa0 */ | ||
1182 | snd_emu1010_fpga_link_dst_src_write(emu, | ||
1183 | EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0); | ||
1184 | emu->emu1010.output_source[14] = 21; | ||
1185 | snd_emu1010_fpga_link_dst_src_write(emu, | ||
1186 | EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); | ||
1187 | emu->emu1010.output_source[15] = 22; | ||
1188 | /* ALICE2 bus 0xa0 */ | ||
1189 | snd_emu1010_fpga_link_dst_src_write(emu, | ||
1190 | EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0); | ||
1191 | emu->emu1010.output_source[16] = 21; | ||
1192 | snd_emu1010_fpga_link_dst_src_write(emu, | ||
1193 | EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1); | ||
1194 | emu->emu1010.output_source[17] = 22; | ||
1195 | snd_emu1010_fpga_link_dst_src_write(emu, | ||
1196 | EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2); | ||
1197 | emu->emu1010.output_source[18] = 23; | ||
1198 | snd_emu1010_fpga_link_dst_src_write(emu, | ||
1199 | EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3); | ||
1200 | emu->emu1010.output_source[19] = 24; | ||
1201 | snd_emu1010_fpga_link_dst_src_write(emu, | ||
1202 | EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4); | ||
1203 | emu->emu1010.output_source[20] = 25; | ||
1204 | snd_emu1010_fpga_link_dst_src_write(emu, | ||
1205 | EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5); | ||
1206 | emu->emu1010.output_source[21] = 26; | ||
1207 | snd_emu1010_fpga_link_dst_src_write(emu, | ||
1208 | EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6); | ||
1209 | emu->emu1010.output_source[22] = 27; | ||
1210 | snd_emu1010_fpga_link_dst_src_write(emu, | ||
1211 | EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7); | ||
1212 | emu->emu1010.output_source[23] = 28; | ||
1213 | } | ||
1179 | /* TEMP: Select SPDIF in/out */ | 1214 | /* TEMP: Select SPDIF in/out */ |
1180 | //snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); /* Output spdif */ | 1215 | //snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); /* Output spdif */ |
1181 | 1216 | ||
diff --git a/sound/pci/emu10k1/emumixer.c b/sound/pci/emu10k1/emumixer.c index 83acfa6e9317..9b5883b79578 100644 --- a/sound/pci/emu10k1/emumixer.c +++ b/sound/pci/emu10k1/emumixer.c | |||
@@ -139,6 +139,61 @@ static char *emu1010_src_texts[] = { | |||
139 | "DSP 31", | 139 | "DSP 31", |
140 | }; | 140 | }; |
141 | 141 | ||
142 | /* 1616(m) cardbus */ | ||
143 | |||
144 | static char *emu1616_src_texts[] = { | ||
145 | "Silence", | ||
146 | "Dock Mic A", | ||
147 | "Dock Mic B", | ||
148 | "Dock ADC1 Left", | ||
149 | "Dock ADC1 Right", | ||
150 | "Dock ADC2 Left", | ||
151 | "Dock ADC2 Right", | ||
152 | "Dock SPDIF Left", | ||
153 | "Dock SPDIF Right", | ||
154 | "ADAT 0", | ||
155 | "ADAT 1", | ||
156 | "ADAT 2", | ||
157 | "ADAT 3", | ||
158 | "ADAT 4", | ||
159 | "ADAT 5", | ||
160 | "ADAT 6", | ||
161 | "ADAT 7", | ||
162 | "DSP 0", | ||
163 | "DSP 1", | ||
164 | "DSP 2", | ||
165 | "DSP 3", | ||
166 | "DSP 4", | ||
167 | "DSP 5", | ||
168 | "DSP 6", | ||
169 | "DSP 7", | ||
170 | "DSP 8", | ||
171 | "DSP 9", | ||
172 | "DSP 10", | ||
173 | "DSP 11", | ||
174 | "DSP 12", | ||
175 | "DSP 13", | ||
176 | "DSP 14", | ||
177 | "DSP 15", | ||
178 | "DSP 16", | ||
179 | "DSP 17", | ||
180 | "DSP 18", | ||
181 | "DSP 19", | ||
182 | "DSP 20", | ||
183 | "DSP 21", | ||
184 | "DSP 22", | ||
185 | "DSP 23", | ||
186 | "DSP 24", | ||
187 | "DSP 25", | ||
188 | "DSP 26", | ||
189 | "DSP 27", | ||
190 | "DSP 28", | ||
191 | "DSP 29", | ||
192 | "DSP 30", | ||
193 | "DSP 31", | ||
194 | }; | ||
195 | |||
196 | |||
142 | /* | 197 | /* |
143 | * List of data sources available for each destination | 198 | * List of data sources available for each destination |
144 | */ | 199 | */ |
@@ -198,6 +253,59 @@ static unsigned int emu1010_src_regs[] = { | |||
198 | EMU_SRC_ALICE_EMU32B+0xf, /* 52 */ | 253 | EMU_SRC_ALICE_EMU32B+0xf, /* 52 */ |
199 | }; | 254 | }; |
200 | 255 | ||
256 | /* 1616(m) cardbus */ | ||
257 | static unsigned int emu1616_src_regs[] = { | ||
258 | EMU_SRC_SILENCE, | ||
259 | EMU_SRC_DOCK_MIC_A1, | ||
260 | EMU_SRC_DOCK_MIC_B1, | ||
261 | EMU_SRC_DOCK_ADC1_LEFT1, | ||
262 | EMU_SRC_DOCK_ADC1_RIGHT1, | ||
263 | EMU_SRC_DOCK_ADC2_LEFT1, | ||
264 | EMU_SRC_DOCK_ADC2_RIGHT1, | ||
265 | EMU_SRC_MDOCK_SPDIF_LEFT1, | ||
266 | EMU_SRC_MDOCK_SPDIF_RIGHT1, | ||
267 | EMU_SRC_MDOCK_ADAT, | ||
268 | EMU_SRC_MDOCK_ADAT+1, | ||
269 | EMU_SRC_MDOCK_ADAT+2, | ||
270 | EMU_SRC_MDOCK_ADAT+3, | ||
271 | EMU_SRC_MDOCK_ADAT+4, | ||
272 | EMU_SRC_MDOCK_ADAT+5, | ||
273 | EMU_SRC_MDOCK_ADAT+6, | ||
274 | EMU_SRC_MDOCK_ADAT+7, | ||
275 | EMU_SRC_ALICE_EMU32A, | ||
276 | EMU_SRC_ALICE_EMU32A+1, | ||
277 | EMU_SRC_ALICE_EMU32A+2, | ||
278 | EMU_SRC_ALICE_EMU32A+3, | ||
279 | EMU_SRC_ALICE_EMU32A+4, | ||
280 | EMU_SRC_ALICE_EMU32A+5, | ||
281 | EMU_SRC_ALICE_EMU32A+6, | ||
282 | EMU_SRC_ALICE_EMU32A+7, | ||
283 | EMU_SRC_ALICE_EMU32A+8, | ||
284 | EMU_SRC_ALICE_EMU32A+9, | ||
285 | EMU_SRC_ALICE_EMU32A+0xa, | ||
286 | EMU_SRC_ALICE_EMU32A+0xb, | ||
287 | EMU_SRC_ALICE_EMU32A+0xc, | ||
288 | EMU_SRC_ALICE_EMU32A+0xd, | ||
289 | EMU_SRC_ALICE_EMU32A+0xe, | ||
290 | EMU_SRC_ALICE_EMU32A+0xf, | ||
291 | EMU_SRC_ALICE_EMU32B, | ||
292 | EMU_SRC_ALICE_EMU32B+1, | ||
293 | EMU_SRC_ALICE_EMU32B+2, | ||
294 | EMU_SRC_ALICE_EMU32B+3, | ||
295 | EMU_SRC_ALICE_EMU32B+4, | ||
296 | EMU_SRC_ALICE_EMU32B+5, | ||
297 | EMU_SRC_ALICE_EMU32B+6, | ||
298 | EMU_SRC_ALICE_EMU32B+7, | ||
299 | EMU_SRC_ALICE_EMU32B+8, | ||
300 | EMU_SRC_ALICE_EMU32B+9, | ||
301 | EMU_SRC_ALICE_EMU32B+0xa, | ||
302 | EMU_SRC_ALICE_EMU32B+0xb, | ||
303 | EMU_SRC_ALICE_EMU32B+0xc, | ||
304 | EMU_SRC_ALICE_EMU32B+0xd, | ||
305 | EMU_SRC_ALICE_EMU32B+0xe, | ||
306 | EMU_SRC_ALICE_EMU32B+0xf, | ||
307 | }; | ||
308 | |||
201 | /* | 309 | /* |
202 | * Data destinations - physical EMU outputs. | 310 | * Data destinations - physical EMU outputs. |
203 | * Each destination has an enum mixer control to choose a data source | 311 | * Each destination has an enum mixer control to choose a data source |
@@ -229,6 +337,28 @@ static unsigned int emu1010_output_dst[] = { | |||
229 | EMU_DST_HANA_ADAT+7, /* 23 */ | 337 | EMU_DST_HANA_ADAT+7, /* 23 */ |
230 | }; | 338 | }; |
231 | 339 | ||
340 | /* 1616(m) cardbus */ | ||
341 | static unsigned int emu1616_output_dst[] = { | ||
342 | EMU_DST_DOCK_DAC1_LEFT1, | ||
343 | EMU_DST_DOCK_DAC1_RIGHT1, | ||
344 | EMU_DST_DOCK_DAC2_LEFT1, | ||
345 | EMU_DST_DOCK_DAC2_RIGHT1, | ||
346 | EMU_DST_DOCK_DAC3_LEFT1, | ||
347 | EMU_DST_DOCK_DAC3_RIGHT1, | ||
348 | EMU_DST_MDOCK_SPDIF_LEFT1, | ||
349 | EMU_DST_MDOCK_SPDIF_RIGHT1, | ||
350 | EMU_DST_MDOCK_ADAT, | ||
351 | EMU_DST_MDOCK_ADAT+1, | ||
352 | EMU_DST_MDOCK_ADAT+2, | ||
353 | EMU_DST_MDOCK_ADAT+3, | ||
354 | EMU_DST_MDOCK_ADAT+4, | ||
355 | EMU_DST_MDOCK_ADAT+5, | ||
356 | EMU_DST_MDOCK_ADAT+6, | ||
357 | EMU_DST_MDOCK_ADAT+7, | ||
358 | EMU_DST_MANA_DAC_LEFT, | ||
359 | EMU_DST_MANA_DAC_RIGHT, | ||
360 | }; | ||
361 | |||
232 | /* | 362 | /* |
233 | * Data destinations - HANA outputs going to Alice2 (audigy) for | 363 | * Data destinations - HANA outputs going to Alice2 (audigy) for |
234 | * capture (EMU32 + I2S links) | 364 | * capture (EMU32 + I2S links) |
@@ -259,14 +389,26 @@ static unsigned int emu1010_input_dst[] = { | |||
259 | EMU_DST_ALICE_I2S2_RIGHT, | 389 | EMU_DST_ALICE_I2S2_RIGHT, |
260 | }; | 390 | }; |
261 | 391 | ||
262 | static int snd_emu1010_input_output_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) | 392 | static int snd_emu1010_input_output_source_info(struct snd_kcontrol *kcontrol, |
393 | struct snd_ctl_elem_info *uinfo) | ||
263 | { | 394 | { |
395 | struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol); | ||
396 | char **items; | ||
397 | |||
264 | uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; | 398 | uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; |
265 | uinfo->count = 1; | 399 | uinfo->count = 1; |
266 | uinfo->value.enumerated.items = 53; | 400 | if (emu->card_capabilities->emu_model == 3) { /* 1616(m) cardbus */ |
401 | uinfo->value.enumerated.items = 49; | ||
402 | items = emu1616_src_texts; | ||
403 | } else { | ||
404 | uinfo->value.enumerated.items = 53; | ||
405 | items = emu1010_src_texts; | ||
406 | } | ||
267 | if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) | 407 | if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) |
268 | uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; | 408 | uinfo->value.enumerated.item = |
269 | strcpy(uinfo->value.enumerated.name, emu1010_src_texts[uinfo->value.enumerated.item]); | 409 | uinfo->value.enumerated.items - 1; |
410 | strcpy(uinfo->value.enumerated.name, | ||
411 | items[uinfo->value.enumerated.item]); | ||
270 | return 0; | 412 | return 0; |
271 | } | 413 | } |
272 | 414 | ||
@@ -278,7 +420,8 @@ static int snd_emu1010_output_source_get(struct snd_kcontrol *kcontrol, | |||
278 | 420 | ||
279 | channel = (kcontrol->private_value) & 0xff; | 421 | channel = (kcontrol->private_value) & 0xff; |
280 | /* Limit: emu1010_output_dst, emu->emu1010.output_source */ | 422 | /* Limit: emu1010_output_dst, emu->emu1010.output_source */ |
281 | if (channel >= 24) | 423 | if (channel >= 24 || |
424 | (emu->card_capabilities->emu_model == 3 && channel >= 18)) | ||
282 | return -EINVAL; | 425 | return -EINVAL; |
283 | ucontrol->value.enumerated.item[0] = emu->emu1010.output_source[channel]; | 426 | ucontrol->value.enumerated.item[0] = emu->emu1010.output_source[channel]; |
284 | return 0; | 427 | return 0; |
@@ -288,24 +431,28 @@ static int snd_emu1010_output_source_put(struct snd_kcontrol *kcontrol, | |||
288 | struct snd_ctl_elem_value *ucontrol) | 431 | struct snd_ctl_elem_value *ucontrol) |
289 | { | 432 | { |
290 | struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol); | 433 | struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol); |
291 | int change = 0; | ||
292 | unsigned int val; | 434 | unsigned int val; |
293 | unsigned int channel; | 435 | unsigned int channel; |
294 | 436 | ||
295 | val = ucontrol->value.enumerated.item[0]; | 437 | val = ucontrol->value.enumerated.item[0]; |
296 | if (val >= 53) | 438 | if (val >= 53 || |
439 | (emu->card_capabilities->emu_model == 3 && val >= 49)) | ||
297 | return -EINVAL; | 440 | return -EINVAL; |
298 | channel = (kcontrol->private_value) & 0xff; | 441 | channel = (kcontrol->private_value) & 0xff; |
299 | /* Limit: emu1010_output_dst, emu->emu1010.output_source */ | 442 | /* Limit: emu1010_output_dst, emu->emu1010.output_source */ |
300 | if (channel >= 24) | 443 | if (channel >= 24 || |
444 | (emu->card_capabilities->emu_model == 3 && channel >= 18)) | ||
301 | return -EINVAL; | 445 | return -EINVAL; |
302 | if (emu->emu1010.output_source[channel] != val) { | 446 | if (emu->emu1010.output_source[channel] == val) |
303 | emu->emu1010.output_source[channel] = val; | 447 | return 0; |
304 | change = 1; | 448 | emu->emu1010.output_source[channel] = val; |
449 | if (emu->card_capabilities->emu_model == 3) /* 1616(m) cardbus */ | ||
450 | snd_emu1010_fpga_link_dst_src_write(emu, | ||
451 | emu1616_output_dst[channel], emu1616_src_regs[val]); | ||
452 | else | ||
305 | snd_emu1010_fpga_link_dst_src_write(emu, | 453 | snd_emu1010_fpga_link_dst_src_write(emu, |
306 | emu1010_output_dst[channel], emu1010_src_regs[val]); | 454 | emu1010_output_dst[channel], emu1010_src_regs[val]); |
307 | } | 455 | return 1; |
308 | return change; | ||
309 | } | 456 | } |
310 | 457 | ||
311 | static int snd_emu1010_input_source_get(struct snd_kcontrol *kcontrol, | 458 | static int snd_emu1010_input_source_get(struct snd_kcontrol *kcontrol, |
@@ -326,24 +473,27 @@ static int snd_emu1010_input_source_put(struct snd_kcontrol *kcontrol, | |||
326 | struct snd_ctl_elem_value *ucontrol) | 473 | struct snd_ctl_elem_value *ucontrol) |
327 | { | 474 | { |
328 | struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol); | 475 | struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol); |
329 | int change = 0; | ||
330 | unsigned int val; | 476 | unsigned int val; |
331 | unsigned int channel; | 477 | unsigned int channel; |
332 | 478 | ||
333 | val = ucontrol->value.enumerated.item[0]; | 479 | val = ucontrol->value.enumerated.item[0]; |
334 | if (val >= 53) | 480 | if (val >= 53 || |
481 | (emu->card_capabilities->emu_model == 3 && val >= 49)) | ||
335 | return -EINVAL; | 482 | return -EINVAL; |
336 | channel = (kcontrol->private_value) & 0xff; | 483 | channel = (kcontrol->private_value) & 0xff; |
337 | /* Limit: emu1010_input_dst, emu->emu1010.input_source */ | 484 | /* Limit: emu1010_input_dst, emu->emu1010.input_source */ |
338 | if (channel >= 22) | 485 | if (channel >= 22) |
339 | return -EINVAL; | 486 | return -EINVAL; |
340 | if (emu->emu1010.input_source[channel] != val) { | 487 | if (emu->emu1010.input_source[channel] == val) |
341 | emu->emu1010.input_source[channel] = val; | 488 | return 0; |
342 | change = 1; | 489 | emu->emu1010.input_source[channel] = val; |
490 | if (emu->card_capabilities->emu_model == 3) /* 1616(m) cardbus */ | ||
491 | snd_emu1010_fpga_link_dst_src_write(emu, | ||
492 | emu1010_input_dst[channel], emu1616_src_regs[val]); | ||
493 | else | ||
343 | snd_emu1010_fpga_link_dst_src_write(emu, | 494 | snd_emu1010_fpga_link_dst_src_write(emu, |
344 | emu1010_input_dst[channel], emu1010_src_regs[val]); | 495 | emu1010_input_dst[channel], emu1010_src_regs[val]); |
345 | } | 496 | return 1; |
346 | return change; | ||
347 | } | 497 | } |
348 | 498 | ||
349 | #define EMU1010_SOURCE_OUTPUT(xname,chid) \ | 499 | #define EMU1010_SOURCE_OUTPUT(xname,chid) \ |
@@ -383,6 +533,30 @@ static struct snd_kcontrol_new snd_emu1010_output_enum_ctls[] __devinitdata = { | |||
383 | EMU1010_SOURCE_OUTPUT("1010 ADAT 7 Playback Enum", 0x17), | 533 | EMU1010_SOURCE_OUTPUT("1010 ADAT 7 Playback Enum", 0x17), |
384 | }; | 534 | }; |
385 | 535 | ||
536 | |||
537 | /* 1616(m) cardbus */ | ||
538 | static struct snd_kcontrol_new snd_emu1616_output_enum_ctls[] __devinitdata = { | ||
539 | EMU1010_SOURCE_OUTPUT("Dock DAC1 Left Playback Enum", 0), | ||
540 | EMU1010_SOURCE_OUTPUT("Dock DAC1 Right Playback Enum", 1), | ||
541 | EMU1010_SOURCE_OUTPUT("Dock DAC2 Left Playback Enum", 2), | ||
542 | EMU1010_SOURCE_OUTPUT("Dock DAC2 Right Playback Enum", 3), | ||
543 | EMU1010_SOURCE_OUTPUT("Dock DAC3 Left Playback Enum", 4), | ||
544 | EMU1010_SOURCE_OUTPUT("Dock DAC3 Right Playback Enum", 5), | ||
545 | EMU1010_SOURCE_OUTPUT("Dock SPDIF Left Playback Enum", 6), | ||
546 | EMU1010_SOURCE_OUTPUT("Dock SPDIF Right Playback Enum", 7), | ||
547 | EMU1010_SOURCE_OUTPUT("Dock ADAT 0 Playback Enum", 8), | ||
548 | EMU1010_SOURCE_OUTPUT("Dock ADAT 1 Playback Enum", 9), | ||
549 | EMU1010_SOURCE_OUTPUT("Dock ADAT 2 Playback Enum", 0xa), | ||
550 | EMU1010_SOURCE_OUTPUT("Dock ADAT 3 Playback Enum", 0xb), | ||
551 | EMU1010_SOURCE_OUTPUT("Dock ADAT 4 Playback Enum", 0xc), | ||
552 | EMU1010_SOURCE_OUTPUT("Dock ADAT 5 Playback Enum", 0xd), | ||
553 | EMU1010_SOURCE_OUTPUT("Dock ADAT 6 Playback Enum", 0xe), | ||
554 | EMU1010_SOURCE_OUTPUT("Dock ADAT 7 Playback Enum", 0xf), | ||
555 | EMU1010_SOURCE_OUTPUT("Mana DAC Left Playback Enum", 0x10), | ||
556 | EMU1010_SOURCE_OUTPUT("Mana DAC Right Playback Enum", 0x11), | ||
557 | }; | ||
558 | |||
559 | |||
386 | #define EMU1010_SOURCE_INPUT(xname,chid) \ | 560 | #define EMU1010_SOURCE_INPUT(xname,chid) \ |
387 | { \ | 561 | { \ |
388 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | 562 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ |
@@ -1817,30 +1991,73 @@ int __devinit snd_emu10k1_mixer(struct snd_emu10k1 *emu, | |||
1817 | return err; | 1991 | return err; |
1818 | } | 1992 | } |
1819 | 1993 | ||
1820 | if (emu->card_capabilities->emu_model) { | 1994 | if (emu->card_capabilities->emu_model == 3) { |
1995 | /* 1616(m) cardbus */ | ||
1996 | int i; | ||
1997 | |||
1998 | for (i = 0; i < ARRAY_SIZE(snd_emu1616_output_enum_ctls); i++) { | ||
1999 | err = snd_ctl_add(card, | ||
2000 | snd_ctl_new1(&snd_emu1616_output_enum_ctls[i], | ||
2001 | emu)); | ||
2002 | if (err < 0) | ||
2003 | return err; | ||
2004 | } | ||
2005 | for (i = 0; i < ARRAY_SIZE(snd_emu1010_input_enum_ctls); i++) { | ||
2006 | err = snd_ctl_add(card, | ||
2007 | snd_ctl_new1(&snd_emu1010_input_enum_ctls[i], | ||
2008 | emu)); | ||
2009 | if (err < 0) | ||
2010 | return err; | ||
2011 | } | ||
2012 | for (i = 0; i < ARRAY_SIZE(snd_emu1010_adc_pads) - 2; i++) { | ||
2013 | err = snd_ctl_add(card, | ||
2014 | snd_ctl_new1(&snd_emu1010_adc_pads[i], emu)); | ||
2015 | if (err < 0) | ||
2016 | return err; | ||
2017 | } | ||
2018 | for (i = 0; i < ARRAY_SIZE(snd_emu1010_dac_pads) - 2; i++) { | ||
2019 | err = snd_ctl_add(card, | ||
2020 | snd_ctl_new1(&snd_emu1010_dac_pads[i], emu)); | ||
2021 | if (err < 0) | ||
2022 | return err; | ||
2023 | } | ||
2024 | err = snd_ctl_add(card, | ||
2025 | snd_ctl_new1(&snd_emu1010_internal_clock, emu)); | ||
2026 | if (err < 0) | ||
2027 | return err; | ||
2028 | |||
2029 | } else { | ||
2030 | /* all other e-mu cards for now */ | ||
1821 | int i; | 2031 | int i; |
1822 | 2032 | ||
1823 | for (i = 0; i < ARRAY_SIZE(snd_emu1010_output_enum_ctls); i++) { | 2033 | for (i = 0; i < ARRAY_SIZE(snd_emu1010_output_enum_ctls); i++) { |
1824 | err = snd_ctl_add(card, snd_ctl_new1(&snd_emu1010_output_enum_ctls[i], emu)); | 2034 | err = snd_ctl_add(card, |
2035 | snd_ctl_new1(&snd_emu1010_output_enum_ctls[i], | ||
2036 | emu)); | ||
1825 | if (err < 0) | 2037 | if (err < 0) |
1826 | return err; | 2038 | return err; |
1827 | } | 2039 | } |
1828 | for (i = 0; i < ARRAY_SIZE(snd_emu1010_input_enum_ctls); i++) { | 2040 | for (i = 0; i < ARRAY_SIZE(snd_emu1010_input_enum_ctls); i++) { |
1829 | err = snd_ctl_add(card, snd_ctl_new1(&snd_emu1010_input_enum_ctls[i], emu)); | 2041 | err = snd_ctl_add(card, |
2042 | snd_ctl_new1(&snd_emu1010_input_enum_ctls[i], | ||
2043 | emu)); | ||
1830 | if (err < 0) | 2044 | if (err < 0) |
1831 | return err; | 2045 | return err; |
1832 | } | 2046 | } |
1833 | for (i = 0; i < ARRAY_SIZE(snd_emu1010_adc_pads); i++) { | 2047 | for (i = 0; i < ARRAY_SIZE(snd_emu1010_adc_pads); i++) { |
1834 | err = snd_ctl_add(card, snd_ctl_new1(&snd_emu1010_adc_pads[i], emu)); | 2048 | err = snd_ctl_add(card, |
2049 | snd_ctl_new1(&snd_emu1010_adc_pads[i], emu)); | ||
1835 | if (err < 0) | 2050 | if (err < 0) |
1836 | return err; | 2051 | return err; |
1837 | } | 2052 | } |
1838 | for (i = 0; i < ARRAY_SIZE(snd_emu1010_dac_pads); i++) { | 2053 | for (i = 0; i < ARRAY_SIZE(snd_emu1010_dac_pads); i++) { |
1839 | err = snd_ctl_add(card, snd_ctl_new1(&snd_emu1010_dac_pads[i], emu)); | 2054 | err = snd_ctl_add(card, |
2055 | snd_ctl_new1(&snd_emu1010_dac_pads[i], emu)); | ||
1840 | if (err < 0) | 2056 | if (err < 0) |
1841 | return err; | 2057 | return err; |
1842 | } | 2058 | } |
1843 | err = snd_ctl_add(card, snd_ctl_new1(&snd_emu1010_internal_clock, emu)); | 2059 | err = snd_ctl_add(card, |
2060 | snd_ctl_new1(&snd_emu1010_internal_clock, emu)); | ||
1844 | if (err < 0) | 2061 | if (err < 0) |
1845 | return err; | 2062 | return err; |
1846 | } | 2063 | } |