diff options
author | James Courtier-Dutton <James@superbug.co.uk> | 2007-11-04 09:08:26 -0500 |
---|---|---|
committer | Mercurial server <hg@alsa0.alsa-project.org> | 2008-01-31 11:30:24 -0500 |
commit | 190d2c46e52592ba092e8bf8acd4427c920f2d69 (patch) | |
tree | bc4f4271f08aa57ac520fa2536c3990f8741fd55 /sound/pci/emu10k1/io.c | |
parent | 44893a36ba49349e0f9d4bc3b7bbf9b54469ae1a (diff) |
[ALSA] snd:emu10k1: E-Mu updates. Fixes to firmware loading and support for 0404.
Signed-off-by: James Courtier-Dutton <James@superbug.co.uk>
Signed-off-by: Jaroslav Kysela <perex@perex.cz>
Diffstat (limited to 'sound/pci/emu10k1/io.c')
-rw-r--r-- | sound/pci/emu10k1/io.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/sound/pci/emu10k1/io.c b/sound/pci/emu10k1/io.c index 2862e17446fe..a02638350a0a 100644 --- a/sound/pci/emu10k1/io.c +++ b/sound/pci/emu10k1/io.c | |||
@@ -227,11 +227,14 @@ int snd_emu10k1_i2c_write(struct snd_emu10k1 *emu, | |||
227 | 227 | ||
228 | int snd_emu1010_fpga_write(struct snd_emu10k1 * emu, u32 reg, u32 value) | 228 | int snd_emu1010_fpga_write(struct snd_emu10k1 * emu, u32 reg, u32 value) |
229 | { | 229 | { |
230 | unsigned long flags; | ||
231 | |||
230 | if (reg > 0x3f) | 232 | if (reg > 0x3f) |
231 | return 1; | 233 | return 1; |
232 | reg += 0x40; /* 0x40 upwards are registers. */ | 234 | reg += 0x40; /* 0x40 upwards are registers. */ |
233 | if (value < 0 || value > 0x3f) /* 0 to 0x3f are values */ | 235 | if (value < 0 || value > 0x3f) /* 0 to 0x3f are values */ |
234 | return 1; | 236 | return 1; |
237 | spin_lock_irqsave(&emu->emu_lock, flags); | ||
235 | outl(reg, emu->port + A_IOCFG); | 238 | outl(reg, emu->port + A_IOCFG); |
236 | udelay(10); | 239 | udelay(10); |
237 | outl(reg | 0x80, emu->port + A_IOCFG); /* High bit clocks the value into the fpga. */ | 240 | outl(reg | 0x80, emu->port + A_IOCFG); /* High bit clocks the value into the fpga. */ |
@@ -239,20 +242,24 @@ int snd_emu1010_fpga_write(struct snd_emu10k1 * emu, u32 reg, u32 value) | |||
239 | outl(value, emu->port + A_IOCFG); | 242 | outl(value, emu->port + A_IOCFG); |
240 | udelay(10); | 243 | udelay(10); |
241 | outl(value | 0x80 , emu->port + A_IOCFG); /* High bit clocks the value into the fpga. */ | 244 | outl(value | 0x80 , emu->port + A_IOCFG); /* High bit clocks the value into the fpga. */ |
245 | spin_unlock_irqrestore(&emu->emu_lock, flags); | ||
242 | 246 | ||
243 | return 0; | 247 | return 0; |
244 | } | 248 | } |
245 | 249 | ||
246 | int snd_emu1010_fpga_read(struct snd_emu10k1 * emu, u32 reg, u32 *value) | 250 | int snd_emu1010_fpga_read(struct snd_emu10k1 * emu, u32 reg, u32 *value) |
247 | { | 251 | { |
252 | unsigned long flags; | ||
248 | if (reg > 0x3f) | 253 | if (reg > 0x3f) |
249 | return 1; | 254 | return 1; |
250 | reg += 0x40; /* 0x40 upwards are registers. */ | 255 | reg += 0x40; /* 0x40 upwards are registers. */ |
256 | spin_lock_irqsave(&emu->emu_lock, flags); | ||
251 | outl(reg, emu->port + A_IOCFG); | 257 | outl(reg, emu->port + A_IOCFG); |
252 | udelay(10); | 258 | udelay(10); |
253 | outl(reg | 0x80, emu->port + A_IOCFG); /* High bit clocks the value into the fpga. */ | 259 | outl(reg | 0x80, emu->port + A_IOCFG); /* High bit clocks the value into the fpga. */ |
254 | udelay(10); | 260 | udelay(10); |
255 | *value = ((inl(emu->port + A_IOCFG) >> 8) & 0x7f); | 261 | *value = ((inl(emu->port + A_IOCFG) >> 8) & 0x7f); |
262 | spin_unlock_irqrestore(&emu->emu_lock, flags); | ||
256 | 263 | ||
257 | return 0; | 264 | return 0; |
258 | } | 265 | } |