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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /sound/pci/emu10k1/emu10k1_main.c
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'sound/pci/emu10k1/emu10k1_main.c')
-rw-r--r--sound/pci/emu10k1/emu10k1_main.c875
1 files changed, 875 insertions, 0 deletions
diff --git a/sound/pci/emu10k1/emu10k1_main.c b/sound/pci/emu10k1/emu10k1_main.c
new file mode 100644
index 000000000000..c3c96f9f2c7f
--- /dev/null
+++ b/sound/pci/emu10k1/emu10k1_main.c
@@ -0,0 +1,875 @@
1/*
2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
3 * Creative Labs, Inc.
4 * Routines for control of EMU10K1 chips
5 *
6 * Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk>
7 * Added support for Audigy 2 Value.
8 *
9 *
10 * BUGS:
11 * --
12 *
13 * TODO:
14 * --
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
29 *
30 */
31
32#include <sound/driver.h>
33#include <linux/delay.h>
34#include <linux/init.h>
35#include <linux/interrupt.h>
36#include <linux/pci.h>
37#include <linux/slab.h>
38#include <linux/vmalloc.h>
39
40#include <sound/core.h>
41#include <sound/emu10k1.h>
42#include "p16v.h"
43
44#if 0
45MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>, Creative Labs, Inc.");
46MODULE_DESCRIPTION("Routines for control of EMU10K1 chips");
47MODULE_LICENSE("GPL");
48#endif
49
50/*************************************************************************
51 * EMU10K1 init / done
52 *************************************************************************/
53
54void snd_emu10k1_voice_init(emu10k1_t * emu, int ch)
55{
56 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
57 snd_emu10k1_ptr_write(emu, IP, ch, 0);
58 snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
59 snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
60 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
61 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
62 snd_emu10k1_ptr_write(emu, CCR, ch, 0);
63
64 snd_emu10k1_ptr_write(emu, PSST, ch, 0);
65 snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
66 snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
67 snd_emu10k1_ptr_write(emu, Z1, ch, 0);
68 snd_emu10k1_ptr_write(emu, Z2, ch, 0);
69 snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
70
71 snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
72 snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
73 snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
74 snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
75 snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
76 snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */
77 snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24); /* 1 Hz */
78 snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
79
80 /*** these are last so OFF prevents writing ***/
81 snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
82 snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
83 snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
84 snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
85 snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
86
87 /* Audigy extra stuffs */
88 if (emu->audigy) {
89 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
90 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
91 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
92 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
93 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
94 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
95 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
96 }
97}
98
99static int __devinit snd_emu10k1_init(emu10k1_t * emu, int enable_ir)
100{
101 int ch, idx, err;
102 unsigned int silent_page;
103
104 emu->fx8010.itram_size = (16 * 1024)/2;
105 emu->fx8010.etram_pages.area = NULL;
106 emu->fx8010.etram_pages.bytes = 0;
107
108 /* disable audio and lock cache */
109 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
110
111 /* reset recording buffers */
112 snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
113 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
114 snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
115 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
116 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
117 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
118
119 /* disable channel interrupt */
120 outl(0, emu->port + INTE);
121 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
122 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
123 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
124 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
125
126 if (emu->audigy){
127 /* set SPDIF bypass mode */
128 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
129 /* enable rear left + rear right AC97 slots */
130 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT | AC97SLOT_REAR_LEFT);
131 }
132
133 /* init envelope engine */
134 for (ch = 0; ch < NUM_G; ch++) {
135 emu->voices[ch].emu = emu;
136 emu->voices[ch].number = ch;
137 snd_emu10k1_voice_init(emu, ch);
138 }
139
140 /*
141 * Init to 0x02109204 :
142 * Clock accuracy = 0 (1000ppm)
143 * Sample Rate = 2 (48kHz)
144 * Audio Channel = 1 (Left of 2)
145 * Source Number = 0 (Unspecified)
146 * Generation Status = 1 (Original for Cat Code 12)
147 * Cat Code = 12 (Digital Signal Mixer)
148 * Mode = 0 (Mode 0)
149 * Emphasis = 0 (None)
150 * CP = 1 (Copyright unasserted)
151 * AN = 0 (Audio data)
152 * P = 0 (Consumer)
153 */
154 snd_emu10k1_ptr_write(emu, SPCS0, 0,
155 emu->spdif_bits[0] =
156 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
157 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
158 SPCS_GENERATIONSTATUS | 0x00001200 |
159 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
160 snd_emu10k1_ptr_write(emu, SPCS1, 0,
161 emu->spdif_bits[1] =
162 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
163 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
164 SPCS_GENERATIONSTATUS | 0x00001200 |
165 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
166 snd_emu10k1_ptr_write(emu, SPCS2, 0,
167 emu->spdif_bits[2] =
168 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
169 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
170 SPCS_GENERATIONSTATUS | 0x00001200 |
171 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
172
173 if (emu->audigy && emu->revision == 4) { /* audigy2 */
174 /* Hacks for Alice3 to work independent of haP16V driver */
175 u32 tmp;
176
177 //Setup SRCMulti_I2S SamplingRate
178 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
179 tmp &= 0xfffff1ff;
180 tmp |= (0x2<<9);
181 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
182
183 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
184 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
185 /* Setup SRCMulti Input Audio Enable */
186 /* Use 0xFFFFFFFF to enable P16V sounds. */
187 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
188
189 /* Enabled Phased (8-channel) P16V playback */
190 outl(0x0201, emu->port + HCFG2);
191 /* Set playback routing. */
192 snd_emu10k1_ptr_write(emu, CAPTURE_P16V_SOURCE, 0, 78e4);
193 }
194 if (emu->audigy && (emu->serial == 0x10011102) ) { /* audigy2 Value */
195 /* Hacks for Alice3 to work independent of haP16V driver */
196 u32 tmp;
197
198 snd_printk(KERN_ERR "Audigy2 value:Special config.\n");
199 //Setup SRCMulti_I2S SamplingRate
200 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
201 tmp &= 0xfffff1ff;
202 tmp |= (0x2<<9);
203 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
204
205 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
206 outl(0x600000, emu->port + 0x20);
207 outl(0x14, emu->port + 0x24);
208
209 /* Setup SRCMulti Input Audio Enable */
210 outl(0x7b0000, emu->port + 0x20);
211 outl(0xFF000000, emu->port + 0x24);
212
213 /* Setup SPDIF Out Audio Enable */
214 /* The Audigy 2 Value has a separate SPDIF out,
215 * so no need for a mixer switch
216 */
217 outl(0x7a0000, emu->port + 0x20);
218 outl(0xFF000000, emu->port + 0x24);
219 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
220 outl(tmp, emu->port + A_IOCFG);
221 }
222
223
224 /*
225 * Clear page with silence & setup all pointers to this page
226 */
227 memset(emu->silent_page.area, 0, PAGE_SIZE);
228 silent_page = emu->silent_page.addr << 1;
229 for (idx = 0; idx < MAXPAGES; idx++)
230 ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
231 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
232 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */
233 snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
234
235 silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK;
236 for (ch = 0; ch < NUM_G; ch++) {
237 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
238 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
239 }
240
241 /*
242 * Hokay, setup HCFG
243 * Mute Disable Audio = 0
244 * Lock Tank Memory = 1
245 * Lock Sound Memory = 0
246 * Auto Mute = 1
247 */
248 if (emu->audigy) {
249 if (emu->revision == 4) /* audigy2 */
250 outl(HCFG_AUDIOENABLE |
251 HCFG_AC3ENABLE_CDSPDIF |
252 HCFG_AC3ENABLE_GPSPDIF |
253 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
254 else
255 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
256 } else if (emu->model == 0x20 ||
257 emu->model == 0xc400 ||
258 (emu->model == 0x21 && emu->revision < 6))
259 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
260 else
261 // With on-chip joystick
262 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
263
264 if (enable_ir) { /* enable IR for SB Live */
265 if (emu->audigy) {
266 unsigned int reg = inl(emu->port + A_IOCFG);
267 outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
268 udelay(500);
269 outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
270 udelay(100);
271 outl(reg, emu->port + A_IOCFG);
272 } else {
273 unsigned int reg = inl(emu->port + HCFG);
274 outl(reg | HCFG_GPOUT2, emu->port + HCFG);
275 udelay(500);
276 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
277 udelay(100);
278 outl(reg, emu->port + HCFG);
279 }
280 }
281
282 if (emu->audigy) { /* enable analog output */
283 unsigned int reg = inl(emu->port + A_IOCFG);
284 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
285 }
286
287 /*
288 * Initialize the effect engine
289 */
290 if ((err = snd_emu10k1_init_efx(emu)) < 0)
291 return err;
292
293 /*
294 * Enable the audio bit
295 */
296 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
297
298 /* Enable analog/digital outs on audigy */
299 if (emu->audigy) {
300 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
301
302 if (emu->revision == 4) { /* audigy2 */
303 /* Unmute Analog now. Set GPO6 to 1 for Apollo.
304 * This has to be done after init ALice3 I2SOut beyond 48KHz.
305 * So, sequence is important. */
306 outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
307 } else if (emu->serial == 0x10011102) { /* audigy2 value */
308 /* Unmute Analog now. */
309 outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
310 } else {
311 /* Disable routing from AC97 line out to Front speakers */
312 outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
313 }
314 }
315
316#if 0
317 {
318 unsigned int tmp;
319 /* FIXME: the following routine disables LiveDrive-II !! */
320 // TOSLink detection
321 emu->tos_link = 0;
322 tmp = inl(emu->port + HCFG);
323 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
324 outl(tmp|0x800, emu->port + HCFG);
325 udelay(50);
326 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
327 emu->tos_link = 1;
328 outl(tmp, emu->port + HCFG);
329 }
330 }
331 }
332#endif
333
334 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
335
336 emu->reserved_page = (emu10k1_memblk_t *)snd_emu10k1_synth_alloc(emu, 4096);
337 if (emu->reserved_page)
338 emu->reserved_page->map_locked = 1;
339
340 return 0;
341}
342
343static int snd_emu10k1_done(emu10k1_t * emu)
344{
345 int ch;
346
347 outl(0, emu->port + INTE);
348
349 /*
350 * Shutdown the chip
351 */
352 for (ch = 0; ch < NUM_G; ch++)
353 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
354 for (ch = 0; ch < NUM_G; ch++) {
355 snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
356 snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
357 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
358 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
359 }
360
361 /* reset recording buffers */
362 snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
363 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
364 snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
365 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
366 snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
367 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
368 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
369 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
370 snd_emu10k1_ptr_write(emu, TCB, 0, 0);
371 if (emu->audigy)
372 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
373 else
374 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
375
376 /* disable channel interrupt */
377 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
378 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
379 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
380 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
381
382 /* remove reserved page */
383 if (emu->reserved_page != NULL) {
384 snd_emu10k1_synth_free(emu, (snd_util_memblk_t *)emu->reserved_page);
385 emu->reserved_page = NULL;
386 }
387
388 /* disable audio and lock cache */
389 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
390 snd_emu10k1_ptr_write(emu, PTB, 0, 0);
391
392 snd_emu10k1_free_efx(emu);
393
394 return 0;
395}
396
397/*************************************************************************
398 * ECARD functional implementation
399 *************************************************************************/
400
401/* In A1 Silicon, these bits are in the HC register */
402#define HOOKN_BIT (1L << 12)
403#define HANDN_BIT (1L << 11)
404#define PULSEN_BIT (1L << 10)
405
406#define EC_GDI1 (1 << 13)
407#define EC_GDI0 (1 << 14)
408
409#define EC_NUM_CONTROL_BITS 20
410
411#define EC_AC3_DATA_SELN 0x0001L
412#define EC_EE_DATA_SEL 0x0002L
413#define EC_EE_CNTRL_SELN 0x0004L
414#define EC_EECLK 0x0008L
415#define EC_EECS 0x0010L
416#define EC_EESDO 0x0020L
417#define EC_TRIM_CSN 0x0040L
418#define EC_TRIM_SCLK 0x0080L
419#define EC_TRIM_SDATA 0x0100L
420#define EC_TRIM_MUTEN 0x0200L
421#define EC_ADCCAL 0x0400L
422#define EC_ADCRSTN 0x0800L
423#define EC_DACCAL 0x1000L
424#define EC_DACMUTEN 0x2000L
425#define EC_LEDN 0x4000L
426
427#define EC_SPDIF0_SEL_SHIFT 15
428#define EC_SPDIF1_SEL_SHIFT 17
429#define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT)
430#define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT)
431#define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
432#define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
433#define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should
434 * be incremented any time the EEPROM's
435 * format is changed. */
436
437#define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */
438
439/* Addresses for special values stored in to EEPROM */
440#define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */
441#define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */
442#define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */
443
444#define EC_LAST_PROMFILE_ADDR 0x2f
445
446#define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The
447 * can be up to 30 characters in length
448 * and is stored as a NULL-terminated
449 * ASCII string. Any unused bytes must be
450 * filled with zeros */
451#define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */
452
453
454/* Most of this stuff is pretty self-evident. According to the hardware
455 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
456 * offset problem. Weird.
457 */
458#define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
459 EC_TRIM_CSN)
460
461
462#define EC_DEFAULT_ADC_GAIN 0xC4C4
463#define EC_DEFAULT_SPDIF0_SEL 0x0
464#define EC_DEFAULT_SPDIF1_SEL 0x4
465
466/**************************************************************************
467 * @func Clock bits into the Ecard's control latch. The Ecard uses a
468 * control latch will is loaded bit-serially by toggling the Modem control
469 * lines from function 2 on the E8010. This function hides these details
470 * and presents the illusion that we are actually writing to a distinct
471 * register.
472 */
473
474static void snd_emu10k1_ecard_write(emu10k1_t * emu, unsigned int value)
475{
476 unsigned short count;
477 unsigned int data;
478 unsigned long hc_port;
479 unsigned int hc_value;
480
481 hc_port = emu->port + HCFG;
482 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
483 outl(hc_value, hc_port);
484
485 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
486
487 /* Set up the value */
488 data = ((value & 0x1) ? PULSEN_BIT : 0);
489 value >>= 1;
490
491 outl(hc_value | data, hc_port);
492
493 /* Clock the shift register */
494 outl(hc_value | data | HANDN_BIT, hc_port);
495 outl(hc_value | data, hc_port);
496 }
497
498 /* Latch the bits */
499 outl(hc_value | HOOKN_BIT, hc_port);
500 outl(hc_value, hc_port);
501}
502
503/**************************************************************************
504 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The
505 * trim value consists of a 16bit value which is composed of two
506 * 8 bit gain/trim values, one for the left channel and one for the
507 * right channel. The following table maps from the Gain/Attenuation
508 * value in decibels into the corresponding bit pattern for a single
509 * channel.
510 */
511
512static void snd_emu10k1_ecard_setadcgain(emu10k1_t * emu,
513 unsigned short gain)
514{
515 unsigned int bit;
516
517 /* Enable writing to the TRIM registers */
518 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
519
520 /* Do it again to insure that we meet hold time requirements */
521 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
522
523 for (bit = (1 << 15); bit; bit >>= 1) {
524 unsigned int value;
525
526 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
527
528 if (gain & bit)
529 value |= EC_TRIM_SDATA;
530
531 /* Clock the bit */
532 snd_emu10k1_ecard_write(emu, value);
533 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
534 snd_emu10k1_ecard_write(emu, value);
535 }
536
537 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
538}
539
540static int __devinit snd_emu10k1_ecard_init(emu10k1_t * emu)
541{
542 unsigned int hc_value;
543
544 /* Set up the initial settings */
545 emu->ecard_ctrl = EC_RAW_RUN_MODE |
546 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
547 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
548
549 /* Step 0: Set the codec type in the hardware control register
550 * and enable audio output */
551 hc_value = inl(emu->port + HCFG);
552 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
553 inl(emu->port + HCFG);
554
555 /* Step 1: Turn off the led and deassert TRIM_CS */
556 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
557
558 /* Step 2: Calibrate the ADC and DAC */
559 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
560
561 /* Step 3: Wait for awhile; XXX We can't get away with this
562 * under a real operating system; we'll need to block and wait that
563 * way. */
564 snd_emu10k1_wait(emu, 48000);
565
566 /* Step 4: Switch off the DAC and ADC calibration. Note
567 * That ADC_CAL is actually an inverted signal, so we assert
568 * it here to stop calibration. */
569 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
570
571 /* Step 4: Switch into run mode */
572 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
573
574 /* Step 5: Set the analog input gain */
575 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
576
577 return 0;
578}
579
580/*
581 * Create the EMU10K1 instance
582 */
583
584static int snd_emu10k1_free(emu10k1_t *emu)
585{
586 if (emu->port) { /* avoid access to already used hardware */
587 snd_emu10k1_fx8010_tram_setup(emu, 0);
588 snd_emu10k1_done(emu);
589 }
590 if (emu->memhdr)
591 snd_util_memhdr_free(emu->memhdr);
592 if (emu->silent_page.area)
593 snd_dma_free_pages(&emu->silent_page);
594 if (emu->ptb_pages.area)
595 snd_dma_free_pages(&emu->ptb_pages);
596 vfree(emu->page_ptr_table);
597 vfree(emu->page_addr_table);
598 if (emu->irq >= 0)
599 free_irq(emu->irq, (void *)emu);
600 if (emu->port)
601 pci_release_regions(emu->pci);
602 pci_disable_device(emu->pci);
603 if (emu->audigy && emu->revision == 4) /* P16V */
604 snd_p16v_free(emu);
605 kfree(emu);
606 return 0;
607}
608
609static int snd_emu10k1_dev_free(snd_device_t *device)
610{
611 emu10k1_t *emu = device->device_data;
612 return snd_emu10k1_free(emu);
613}
614
615/* vendor, device, subsystem, emu10k1_chip, emu10k2_chip, ca0102_chip, ca0108_chip, ca0151_chip, spk71, spdif_bug, ac97_chip, ecard, driver, name */
616
617static emu_chip_details_t emu_chip_details[] = {
618 /* Audigy 2 Value AC3 out does not work yet. Need to find out how to turn off interpolators.*/
619 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
620 .driver = "Audigy2", .name = "Audigy 2 Value [SB0400]",
621 .emu10k2_chip = 1,
622 .ca0108_chip = 1,
623 .spk71 = 1} ,
624 {.vendor = 0x1102, .device = 0x0008,
625 .driver = "Audigy2", .name = "Audigy 2 Value [Unknown]",
626 .emu10k2_chip = 1,
627 .ca0108_chip = 1} ,
628 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
629 .driver = "Audigy2", .name = "Audigy 4 PRO [SB0380]",
630 .emu10k2_chip = 1,
631 .ca0102_chip = 1,
632 .ca0151_chip = 1,
633 .spk71 = 1,
634 .spdif_bug = 1,
635 .ac97_chip = 1} ,
636 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
637 .driver = "Audigy2", .name = "Audigy 2 ZS [SB0350]",
638 .emu10k2_chip = 1,
639 .ca0102_chip = 1,
640 .ca0151_chip = 1,
641 .spk71 = 1,
642 .spdif_bug = 1,
643 .ac97_chip = 1} ,
644 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
645 .driver = "Audigy2", .name = "Audigy 2 ZS [2001]",
646 .emu10k2_chip = 1,
647 .ca0102_chip = 1,
648 .ca0151_chip = 1,
649 .spk71 = 1,
650 .spdif_bug = 1,
651 .ac97_chip = 1} ,
652 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
653 .driver = "Audigy2", .name = "Audigy 2 [SB0240]",
654 .emu10k2_chip = 1,
655 .ca0102_chip = 1,
656 .ca0151_chip = 1,
657 .spk71 = 1,
658 .spdif_bug = 1,
659 .ac97_chip = 1} ,
660 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
661 .driver = "Audigy2", .name = "Audigy 2 EX [1005]",
662 .emu10k2_chip = 1,
663 .ca0102_chip = 1,
664 .ca0151_chip = 1,
665 .spdif_bug = 1} ,
666 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
667 .driver = "Audigy2", .name = "Audigy 2 Platinum [SB0240P]",
668 .emu10k2_chip = 1,
669 .ca0102_chip = 1,
670 .ca0151_chip = 1,
671 .spk71 = 1,
672 .spdif_bug = 1,
673 .ac97_chip = 1} ,
674 {.vendor = 0x1102, .device = 0x0004,
675 .driver = "Audigy", .name = "Audigy 1 or 2 [Unknown]",
676 .emu10k2_chip = 1,
677 .ca0102_chip = 1,
678 .spdif_bug = 1} ,
679 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
680 .driver = "EMU10K1", .name = "E-mu APS [4001]",
681 .emu10k1_chip = 1,
682 .ecard = 1} ,
683 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
684 .driver = "EMU10K1", .name = "SB Live 5.1",
685 .emu10k1_chip = 1,
686 .ac97_chip = 1} ,
687 {.vendor = 0x1102, .device = 0x0002,
688 .driver = "EMU10K1", .name = "SB Live [Unknown]",
689 .emu10k1_chip = 1,
690 .ac97_chip = 1} ,
691 { } /* terminator */
692};
693
694int __devinit snd_emu10k1_create(snd_card_t * card,
695 struct pci_dev * pci,
696 unsigned short extin_mask,
697 unsigned short extout_mask,
698 long max_cache_bytes,
699 int enable_ir,
700 emu10k1_t ** remu)
701{
702 emu10k1_t *emu;
703 int err;
704 int is_audigy;
705 unsigned char revision;
706 const emu_chip_details_t *c;
707 static snd_device_ops_t ops = {
708 .dev_free = snd_emu10k1_dev_free,
709 };
710
711 *remu = NULL;
712
713 /* enable PCI device */
714 if ((err = pci_enable_device(pci)) < 0)
715 return err;
716
717 emu = kcalloc(1, sizeof(*emu), GFP_KERNEL);
718 if (emu == NULL) {
719 pci_disable_device(pci);
720 return -ENOMEM;
721 }
722 emu->card = card;
723 spin_lock_init(&emu->reg_lock);
724 spin_lock_init(&emu->emu_lock);
725 spin_lock_init(&emu->voice_lock);
726 spin_lock_init(&emu->synth_lock);
727 spin_lock_init(&emu->memblk_lock);
728 init_MUTEX(&emu->ptb_lock);
729 init_MUTEX(&emu->fx8010.lock);
730 INIT_LIST_HEAD(&emu->mapped_link_head);
731 INIT_LIST_HEAD(&emu->mapped_order_link_head);
732 emu->pci = pci;
733 emu->irq = -1;
734 emu->synth = NULL;
735 emu->get_synth_voice = NULL;
736 /* read revision & serial */
737 pci_read_config_byte(pci, PCI_REVISION_ID, &revision);
738 emu->revision = revision;
739 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
740 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
741 emu->card_type = EMU10K1_CARD_CREATIVE;
742 snd_printdd("vendor=0x%x, device=0x%x, subsystem_vendor_id=0x%x, subsystem_id=0x%x\n",pci->vendor, pci->device, emu->serial, emu->model);
743
744 for (c = emu_chip_details; c->vendor; c++) {
745 if (c->vendor == pci->vendor && c->device == pci->device) {
746 if (c->subsystem == emu->serial) break;
747 if (c->subsystem == 0) break;
748 }
749 }
750 if (c->vendor == 0) {
751 snd_printk(KERN_ERR "emu10k1: Card not recognised\n");
752 kfree(emu);
753 pci_disable_device(pci);
754 return -ENOENT;
755 }
756 emu->card_capabilities = c;
757 if (c->subsystem != 0)
758 snd_printdd("Sound card name=%s\n", c->name);
759 else
760 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x\n", c->name, pci->vendor, pci->device, emu->serial);
761
762 is_audigy = emu->audigy = c->emu10k2_chip;
763
764 /* set the DMA transfer mask */
765 emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK;
766 if (pci_set_dma_mask(pci, emu->dma_mask) < 0 ||
767 pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) {
768 snd_printk(KERN_ERR "architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu->dma_mask);
769 kfree(emu);
770 pci_disable_device(pci);
771 return -ENXIO;
772 }
773 if (is_audigy)
774 emu->gpr_base = A_FXGPREGBASE;
775 else
776 emu->gpr_base = FXGPREGBASE;
777
778 if ((err = pci_request_regions(pci, "EMU10K1")) < 0) {
779 kfree(emu);
780 pci_disable_device(pci);
781 return err;
782 }
783 emu->port = pci_resource_start(pci, 0);
784
785 if (request_irq(pci->irq, snd_emu10k1_interrupt, SA_INTERRUPT|SA_SHIRQ, "EMU10K1", (void *)emu)) {
786 snd_emu10k1_free(emu);
787 return -EBUSY;
788 }
789 emu->irq = pci->irq;
790
791 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
792 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
793 32 * 1024, &emu->ptb_pages) < 0) {
794 snd_emu10k1_free(emu);
795 return -ENOMEM;
796 }
797
798 emu->page_ptr_table = (void **)vmalloc(emu->max_cache_pages * sizeof(void*));
799 emu->page_addr_table = (unsigned long*)vmalloc(emu->max_cache_pages * sizeof(unsigned long));
800 if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
801 snd_emu10k1_free(emu);
802 return -ENOMEM;
803 }
804
805 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
806 EMUPAGESIZE, &emu->silent_page) < 0) {
807 snd_emu10k1_free(emu);
808 return -ENOMEM;
809 }
810 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
811 if (emu->memhdr == NULL) {
812 snd_emu10k1_free(emu);
813 return -ENOMEM;
814 }
815 emu->memhdr->block_extra_size = sizeof(emu10k1_memblk_t) - sizeof(snd_util_memblk_t);
816
817 pci_set_master(pci);
818
819 if (c->ecard) {
820 emu->card_type = EMU10K1_CARD_EMUAPS;
821 emu->APS = 1;
822 }
823 if (! c->ac97_chip)
824 emu->no_ac97 = 1;
825
826 emu->spk71 = c->spk71;
827
828 emu->fx8010.fxbus_mask = 0x303f;
829 if (extin_mask == 0)
830 extin_mask = 0x3fcf;
831 if (extout_mask == 0)
832 extout_mask = 0x7fff;
833 emu->fx8010.extin_mask = extin_mask;
834 emu->fx8010.extout_mask = extout_mask;
835
836 if (emu->APS) {
837 if ((err = snd_emu10k1_ecard_init(emu)) < 0) {
838 snd_emu10k1_free(emu);
839 return err;
840 }
841 } else {
842 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
843 does not support this, it shouldn't do any harm */
844 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
845 }
846
847 if ((err = snd_emu10k1_init(emu, enable_ir)) < 0) {
848 snd_emu10k1_free(emu);
849 return err;
850 }
851
852 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops)) < 0) {
853 snd_emu10k1_free(emu);
854 return err;
855 }
856
857 snd_emu10k1_proc_init(emu);
858
859 snd_card_set_dev(card, &pci->dev);
860 *remu = emu;
861 return 0;
862}
863
864/* memory.c */
865EXPORT_SYMBOL(snd_emu10k1_synth_alloc);
866EXPORT_SYMBOL(snd_emu10k1_synth_free);
867EXPORT_SYMBOL(snd_emu10k1_synth_bzero);
868EXPORT_SYMBOL(snd_emu10k1_synth_copy_from_user);
869EXPORT_SYMBOL(snd_emu10k1_memblk_map);
870/* voice.c */
871EXPORT_SYMBOL(snd_emu10k1_voice_alloc);
872EXPORT_SYMBOL(snd_emu10k1_voice_free);
873/* io.c */
874EXPORT_SYMBOL(snd_emu10k1_ptr_read);
875EXPORT_SYMBOL(snd_emu10k1_ptr_write);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-01 10:34:45 -0400