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authorFlorian Zumbiehl <florz@florz.de>2010-01-26 03:06:14 -0500
committerTakashi Iwai <tiwai@suse.de>2010-01-26 03:06:14 -0500
commitcf944ee55cc318bdb1d4b2f3f5cce3257f7c07b3 (patch)
tree5aeb9e60cffadd55e5a732ce261aa3e8b425ab3c /sound/pci/cs46xx
parent6250b9ced23032789ca9739d6a53949637f9c836 (diff)
ALSA: cs46xx: Fix cpu idling with resume
Make sure that capture DMA doesn't stay enabled after system resume as that potentially prevents the processor from entering deep sleep states. Signed-off-by: Florian Zumbiehl <florz@florz.de> Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'sound/pci/cs46xx')
-rw-r--r--sound/pci/cs46xx/cs46xx_lib.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/sound/pci/cs46xx/cs46xx_lib.c b/sound/pci/cs46xx/cs46xx_lib.c
index e6b4a879ae2e..56fcf00c0e27 100644
--- a/sound/pci/cs46xx/cs46xx_lib.c
+++ b/sound/pci/cs46xx/cs46xx_lib.c
@@ -3644,6 +3644,7 @@ int snd_cs46xx_resume(struct pci_dev *pci)
3644#ifdef CONFIG_SND_CS46XX_NEW_DSP 3644#ifdef CONFIG_SND_CS46XX_NEW_DSP
3645 int i; 3645 int i;
3646#endif 3646#endif
3647 unsigned int tmp;
3647 3648
3648 pci_set_power_state(pci, PCI_D0); 3649 pci_set_power_state(pci, PCI_D0);
3649 pci_restore_state(pci); 3650 pci_restore_state(pci);
@@ -3685,6 +3686,15 @@ int snd_cs46xx_resume(struct pci_dev *pci)
3685 snd_ac97_resume(chip->ac97[CS46XX_PRIMARY_CODEC_INDEX]); 3686 snd_ac97_resume(chip->ac97[CS46XX_PRIMARY_CODEC_INDEX]);
3686 snd_ac97_resume(chip->ac97[CS46XX_SECONDARY_CODEC_INDEX]); 3687 snd_ac97_resume(chip->ac97[CS46XX_SECONDARY_CODEC_INDEX]);
3687 3688
3689 /*
3690 * Stop capture DMA.
3691 */
3692 tmp = snd_cs46xx_peek(chip, BA1_CCTL);
3693 chip->capt.ctl = tmp & 0x0000ffff;
3694 snd_cs46xx_poke(chip, BA1_CCTL, tmp & 0xffff0000);
3695
3696 mdelay(5);
3697
3688 /* reset playback/capture */ 3698 /* reset playback/capture */
3689 snd_cs46xx_set_play_sample_rate(chip, 8000); 3699 snd_cs46xx_set_play_sample_rate(chip, 8000);
3690 snd_cs46xx_set_capture_sample_rate(chip, 8000); 3700 snd_cs46xx_set_capture_sample_rate(chip, 8000);