diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /sound/pci/cs46xx |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'sound/pci/cs46xx')
-rw-r--r-- | sound/pci/cs46xx/Makefile | 12 | ||||
-rw-r--r-- | sound/pci/cs46xx/cs46xx.c | 183 | ||||
-rw-r--r-- | sound/pci/cs46xx/cs46xx_image.h | 3468 | ||||
-rw-r--r-- | sound/pci/cs46xx/cs46xx_lib.c | 3922 | ||||
-rw-r--r-- | sound/pci/cs46xx/cs46xx_lib.h | 182 | ||||
-rw-r--r-- | sound/pci/cs46xx/dsp_spos.c | 1892 | ||||
-rw-r--r-- | sound/pci/cs46xx/dsp_spos.h | 225 | ||||
-rw-r--r-- | sound/pci/cs46xx/dsp_spos_scb_lib.c | 1750 | ||||
-rw-r--r-- | sound/pci/cs46xx/imgs/cwc4630.h | 320 | ||||
-rw-r--r-- | sound/pci/cs46xx/imgs/cwcasync.h | 176 | ||||
-rw-r--r-- | sound/pci/cs46xx/imgs/cwcbinhack.h | 48 | ||||
-rw-r--r-- | sound/pci/cs46xx/imgs/cwcdma.asp | 169 | ||||
-rw-r--r-- | sound/pci/cs46xx/imgs/cwcdma.h | 68 | ||||
-rw-r--r-- | sound/pci/cs46xx/imgs/cwcemb80.h | 1607 | ||||
-rw-r--r-- | sound/pci/cs46xx/imgs/cwcsnoop.h | 46 |
15 files changed, 14068 insertions, 0 deletions
diff --git a/sound/pci/cs46xx/Makefile b/sound/pci/cs46xx/Makefile new file mode 100644 index 000000000000..d8b77b89aec4 --- /dev/null +++ b/sound/pci/cs46xx/Makefile | |||
@@ -0,0 +1,12 @@ | |||
1 | # | ||
2 | # Makefile for ALSA | ||
3 | # Copyright (c) 2001 by Jaroslav Kysela <perex@suse.cz> | ||
4 | # | ||
5 | |||
6 | snd-cs46xx-objs := cs46xx.o cs46xx_lib.o | ||
7 | ifeq ($(CONFIG_SND_CS46XX_NEW_DSP),y) | ||
8 | snd-cs46xx-objs += dsp_spos.o dsp_spos_scb_lib.o | ||
9 | endif | ||
10 | |||
11 | # Toplevel Module Dependency | ||
12 | obj-$(CONFIG_SND_CS46XX) += snd-cs46xx.o | ||
diff --git a/sound/pci/cs46xx/cs46xx.c b/sound/pci/cs46xx/cs46xx.c new file mode 100644 index 000000000000..25d6466a867c --- /dev/null +++ b/sound/pci/cs46xx/cs46xx.c | |||
@@ -0,0 +1,183 @@ | |||
1 | /* | ||
2 | * The driver for the Cirrus Logic's Sound Fusion CS46XX based soundcards | ||
3 | * Copyright (c) by Jaroslav Kysela <perex@suse.cz> | ||
4 | * | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | * | ||
20 | */ | ||
21 | |||
22 | /* | ||
23 | NOTES: | ||
24 | - sometimes the sound is metallic and sibilant, unloading and | ||
25 | reloading the module may solve this. | ||
26 | */ | ||
27 | |||
28 | #include <sound/driver.h> | ||
29 | #include <linux/pci.h> | ||
30 | #include <linux/time.h> | ||
31 | #include <linux/init.h> | ||
32 | #include <linux/moduleparam.h> | ||
33 | #include <sound/core.h> | ||
34 | #include <sound/cs46xx.h> | ||
35 | #include <sound/initval.h> | ||
36 | |||
37 | MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>"); | ||
38 | MODULE_DESCRIPTION("Cirrus Logic Sound Fusion CS46XX"); | ||
39 | MODULE_LICENSE("GPL"); | ||
40 | MODULE_SUPPORTED_DEVICE("{{Cirrus Logic,Sound Fusion (CS4280)}," | ||
41 | "{Cirrus Logic,Sound Fusion (CS4610)}," | ||
42 | "{Cirrus Logic,Sound Fusion (CS4612)}," | ||
43 | "{Cirrus Logic,Sound Fusion (CS4615)}," | ||
44 | "{Cirrus Logic,Sound Fusion (CS4622)}," | ||
45 | "{Cirrus Logic,Sound Fusion (CS4624)}," | ||
46 | "{Cirrus Logic,Sound Fusion (CS4630)}}"); | ||
47 | |||
48 | static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ | ||
49 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ | ||
50 | static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ | ||
51 | static int external_amp[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 0}; | ||
52 | static int thinkpad[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 0}; | ||
53 | static int mmap_valid[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1}; | ||
54 | |||
55 | module_param_array(index, int, NULL, 0444); | ||
56 | MODULE_PARM_DESC(index, "Index value for the CS46xx soundcard."); | ||
57 | module_param_array(id, charp, NULL, 0444); | ||
58 | MODULE_PARM_DESC(id, "ID string for the CS46xx soundcard."); | ||
59 | module_param_array(enable, bool, NULL, 0444); | ||
60 | MODULE_PARM_DESC(enable, "Enable CS46xx soundcard."); | ||
61 | module_param_array(external_amp, bool, NULL, 0444); | ||
62 | MODULE_PARM_DESC(external_amp, "Force to enable external amplifer."); | ||
63 | module_param_array(thinkpad, bool, NULL, 0444); | ||
64 | MODULE_PARM_DESC(thinkpad, "Force to enable Thinkpad's CLKRUN control."); | ||
65 | module_param_array(mmap_valid, bool, NULL, 0444); | ||
66 | MODULE_PARM_DESC(mmap_valid, "Support OSS mmap."); | ||
67 | |||
68 | static struct pci_device_id snd_cs46xx_ids[] = { | ||
69 | { 0x1013, 0x6001, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* CS4280 */ | ||
70 | { 0x1013, 0x6003, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* CS4612 */ | ||
71 | { 0x1013, 0x6004, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* CS4615 */ | ||
72 | { 0, } | ||
73 | }; | ||
74 | |||
75 | MODULE_DEVICE_TABLE(pci, snd_cs46xx_ids); | ||
76 | |||
77 | static int __devinit snd_card_cs46xx_probe(struct pci_dev *pci, | ||
78 | const struct pci_device_id *pci_id) | ||
79 | { | ||
80 | static int dev; | ||
81 | snd_card_t *card; | ||
82 | cs46xx_t *chip; | ||
83 | int err; | ||
84 | |||
85 | if (dev >= SNDRV_CARDS) | ||
86 | return -ENODEV; | ||
87 | if (!enable[dev]) { | ||
88 | dev++; | ||
89 | return -ENOENT; | ||
90 | } | ||
91 | |||
92 | card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0); | ||
93 | if (card == NULL) | ||
94 | return -ENOMEM; | ||
95 | if ((err = snd_cs46xx_create(card, pci, | ||
96 | external_amp[dev], thinkpad[dev], | ||
97 | &chip)) < 0) { | ||
98 | snd_card_free(card); | ||
99 | return err; | ||
100 | } | ||
101 | chip->accept_valid = mmap_valid[dev]; | ||
102 | if ((err = snd_cs46xx_pcm(chip, 0, NULL)) < 0) { | ||
103 | snd_card_free(card); | ||
104 | return err; | ||
105 | } | ||
106 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
107 | if ((err = snd_cs46xx_pcm_rear(chip,1, NULL)) < 0) { | ||
108 | snd_card_free(card); | ||
109 | return err; | ||
110 | } | ||
111 | if ((err = snd_cs46xx_pcm_iec958(chip,2,NULL)) < 0) { | ||
112 | snd_card_free(card); | ||
113 | return err; | ||
114 | } | ||
115 | #endif | ||
116 | if ((err = snd_cs46xx_mixer(chip)) < 0) { | ||
117 | snd_card_free(card); | ||
118 | return err; | ||
119 | } | ||
120 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
121 | if (chip->nr_ac97_codecs ==2) { | ||
122 | if ((err = snd_cs46xx_pcm_center_lfe(chip,3,NULL)) < 0) { | ||
123 | snd_card_free(card); | ||
124 | return err; | ||
125 | } | ||
126 | } | ||
127 | #endif | ||
128 | if ((err = snd_cs46xx_midi(chip, 0, NULL)) < 0) { | ||
129 | snd_card_free(card); | ||
130 | return err; | ||
131 | } | ||
132 | if ((err = snd_cs46xx_start_dsp(chip)) < 0) { | ||
133 | snd_card_free(card); | ||
134 | return err; | ||
135 | } | ||
136 | |||
137 | |||
138 | snd_cs46xx_gameport(chip); | ||
139 | |||
140 | strcpy(card->driver, "CS46xx"); | ||
141 | strcpy(card->shortname, "Sound Fusion CS46xx"); | ||
142 | sprintf(card->longname, "%s at 0x%lx/0x%lx, irq %i", | ||
143 | card->shortname, | ||
144 | chip->ba0_addr, | ||
145 | chip->ba1_addr, | ||
146 | chip->irq); | ||
147 | |||
148 | if ((err = snd_card_register(card)) < 0) { | ||
149 | snd_card_free(card); | ||
150 | return err; | ||
151 | } | ||
152 | |||
153 | pci_set_drvdata(pci, card); | ||
154 | dev++; | ||
155 | return 0; | ||
156 | } | ||
157 | |||
158 | static void __devexit snd_card_cs46xx_remove(struct pci_dev *pci) | ||
159 | { | ||
160 | snd_card_free(pci_get_drvdata(pci)); | ||
161 | pci_set_drvdata(pci, NULL); | ||
162 | } | ||
163 | |||
164 | static struct pci_driver driver = { | ||
165 | .name = "Sound Fusion CS46xx", | ||
166 | .id_table = snd_cs46xx_ids, | ||
167 | .probe = snd_card_cs46xx_probe, | ||
168 | .remove = __devexit_p(snd_card_cs46xx_remove), | ||
169 | SND_PCI_PM_CALLBACKS | ||
170 | }; | ||
171 | |||
172 | static int __init alsa_card_cs46xx_init(void) | ||
173 | { | ||
174 | return pci_module_init(&driver); | ||
175 | } | ||
176 | |||
177 | static void __exit alsa_card_cs46xx_exit(void) | ||
178 | { | ||
179 | pci_unregister_driver(&driver); | ||
180 | } | ||
181 | |||
182 | module_init(alsa_card_cs46xx_init) | ||
183 | module_exit(alsa_card_cs46xx_exit) | ||
diff --git a/sound/pci/cs46xx/cs46xx_image.h b/sound/pci/cs46xx/cs46xx_image.h new file mode 100644 index 000000000000..dc93f62db2c2 --- /dev/null +++ b/sound/pci/cs46xx/cs46xx_image.h | |||
@@ -0,0 +1,3468 @@ | |||
1 | struct BA1struct { | ||
2 | struct { | ||
3 | unsigned long offset; | ||
4 | unsigned long size; | ||
5 | } memory[BA1_MEMORY_COUNT]; | ||
6 | u32 map[BA1_DWORD_SIZE]; | ||
7 | }; | ||
8 | |||
9 | |||
10 | static struct BA1struct BA1Struct = { | ||
11 | {{ 0x00000000, 0x00003000 },{ 0x00010000, 0x00003800 },{ 0x00020000, 0x00007000 }}, | ||
12 | {0x00000000,0x00000000,0x00000000,0x00000000, | ||
13 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
14 | 0x00000000,0x00000000,0x00000163,0x00000000, | ||
15 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
16 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
17 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
18 | 0x00000000,0x00200040,0x00008010,0x00000000, | ||
19 | 0x00000000,0x80000001,0x00000001,0x00060000, | ||
20 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
21 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
22 | 0x00000000,0x00900080,0x00000173,0x00000000, | ||
23 | 0x00000000,0x00000010,0x00800000,0x00900000, | ||
24 | 0xf2c0000f,0x00000200,0x00000000,0x00010600, | ||
25 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
26 | 0x00000000,0x00000000,0x00000163,0x330300c2, | ||
27 | 0x06000000,0x00000000,0x80008000,0x80008000, | ||
28 | 0x3fc0000f,0x00000301,0x00010400,0x00000000, | ||
29 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
30 | 0x00000000,0x00b00000,0x00d0806d,0x330480c3, | ||
31 | 0x04800000,0x00000001,0x00800001,0x0000ffff, | ||
32 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
33 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
34 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
35 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
36 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
37 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
38 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
39 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
40 | 0x066a0600,0x06350070,0x0000929d,0x929d929d, | ||
41 | 0x00000000,0x0000735a,0x00000600,0x00000000, | ||
42 | 0x929d735a,0x8734abfe,0x00010000,0x735a735a, | ||
43 | 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
44 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
45 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
46 | 0x00000000,0x00000000,0x0000804f,0x000000c3, | ||
47 | 0x05000000,0x00a00010,0x00000000,0x80008000, | ||
48 | 0x00000000,0x00000000,0x00000700,0x00000000, | ||
49 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
50 | 0x00000080,0x00a00000,0x0000809a,0x000000c2, | ||
51 | 0x07400000,0x00000000,0x80008000,0xffffffff, | ||
52 | 0x00c80028,0x00005555,0x00000000,0x000107a0, | ||
53 | 0x00c80028,0x000000c2,0x06800000,0x00000000, | ||
54 | 0x06e00080,0x00300000,0x000080bb,0x000000c9, | ||
55 | 0x07a00000,0x04000000,0x80008000,0xffffffff, | ||
56 | 0x00c80028,0x00005555,0x00000000,0x00000780, | ||
57 | 0x00c80028,0x000000c5,0xff800000,0x00000000, | ||
58 | 0x00640080,0x00c00000,0x00008197,0x000000c9, | ||
59 | 0x07800000,0x04000000,0x80008000,0xffffffff, | ||
60 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
61 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
62 | 0x00000000,0x00000000,0x0000805e,0x000000c1, | ||
63 | 0x00000000,0x00800000,0x80008000,0x80008000, | ||
64 | 0x00020000,0x0000ffff,0x00000000,0x00000000, | ||
65 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
66 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
67 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
68 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
69 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
70 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
71 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
72 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
73 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
74 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
75 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
76 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
77 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
78 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
79 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
80 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
81 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
82 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
83 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
84 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
85 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
86 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
87 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
88 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
89 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
90 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
91 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
92 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
93 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
94 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
95 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
96 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
97 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
98 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
99 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
100 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
101 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
102 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
103 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
104 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
105 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
106 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
107 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
108 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
109 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
110 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
111 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
112 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
113 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
114 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
115 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
116 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
117 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
118 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
119 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
120 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
121 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
122 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
123 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
124 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
125 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
126 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
127 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
128 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
129 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
130 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
131 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
132 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
133 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
134 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
135 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
136 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
137 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
138 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
139 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
140 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
141 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
142 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
143 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
144 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
145 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
146 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
147 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
148 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
149 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
150 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
151 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
152 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
153 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
154 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
155 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
156 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
157 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
158 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
159 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
160 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
161 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
162 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
163 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
164 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
165 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
166 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
167 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
168 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
169 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
170 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
171 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
172 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
173 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
174 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
175 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
176 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
177 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
178 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
179 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
180 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
181 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
182 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
183 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
184 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
185 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
186 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
187 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
188 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
189 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
190 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
191 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
192 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
193 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
194 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
195 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
196 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
197 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
198 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
199 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
200 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
201 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
202 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
203 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
204 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
205 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
206 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
207 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
208 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
209 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
210 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
211 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
212 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
213 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
214 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
215 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
216 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
217 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
218 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
219 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
220 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
221 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
222 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
223 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
224 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
225 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
226 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
227 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
228 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
229 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
230 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
231 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
232 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
233 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
234 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
235 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
236 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
237 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
238 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
239 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
240 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
241 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
242 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
243 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
244 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
245 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
246 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
247 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
248 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
249 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
250 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
251 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
252 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
253 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
254 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
255 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
256 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
257 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
258 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
259 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
260 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
261 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
262 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
263 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
264 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
265 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
266 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
267 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
268 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
269 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
270 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
271 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
272 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
273 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
274 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
275 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
276 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
277 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
278 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
279 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
280 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
281 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
282 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
283 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
284 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
285 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
286 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
287 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
288 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
289 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
290 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
291 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
292 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
293 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
294 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
295 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
296 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
297 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
298 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
299 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
300 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
301 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
302 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
303 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
304 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
305 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
306 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
307 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
308 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
309 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
310 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
311 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
312 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
313 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
314 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
315 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
316 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
317 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
318 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
319 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
320 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
321 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
322 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
323 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
324 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
325 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
326 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
327 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
328 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
329 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
330 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
331 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
332 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
333 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
334 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
335 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
336 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
337 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
338 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
339 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
340 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
341 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
342 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
343 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
344 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
345 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
346 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
347 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
348 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
349 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
350 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
351 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
352 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
353 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
354 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
355 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
356 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
357 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
358 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
359 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
360 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
361 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
362 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
363 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
364 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
365 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
366 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
367 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
368 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
369 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
370 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
371 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
372 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
373 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
374 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
375 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
376 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
377 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
378 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
379 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
380 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
381 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
382 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
383 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
384 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
385 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
386 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
387 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
388 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
389 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
390 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
391 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
392 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
393 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
394 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
395 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
396 | 0x929d0600,0x929d929d,0x929d929d,0x929d0000, | ||
397 | 0x929d929d,0x929d929d,0x929d929d,0x929d929d, | ||
398 | 0x929d929d,0x00100635,0x060b013f,0x00000004, | ||
399 | 0x00000001,0x007a0002,0x00000000,0x066e0610, | ||
400 | 0x0105929d,0x929d929d,0x929d929d,0x929d929d, | ||
401 | 0x929d929d,0xa431ac75,0x0001735a,0xa431ac75, | ||
402 | 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
403 | 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
404 | 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
405 | 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
406 | 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
407 | 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
408 | 0xa431ac75,0xa431ac75,0xa431ac75,0x735a0051, | ||
409 | 0x00000000,0x929d929d,0x929d929d,0x929d929d, | ||
410 | 0x929d929d,0x929d929d,0x929d929d,0x929d929d, | ||
411 | 0x929d929d,0x929d929d,0x00000000,0x06400136, | ||
412 | 0x0000270f,0x00010000,0x007a0000,0x00000000, | ||
413 | 0x068e0645,0x0105929d,0x929d929d,0x929d929d, | ||
414 | 0x929d929d,0x929d929d,0xa431ac75,0x0001735a, | ||
415 | 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
416 | 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
417 | 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
418 | 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
419 | 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
420 | 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
421 | 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
422 | 0x735a0100,0x00000000,0x00000000,0x00000000, | ||
423 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
424 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
425 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
426 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
427 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
428 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
429 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
430 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
431 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
432 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
433 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
434 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
435 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
436 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
437 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
438 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
439 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
440 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
441 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
442 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
443 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
444 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
445 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
446 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
447 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
448 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
449 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
450 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
451 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
452 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
453 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
454 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
455 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
456 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
457 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
458 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
459 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
460 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
461 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
462 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
463 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
464 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
465 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
466 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
467 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
468 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
469 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
470 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
471 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
472 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
473 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
474 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
475 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
476 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
477 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
478 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
479 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
480 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
481 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
482 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
483 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
484 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
485 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
486 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
487 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
488 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
489 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
490 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
491 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
492 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
493 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
494 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
495 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
496 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
497 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
498 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
499 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
500 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
501 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
502 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
503 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
504 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
505 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
506 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
507 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
508 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
509 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
510 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
511 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
512 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
513 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
514 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
515 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
516 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
517 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
518 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
519 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
520 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
521 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
522 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
523 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
524 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
525 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
526 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
527 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
528 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
529 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
530 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
531 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
532 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
533 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
534 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
535 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
536 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
537 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
538 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
539 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
540 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
541 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
542 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
543 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
544 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
545 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
546 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
547 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
548 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
549 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
550 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
551 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
552 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
553 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
554 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
555 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
556 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
557 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
558 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
559 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
560 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
561 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
562 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
563 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
564 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
565 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
566 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
567 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
568 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
569 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
570 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
571 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
572 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
573 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
574 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
575 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
576 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
577 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
578 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
579 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
580 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
581 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
582 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
583 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
584 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
585 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
586 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
587 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
588 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
589 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
590 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
591 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
592 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
593 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
594 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
595 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
596 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
597 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
598 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
599 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
600 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
601 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
602 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
603 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
604 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
605 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
606 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
607 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
608 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
609 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
610 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
611 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
612 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
613 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
614 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
615 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
616 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
617 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
618 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
619 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
620 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
621 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
622 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
623 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
624 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
625 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
626 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
627 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
628 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
629 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
630 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
631 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
632 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
633 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
634 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
635 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
636 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
637 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
638 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
639 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
640 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
641 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
642 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
643 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
644 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
645 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
646 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
647 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
648 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
649 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
650 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
651 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
652 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
653 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
654 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
655 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
656 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
657 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
658 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
659 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
660 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
661 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
662 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
663 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
664 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
665 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
666 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
667 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
668 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
669 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
670 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
671 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
672 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
673 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
674 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
675 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
676 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
677 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
678 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
679 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
680 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
681 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
682 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
683 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
684 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
685 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
686 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
687 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
688 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
689 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
690 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
691 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
692 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
693 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
694 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
695 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
696 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
697 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
698 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
699 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
700 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
701 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
702 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
703 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
704 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
705 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
706 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
707 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
708 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
709 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
710 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
711 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
712 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
713 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
714 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
715 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
716 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
717 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
718 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
719 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
720 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
721 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
722 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
723 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
724 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
725 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
726 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
727 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
728 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
729 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
730 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
731 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
732 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
733 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
734 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
735 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
736 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
737 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
738 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
739 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
740 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
741 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
742 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
743 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
744 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
745 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
746 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
747 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
748 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
749 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
750 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
751 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
752 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
753 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
754 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
755 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
756 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
757 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
758 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
759 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
760 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
761 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
762 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
763 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
764 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
765 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
766 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
767 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
768 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
769 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
770 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
771 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
772 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
773 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
774 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
775 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
776 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
777 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
778 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
779 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
780 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
781 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
782 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
783 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
784 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
785 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
786 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
787 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
788 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
789 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
790 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
791 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
792 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
793 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
794 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
795 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
796 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
797 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
798 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
799 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
800 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
801 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
802 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
803 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
804 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
805 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
806 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
807 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
808 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
809 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
810 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
811 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
812 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
813 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
814 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
815 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
816 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
817 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
818 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
819 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
820 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
821 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
822 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
823 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
824 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
825 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
826 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
827 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
828 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
829 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
830 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
831 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
832 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
833 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
834 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
835 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
836 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
837 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
838 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
839 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
840 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
841 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
842 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
843 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
844 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
845 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
846 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
847 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
848 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
849 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
850 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
851 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
852 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
853 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
854 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
855 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
856 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
857 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
858 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
859 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
860 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
861 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
862 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
863 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
864 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
865 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
866 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
867 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
868 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
869 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
870 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
871 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
872 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
873 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
874 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
875 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
876 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
877 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
878 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
879 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
880 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
881 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
882 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
883 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
884 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
885 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
886 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
887 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
888 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
889 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
890 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
891 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
892 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
893 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
894 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
895 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
896 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
897 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
898 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
899 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
900 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
901 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
902 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
903 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
904 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
905 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
906 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
907 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
908 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
909 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
910 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
911 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
912 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
913 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
914 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
915 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
916 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
917 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
918 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
919 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
920 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
921 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
922 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
923 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
924 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
925 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
926 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
927 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
928 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
929 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
930 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
931 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
932 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
933 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
934 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
935 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
936 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
937 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
938 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
939 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
940 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
941 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
942 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
943 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
944 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
945 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
946 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
947 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
948 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
949 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
950 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
951 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
952 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
953 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
954 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
955 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
956 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
957 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
958 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
959 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
960 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
961 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
962 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
963 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
964 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
965 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
966 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
967 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
968 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
969 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
970 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
971 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
972 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
973 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
974 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
975 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
976 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
977 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
978 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
979 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
980 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
981 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
982 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
983 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
984 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
985 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
986 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
987 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
988 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
989 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
990 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
991 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
992 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
993 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
994 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
995 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
996 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
997 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
998 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
999 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1000 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1001 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1002 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1003 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1004 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1005 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1006 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1007 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1008 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1009 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1010 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1011 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1012 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1013 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1014 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1015 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1016 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1017 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1018 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1019 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1020 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1021 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1022 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1023 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1024 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1025 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1026 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1027 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1028 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1029 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1030 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1031 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1032 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1033 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1034 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1035 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1036 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1037 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1038 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1039 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1040 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1041 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1042 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1043 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1044 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1045 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1046 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1047 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1048 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1049 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1050 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1051 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1052 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1053 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1054 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1055 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1056 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1057 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1058 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1059 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1060 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1061 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1062 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1063 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1064 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1065 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1066 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1067 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1068 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1069 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1070 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1071 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1072 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1073 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1074 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1075 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1076 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1077 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1078 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1079 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1080 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1081 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1082 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1083 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1084 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1085 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1086 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1087 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1088 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1089 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1090 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1091 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1092 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1093 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1094 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1095 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1096 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1097 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1098 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1099 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1100 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1101 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1102 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1103 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1104 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1105 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1106 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1107 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1108 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1109 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1110 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1111 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1112 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1113 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1114 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1115 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1116 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1117 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1118 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1119 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1120 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1121 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1122 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1123 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1124 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1125 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1126 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1127 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1128 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1129 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1130 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1131 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1132 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1133 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1134 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1135 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1136 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1137 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1138 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1139 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1140 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1141 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1142 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1143 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1144 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1145 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1146 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1147 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1148 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1149 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1150 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1151 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1152 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1153 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1154 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1155 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1156 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1157 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1158 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1159 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1160 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1161 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1162 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1163 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1164 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1165 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1166 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1167 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1168 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1169 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1170 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1171 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1172 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1173 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1174 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1175 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1176 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1177 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1178 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1179 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1180 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1181 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1182 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1183 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1184 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1185 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1186 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1187 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1188 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1189 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1190 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1191 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1192 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1193 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1194 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1195 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1196 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1197 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1198 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1199 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1200 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1201 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1202 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1203 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1204 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1205 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1206 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1207 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1208 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1209 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1210 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1211 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1212 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1213 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1214 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1215 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1216 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1217 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1218 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1219 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1220 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1221 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1222 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1223 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1224 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1225 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1226 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1227 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1228 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1229 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1230 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1231 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1232 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1233 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1234 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1235 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1236 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1237 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1238 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1239 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1240 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1241 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1242 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1243 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1244 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1245 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1246 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1247 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1248 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1249 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1250 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1251 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1252 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1253 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1254 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1255 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1256 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1257 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1258 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1259 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1260 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1261 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1262 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1263 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1264 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1265 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1266 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1267 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1268 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1269 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1270 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1271 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1272 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1273 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1274 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1275 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1276 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1277 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1278 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1279 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1280 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1281 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1282 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1283 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1284 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1285 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1286 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1287 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1288 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1289 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1290 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1291 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1292 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1293 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1294 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1295 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1296 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1297 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1298 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1299 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1300 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1301 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1302 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1303 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1304 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1305 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1306 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1307 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1308 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1309 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1310 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1311 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1312 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1313 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1314 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1315 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1316 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1317 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1318 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1319 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1320 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1321 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1322 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1323 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1324 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1325 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1326 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1327 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1328 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1329 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1330 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1331 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1332 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1333 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1334 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1335 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1336 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1337 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1338 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1339 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1340 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1341 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1342 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1343 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1344 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1345 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1346 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1347 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1348 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1349 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1350 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1351 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1352 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1353 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1354 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1355 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1356 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1357 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1358 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1359 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1360 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1361 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1362 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1363 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1364 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1365 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1366 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1367 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1368 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1369 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1370 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1371 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1372 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1373 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1374 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1375 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1376 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1377 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1378 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1379 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1380 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1381 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1382 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1383 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1384 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1385 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1386 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1387 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1388 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1389 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1390 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1391 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1392 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1393 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1394 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1395 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1396 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1397 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1398 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1399 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1400 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1401 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1402 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1403 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1404 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1405 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1406 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1407 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1408 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1409 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1410 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1411 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1412 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1413 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1414 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1415 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1416 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1417 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1418 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1419 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1420 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1421 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1422 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1423 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1424 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1425 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1426 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1427 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1428 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1429 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1430 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1431 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1432 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1433 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1434 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1435 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1436 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1437 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1438 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1439 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1440 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1441 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1442 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1443 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1444 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1445 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1446 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1447 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1448 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1449 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1450 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1451 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1452 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1453 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1454 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1455 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1456 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1457 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1458 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1459 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1460 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1461 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1462 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1463 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1464 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1465 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1466 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1467 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1468 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1469 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1470 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1471 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1472 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1473 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1474 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1475 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1476 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1477 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1478 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1479 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1480 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1481 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1482 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1483 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1484 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1485 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1486 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1487 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1488 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1489 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1490 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1491 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1492 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1493 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1494 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1495 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1496 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1497 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1498 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1499 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1500 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1501 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1502 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1503 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1504 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1505 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1506 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1507 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1508 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1509 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1510 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1511 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1512 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1513 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1514 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1515 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1516 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1517 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1518 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1519 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1520 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1521 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1522 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1523 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1524 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1525 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1526 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1527 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1528 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1529 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1530 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1531 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1532 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1533 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1534 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1535 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1536 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1537 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1538 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1539 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1540 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1541 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1542 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1543 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1544 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1545 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1546 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1547 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1548 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1549 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1550 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1551 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1552 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1553 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1554 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1555 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1556 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1557 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1558 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1559 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1560 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1561 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1562 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1563 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1564 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1565 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1566 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1567 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1568 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1569 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1570 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1571 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1572 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1573 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1574 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1575 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1576 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1577 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1578 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1579 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1580 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1581 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1582 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1583 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1584 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1585 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1586 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1587 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1588 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1589 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1590 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1591 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1592 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1593 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1594 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1595 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1596 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1597 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1598 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1599 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1600 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1601 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1602 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1603 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1604 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1605 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1606 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1607 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1608 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1609 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1610 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1611 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1612 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1613 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1614 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1615 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1616 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1617 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1618 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1619 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1620 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1621 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1622 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1623 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1624 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1625 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1626 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1627 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1628 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1629 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1630 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1631 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1632 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1633 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1634 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1635 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1636 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1637 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1638 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1639 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1640 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1641 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1642 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1643 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1644 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1645 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1646 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1647 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1648 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1649 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1650 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1651 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1652 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1653 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1654 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1655 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1656 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1657 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1658 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1659 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1660 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1661 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1662 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1663 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1664 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1665 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1666 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1667 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1668 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1669 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1670 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1671 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1672 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1673 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1674 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1675 | 0x00000000,0x00000000,0x00000000,0x00010004, | ||
1676 | 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
1677 | 0x00001705,0x00001400,0x000a411e,0x00001003, | ||
1678 | 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
1679 | 0x00009705,0x00001400,0x000a411e,0x00001003, | ||
1680 | 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
1681 | 0x00011705,0x00001400,0x000a411e,0x00001003, | ||
1682 | 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
1683 | 0x00019705,0x00001400,0x000a411e,0x00001003, | ||
1684 | 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
1685 | 0x00021705,0x00001400,0x000a411e,0x00001003, | ||
1686 | 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
1687 | 0x00029705,0x00001400,0x000a411e,0x00001003, | ||
1688 | 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
1689 | 0x00031705,0x00001400,0x000a411e,0x00001003, | ||
1690 | 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
1691 | 0x00039705,0x00001400,0x000a411e,0x00001003, | ||
1692 | 0x000fe19e,0x00001003,0x0009c730,0x00001003, | ||
1693 | 0x0008e19c,0x00001003,0x000083c1,0x00093040, | ||
1694 | 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
1695 | 0x00009705,0x00001400,0x000a211e,0x00001003, | ||
1696 | 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
1697 | 0x00011705,0x00001400,0x000a211e,0x00001003, | ||
1698 | 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
1699 | 0x00019705,0x00001400,0x000a211e,0x00001003, | ||
1700 | 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
1701 | 0x00021705,0x00001400,0x000a211e,0x00001003, | ||
1702 | 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
1703 | 0x00029705,0x00001400,0x000a211e,0x00001003, | ||
1704 | 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
1705 | 0x00031705,0x00001400,0x000a211e,0x00001003, | ||
1706 | 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
1707 | 0x00039705,0x00001400,0x000a211e,0x00001003, | ||
1708 | 0x0000a730,0x00001008,0x000e2730,0x00001002, | ||
1709 | 0x0000a731,0x00001002,0x0000a731,0x00001002, | ||
1710 | 0x0000a731,0x00001002,0x0000a731,0x00001002, | ||
1711 | 0x0000a731,0x00001002,0x0000a731,0x00001002, | ||
1712 | 0x00000000,0x00000000,0x000f619c,0x00001003, | ||
1713 | 0x0007f801,0x000c0000,0x00000037,0x00001000, | ||
1714 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1715 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1716 | 0x00000000,0x000c0000,0x00000000,0x00000000, | ||
1717 | 0x0000373c,0x00001000,0x00000000,0x00000000, | ||
1718 | 0x000ee19c,0x00001003,0x0007f801,0x000c0000, | ||
1719 | 0x00000037,0x00001000,0x00000000,0x00000000, | ||
1720 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1721 | 0x00000000,0x00000000,0x0000273c,0x00001000, | ||
1722 | 0x00000033,0x00001000,0x000e679e,0x00001003, | ||
1723 | 0x00007705,0x00001400,0x000ac71e,0x00001003, | ||
1724 | 0x00087fc1,0x000c3be0,0x0007f801,0x000c0000, | ||
1725 | 0x00000037,0x00001000,0x00000000,0x00000000, | ||
1726 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1727 | 0x00000000,0x00000000,0x0000a730,0x00001003, | ||
1728 | 0x00000033,0x00001000,0x0007f801,0x000c0000, | ||
1729 | 0x00000037,0x00001000,0x00000000,0x00000000, | ||
1730 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1731 | 0x00000000,0x00000000,0x00000000,0x000c0000, | ||
1732 | 0x00000032,0x00001000,0x0000273d,0x00001000, | ||
1733 | 0x0004a730,0x00001003,0x00000f41,0x00097140, | ||
1734 | 0x0000a841,0x0009b240,0x0000a0c1,0x0009f040, | ||
1735 | 0x0001c641,0x00093540,0x0001cec1,0x0009b5c0, | ||
1736 | 0x00000000,0x00000000,0x0001bf05,0x0003fc40, | ||
1737 | 0x00002725,0x000aa400,0x00013705,0x00093a00, | ||
1738 | 0x0000002e,0x0009d6c0,0x00038630,0x00001004, | ||
1739 | 0x0004ef0a,0x000eb785,0x0003fc8a,0x00000000, | ||
1740 | 0x00000000,0x000c70e0,0x0007d182,0x0002c640, | ||
1741 | 0x00000630,0x00001004,0x000799b8,0x0002c6c0, | ||
1742 | 0x00031705,0x00092240,0x00039f05,0x000932c0, | ||
1743 | 0x0003520a,0x00000000,0x00040731,0x0000100b, | ||
1744 | 0x00010705,0x000b20c0,0x00000000,0x000eba44, | ||
1745 | 0x00032108,0x000c60c4,0x00065208,0x000c2917, | ||
1746 | 0x000406b0,0x00001007,0x00012f05,0x00036880, | ||
1747 | 0x0002818e,0x000c0000,0x0004410a,0x00000000, | ||
1748 | 0x00040630,0x00001007,0x00029705,0x000c0000, | ||
1749 | 0x00000000,0x00000000,0x00003fc1,0x0003fc40, | ||
1750 | 0x000037c1,0x00091b40,0x00003fc1,0x000911c0, | ||
1751 | 0x000037c1,0x000957c0,0x00003fc1,0x000951c0, | ||
1752 | 0x000037c1,0x00000000,0x00003fc1,0x000991c0, | ||
1753 | 0x000037c1,0x00000000,0x00003fc1,0x0009d1c0, | ||
1754 | 0x000037c1,0x00000000,0x0001ccc1,0x000915c0, | ||
1755 | 0x0001c441,0x0009d800,0x0009cdc1,0x00091240, | ||
1756 | 0x0001c541,0x00091d00,0x0009cfc1,0x00095240, | ||
1757 | 0x0001c741,0x00095c80,0x000e8ca9,0x00099240, | ||
1758 | 0x000e85ad,0x00095640,0x00069ca9,0x00099d80, | ||
1759 | 0x000e952d,0x00099640,0x000eaca9,0x0009d6c0, | ||
1760 | 0x000ea5ad,0x00091a40,0x0006bca9,0x0009de80, | ||
1761 | 0x000eb52d,0x00095a40,0x000ecca9,0x00099ac0, | ||
1762 | 0x000ec5ad,0x0009da40,0x000edca9,0x0009d300, | ||
1763 | 0x000a6e0a,0x00001000,0x000ed52d,0x00091e40, | ||
1764 | 0x000eeca9,0x00095ec0,0x000ee5ad,0x00099e40, | ||
1765 | 0x0006fca9,0x00002500,0x000fb208,0x000c59a0, | ||
1766 | 0x000ef52d,0x0009de40,0x00068ca9,0x000912c1, | ||
1767 | 0x000683ad,0x00095241,0x00020f05,0x000991c1, | ||
1768 | 0x00000000,0x00000000,0x00086f88,0x00001000, | ||
1769 | 0x0009cf81,0x000b5340,0x0009c701,0x000b92c0, | ||
1770 | 0x0009de81,0x000bd300,0x0009d601,0x000b1700, | ||
1771 | 0x0001fd81,0x000b9d80,0x0009f501,0x000b57c0, | ||
1772 | 0x000a0f81,0x000bd740,0x00020701,0x000b5c80, | ||
1773 | 0x000a1681,0x000b97c0,0x00021601,0x00002500, | ||
1774 | 0x000a0701,0x000b9b40,0x000a0f81,0x000b1bc0, | ||
1775 | 0x00021681,0x00002d00,0x00020f81,0x000bd800, | ||
1776 | 0x000a0701,0x000b5bc0,0x00021601,0x00003500, | ||
1777 | 0x000a0f81,0x000b5f40,0x000a0701,0x000bdbc0, | ||
1778 | 0x00021681,0x00003d00,0x00020f81,0x000b1d00, | ||
1779 | 0x000a0701,0x000b1fc0,0x00021601,0x00020500, | ||
1780 | 0x00020f81,0x000b1341,0x000a0701,0x000b9fc0, | ||
1781 | 0x00021681,0x00020d00,0x00020f81,0x000bde80, | ||
1782 | 0x000a0701,0x000bdfc0,0x00021601,0x00021500, | ||
1783 | 0x00020f81,0x000b9341,0x00020701,0x000b53c1, | ||
1784 | 0x00021681,0x00021d00,0x000a0f81,0x000d0380, | ||
1785 | 0x0000b601,0x000b15c0,0x00007b01,0x00000000, | ||
1786 | 0x00007b81,0x000bd1c0,0x00007b01,0x00000000, | ||
1787 | 0x00007b81,0x000b91c0,0x00007b01,0x000b57c0, | ||
1788 | 0x00007b81,0x000b51c0,0x00007b01,0x000b1b40, | ||
1789 | 0x00007b81,0x000b11c0,0x00087b01,0x000c3dc0, | ||
1790 | 0x0007e488,0x000d7e45,0x00000000,0x000d7a44, | ||
1791 | 0x0007e48a,0x00000000,0x00011f05,0x00084080, | ||
1792 | 0x00000000,0x00000000,0x00001705,0x000b3540, | ||
1793 | 0x00008a01,0x000bf040,0x00007081,0x000bb5c0, | ||
1794 | 0x00055488,0x00000000,0x0000d482,0x0003fc40, | ||
1795 | 0x0003fc88,0x00000000,0x0001e401,0x000b3a00, | ||
1796 | 0x0001ec81,0x000bd6c0,0x0004ef08,0x000eb784, | ||
1797 | 0x000c86b0,0x00001007,0x00008281,0x000bb240, | ||
1798 | 0x0000b801,0x000b7140,0x00007888,0x00000000, | ||
1799 | 0x0000073c,0x00001000,0x0007f188,0x000c0000, | ||
1800 | 0x00000000,0x00000000,0x00055288,0x000c555c, | ||
1801 | 0x0005528a,0x000c0000,0x0009fa88,0x000c5d00, | ||
1802 | 0x0000fa88,0x00000000,0x00000032,0x00001000, | ||
1803 | 0x0000073d,0x00001000,0x0007f188,0x000c0000, | ||
1804 | 0x00000000,0x00000000,0x0008c01c,0x00001003, | ||
1805 | 0x00002705,0x00001008,0x0008b201,0x000c1392, | ||
1806 | 0x0000ba01,0x00000000,0x00008731,0x00001400, | ||
1807 | 0x0004c108,0x000fe0c4,0x00057488,0x00000000, | ||
1808 | 0x000a6388,0x00001001,0x0008b334,0x000bc141, | ||
1809 | 0x0003020e,0x00000000,0x000886b0,0x00001008, | ||
1810 | 0x00003625,0x000c5dfa,0x000a638a,0x00001001, | ||
1811 | 0x0008020e,0x00001002,0x0008a6b0,0x00001008, | ||
1812 | 0x0007f301,0x00000000,0x00000000,0x00000000, | ||
1813 | 0x00002725,0x000a8c40,0x000000ae,0x00000000, | ||
1814 | 0x000d8630,0x00001008,0x00000000,0x000c74e0, | ||
1815 | 0x0007d182,0x0002d640,0x000a8630,0x00001008, | ||
1816 | 0x000799b8,0x0002d6c0,0x0000748a,0x000c3ec5, | ||
1817 | 0x0007420a,0x000c0000,0x00062208,0x000c4117, | ||
1818 | 0x00070630,0x00001009,0x00000000,0x000c0000, | ||
1819 | 0x0001022e,0x00000000,0x0003a630,0x00001009, | ||
1820 | 0x00000000,0x000c0000,0x00000036,0x00001000, | ||
1821 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1822 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1823 | 0x0002a730,0x00001008,0x0007f801,0x000c0000, | ||
1824 | 0x00000037,0x00001000,0x00000000,0x00000000, | ||
1825 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1826 | 0x00000000,0x00000000,0x0002a730,0x00001008, | ||
1827 | 0x00000033,0x00001000,0x0002a705,0x00001008, | ||
1828 | 0x00007a01,0x000c0000,0x000e6288,0x000d550a, | ||
1829 | 0x0006428a,0x00000000,0x00060730,0x0000100a, | ||
1830 | 0x00000000,0x000c0000,0x00000000,0x00000000, | ||
1831 | 0x0007aab0,0x00034880,0x00078fb0,0x0000100b, | ||
1832 | 0x00057488,0x00000000,0x00033b94,0x00081140, | ||
1833 | 0x000183ae,0x00000000,0x000786b0,0x0000100b, | ||
1834 | 0x00022f05,0x000c3545,0x0000eb8a,0x00000000, | ||
1835 | 0x00042731,0x00001003,0x0007aab0,0x00034880, | ||
1836 | 0x00048fb0,0x0000100a,0x00057488,0x00000000, | ||
1837 | 0x00033b94,0x00081140,0x000183ae,0x00000000, | ||
1838 | 0x000806b0,0x0000100b,0x00022f05,0x00000000, | ||
1839 | 0x00007401,0x00091140,0x00048f05,0x000951c0, | ||
1840 | 0x00042731,0x00001003,0x0000473d,0x00001000, | ||
1841 | 0x000f19b0,0x000bbc47,0x00080000,0x000bffc7, | ||
1842 | 0x000fe19e,0x00001003,0x00000000,0x00000000, | ||
1843 | 0x0008e19c,0x00001003,0x000083c1,0x00093040, | ||
1844 | 0x00000f41,0x00097140,0x0000a841,0x0009b240, | ||
1845 | 0x0000a0c1,0x0009f040,0x0001c641,0x00093540, | ||
1846 | 0x0001cec1,0x0009b5c0,0x00000000,0x000fdc44, | ||
1847 | 0x00055208,0x00000000,0x00010705,0x000a2880, | ||
1848 | 0x0000a23a,0x00093a00,0x0003fc8a,0x000df6c5, | ||
1849 | 0x0004ef0a,0x000c0000,0x00012f05,0x00036880, | ||
1850 | 0x00065308,0x000c2997,0x000d86b0,0x0000100a, | ||
1851 | 0x0004410a,0x000d40c7,0x00000000,0x00000000, | ||
1852 | 0x00080730,0x00001004,0x00056f0a,0x000ea105, | ||
1853 | 0x00000000,0x00000000,0x0000473d,0x00001000, | ||
1854 | 0x000f19b0,0x000bbc47,0x00080000,0x000bffc7, | ||
1855 | 0x0000273d,0x00001000,0x00000000,0x000eba44, | ||
1856 | 0x00048f05,0x0000f440,0x00007401,0x0000f7c0, | ||
1857 | 0x00000734,0x00001000,0x00010705,0x000a6880, | ||
1858 | 0x00006a88,0x000c75c4,0x00000000,0x000e5084, | ||
1859 | 0x00000000,0x000eba44,0x00087401,0x000e4782, | ||
1860 | 0x00000734,0x00001000,0x00010705,0x000a6880, | ||
1861 | 0x00006a88,0x000c75c4,0x0007c108,0x000c0000, | ||
1862 | 0x0007e721,0x000bed40,0x00005f25,0x000badc0, | ||
1863 | 0x0003ba97,0x000beb80,0x00065590,0x000b2e00, | ||
1864 | 0x00033217,0x00003ec0,0x00065590,0x000b8e40, | ||
1865 | 0x0003ed80,0x000491c0,0x00073fb0,0x00074c80, | ||
1866 | 0x000283a0,0x0000100c,0x000ee388,0x00042970, | ||
1867 | 0x00008301,0x00021ef2,0x000b8f14,0x0000000f, | ||
1868 | 0x000c4d8d,0x0000001b,0x000d6dc2,0x000e06c6, | ||
1869 | 0x000032ac,0x000c3916,0x0004edc2,0x00074c80, | ||
1870 | 0x00078898,0x00001000,0x00038894,0x00000032, | ||
1871 | 0x000c4d8d,0x00092e1b,0x000d6dc2,0x000e06c6, | ||
1872 | 0x0004edc2,0x000c1956,0x0000722c,0x00034a00, | ||
1873 | 0x00041705,0x0009ed40,0x00058730,0x00001400, | ||
1874 | 0x000d7488,0x000c3a00,0x00048f05,0x00000000, | ||
1875 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1876 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1877 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1878 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1879 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1880 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1881 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1882 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1883 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1884 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1885 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1886 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1887 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1888 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1889 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1890 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1891 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1892 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1893 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1894 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1895 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1896 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1897 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1898 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1899 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1900 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1901 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1902 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1903 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1904 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1905 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1906 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1907 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1908 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1909 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1910 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1911 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1912 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1913 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1914 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1915 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1916 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1917 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1918 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1919 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1920 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1921 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1922 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1923 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1924 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1925 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1926 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1927 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1928 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1929 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1930 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1931 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1932 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1933 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1934 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1935 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1936 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1937 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1938 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1939 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1940 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1941 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1942 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1943 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1944 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1945 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1946 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1947 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1948 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1949 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1950 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1951 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1952 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1953 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1954 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1955 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1956 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1957 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1958 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1959 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1960 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1961 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1962 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1963 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1964 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1965 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1966 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1967 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1968 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1969 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1970 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1971 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1972 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1973 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1974 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1975 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1976 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1977 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1978 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1979 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1980 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1981 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1982 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1983 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1984 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1985 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1986 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1987 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1988 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1989 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1990 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1991 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1992 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1993 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1994 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1995 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1996 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1997 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1998 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1999 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2000 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2001 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2002 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2003 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2004 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2005 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2006 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2007 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2008 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2009 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2010 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2011 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2012 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2013 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2014 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2015 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2016 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2017 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2018 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2019 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2020 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2021 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2022 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2023 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2024 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2025 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2026 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2027 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2028 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2029 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2030 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2031 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2032 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2033 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2034 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2035 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2036 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2037 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2038 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2039 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2040 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2041 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2042 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2043 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2044 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2045 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2046 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2047 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2048 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2049 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2050 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2051 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2052 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2053 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2054 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2055 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2056 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2057 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2058 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2059 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2060 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2061 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2062 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2063 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2064 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2065 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2066 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2067 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2068 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2069 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2070 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2071 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2072 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2073 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2074 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2075 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2076 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2077 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2078 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2079 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2080 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2081 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2082 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2083 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2084 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2085 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2086 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2087 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2088 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2089 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2090 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2091 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2092 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2093 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2094 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2095 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2096 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2097 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2098 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2099 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2100 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2101 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2102 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2103 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2104 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2105 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2106 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2107 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2108 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2109 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2110 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2111 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2112 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2113 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2114 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2115 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2116 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2117 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2118 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2119 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2120 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2121 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2122 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2123 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2124 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2125 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2126 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2127 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2128 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2129 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2130 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2131 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2132 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2133 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2134 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2135 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2136 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2137 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2138 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2139 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2140 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2141 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2142 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2143 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2144 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2145 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2146 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2147 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2148 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2149 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2150 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2151 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2152 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2153 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2154 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2155 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2156 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2157 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2158 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2159 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2160 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2161 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2162 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2163 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2164 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2165 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2166 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2167 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2168 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2169 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2170 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2171 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2172 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2173 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2174 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2175 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2176 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2177 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2178 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2179 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2180 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2181 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2182 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2183 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2184 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2185 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2186 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2187 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2188 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2189 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2190 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2191 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2192 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2193 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2194 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2195 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2196 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2197 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2198 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2199 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2200 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2201 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2202 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2203 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2204 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2205 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2206 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2207 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2208 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2209 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2210 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2211 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2212 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2213 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2214 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2215 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2216 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2217 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2218 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2219 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2220 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2221 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2222 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2223 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2224 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2225 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2226 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2227 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2228 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2229 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2230 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2231 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2232 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2233 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2234 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2235 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2236 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2237 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2238 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2239 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2240 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2241 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2242 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2243 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2244 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2245 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2246 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2247 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2248 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2249 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2250 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2251 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2252 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2253 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2254 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2255 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2256 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2257 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2258 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2259 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2260 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2261 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2262 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2263 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2264 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2265 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2266 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2267 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2268 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2269 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2270 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2271 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2272 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2273 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2274 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2275 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2276 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2277 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2278 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2279 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2280 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2281 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2282 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2283 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2284 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2285 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2286 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2287 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2288 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2289 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2290 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2291 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2292 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2293 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2294 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2295 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2296 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2297 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2298 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2299 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2300 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2301 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2302 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2303 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2304 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2305 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2306 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2307 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2308 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2309 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2310 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2311 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2312 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2313 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2314 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2315 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2316 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2317 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2318 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2319 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2320 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2321 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2322 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2323 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2324 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2325 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2326 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2327 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2328 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2329 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2330 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2331 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2332 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2333 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2334 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2335 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2336 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2337 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2338 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2339 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2340 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2341 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2342 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2343 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2344 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2345 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2346 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2347 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2348 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2349 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2350 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2351 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2352 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2353 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2354 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2355 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2356 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2357 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2358 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2359 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2360 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2361 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2362 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2363 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2364 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2365 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2366 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2367 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2368 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2369 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2370 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2371 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2372 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2373 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2374 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2375 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2376 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2377 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2378 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2379 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2380 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2381 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2382 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2383 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2384 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2385 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2386 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2387 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2388 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2389 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2390 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2391 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2392 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2393 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2394 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2395 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2396 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2397 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2398 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2399 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2400 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2401 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2402 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2403 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2404 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2405 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2406 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2407 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2408 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2409 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2410 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2411 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2412 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2413 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2414 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2415 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2416 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2417 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2418 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2419 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2420 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2421 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2422 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2423 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2424 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2425 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2426 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2427 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2428 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2429 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2430 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2431 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2432 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2433 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2434 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2435 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2436 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2437 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2438 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2439 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2440 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2441 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2442 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2443 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2444 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2445 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2446 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2447 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2448 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2449 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2450 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2451 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2452 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2453 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2454 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2455 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2456 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2457 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2458 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2459 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2460 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2461 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2462 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2463 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2464 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2465 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2466 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2467 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2468 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2469 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2470 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2471 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2472 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2473 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2474 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2475 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2476 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2477 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2478 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2479 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2480 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2481 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2482 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2483 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2484 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2485 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2486 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2487 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2488 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2489 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2490 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2491 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2492 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2493 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2494 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2495 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2496 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2497 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2498 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2499 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2500 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2501 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2502 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2503 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2504 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2505 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2506 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2507 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2508 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2509 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2510 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2511 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2512 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2513 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2514 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2515 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2516 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2517 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2518 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2519 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2520 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2521 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2522 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2523 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2524 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2525 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2526 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2527 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2528 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2529 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2530 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2531 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2532 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2533 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2534 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2535 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2536 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2537 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2538 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2539 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2540 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2541 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2542 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2543 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2544 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2545 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2546 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2547 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2548 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2549 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2550 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2551 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2552 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2553 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2554 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2555 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2556 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2557 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2558 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2559 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2560 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2561 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2562 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2563 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2564 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2565 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2566 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2567 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2568 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2569 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2570 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2571 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2572 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2573 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2574 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2575 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2576 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2577 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2578 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2579 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2580 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2581 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2582 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2583 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2584 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2585 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2586 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2587 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2588 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2589 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2590 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2591 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2592 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2593 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2594 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2595 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2596 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2597 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2598 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2599 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2600 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2601 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2602 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2603 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2604 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2605 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2606 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2607 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2608 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2609 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2610 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2611 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2612 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2613 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2614 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2615 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2616 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2617 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2618 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2619 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2620 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2621 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2622 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2623 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2624 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2625 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2626 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2627 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2628 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2629 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2630 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2631 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2632 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2633 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2634 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2635 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2636 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2637 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2638 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2639 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2640 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2641 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2642 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2643 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2644 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2645 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2646 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2647 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2648 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2649 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2650 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2651 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2652 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2653 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2654 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2655 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2656 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2657 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2658 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2659 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2660 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2661 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2662 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2663 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2664 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2665 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2666 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2667 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2668 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2669 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2670 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2671 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2672 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2673 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2674 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2675 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2676 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2677 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2678 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2679 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2680 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2681 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2682 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2683 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2684 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2685 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2686 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2687 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2688 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2689 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2690 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2691 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2692 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2693 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2694 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2695 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2696 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2697 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2698 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2699 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2700 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2701 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2702 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2703 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2704 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2705 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2706 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2707 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2708 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2709 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2710 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2711 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2712 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2713 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2714 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2715 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2716 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2717 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2718 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2719 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2720 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2721 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2722 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2723 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2724 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2725 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2726 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2727 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2728 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2729 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2730 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2731 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2732 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2733 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2734 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2735 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2736 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2737 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2738 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2739 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2740 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2741 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2742 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2743 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2744 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2745 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2746 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2747 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2748 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2749 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2750 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2751 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2752 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2753 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2754 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2755 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2756 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2757 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2758 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2759 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2760 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2761 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2762 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2763 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2764 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2765 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2766 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2767 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2768 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2769 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2770 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2771 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2772 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2773 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2774 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2775 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2776 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2777 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2778 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2779 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2780 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2781 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2782 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2783 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2784 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2785 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2786 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2787 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2788 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2789 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2790 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2791 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2792 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2793 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2794 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2795 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2796 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2797 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2798 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2799 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2800 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2801 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2802 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2803 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2804 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2805 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2806 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2807 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2808 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2809 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2810 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2811 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2812 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2813 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2814 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2815 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2816 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2817 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2818 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2819 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2820 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2821 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2822 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2823 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2824 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2825 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2826 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2827 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2828 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2829 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2830 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2831 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2832 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2833 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2834 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2835 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2836 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2837 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2838 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2839 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2840 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2841 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2842 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2843 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2844 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2845 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2846 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2847 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2848 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2849 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2850 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2851 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2852 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2853 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2854 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2855 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2856 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2857 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2858 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2859 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2860 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2861 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2862 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2863 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2864 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2865 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2866 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2867 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2868 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2869 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2870 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2871 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2872 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2873 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2874 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2875 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2876 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2877 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2878 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2879 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2880 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2881 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2882 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2883 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2884 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2885 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2886 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2887 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2888 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2889 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2890 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2891 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2892 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2893 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2894 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2895 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2896 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2897 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2898 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2899 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2900 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2901 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2902 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2903 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2904 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2905 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2906 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2907 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2908 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2909 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2910 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2911 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2912 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2913 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2914 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2915 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2916 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2917 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2918 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2919 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2920 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2921 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2922 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2923 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2924 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2925 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2926 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2927 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2928 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2929 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2930 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2931 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2932 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2933 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2934 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2935 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2936 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2937 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2938 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2939 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2940 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2941 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2942 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2943 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2944 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2945 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2946 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2947 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2948 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2949 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2950 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2951 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2952 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2953 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2954 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2955 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2956 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2957 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2958 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2959 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2960 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2961 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2962 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2963 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2964 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2965 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2966 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2967 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2968 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2969 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2970 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2971 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2972 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2973 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2974 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2975 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2976 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2977 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2978 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2979 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2980 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2981 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2982 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2983 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2984 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2985 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2986 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2987 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2988 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2989 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2990 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2991 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2992 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2993 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2994 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2995 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2996 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2997 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2998 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
2999 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3000 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3001 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3002 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3003 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3004 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3005 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3006 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3007 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3008 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3009 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3010 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3011 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3012 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3013 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3014 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3015 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3016 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3017 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3018 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3019 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3020 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3021 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3022 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3023 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3024 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3025 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3026 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3027 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3028 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3029 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3030 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3031 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3032 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3033 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3034 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3035 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3036 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3037 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3038 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3039 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3040 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3041 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3042 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3043 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3044 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3045 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3046 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3047 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3048 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3049 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3050 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3051 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3052 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3053 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3054 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3055 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3056 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3057 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3058 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3059 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3060 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3061 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3062 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3063 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3064 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3065 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3066 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3067 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3068 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3069 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3070 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3071 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3072 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3073 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3074 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3075 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3076 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3077 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3078 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3079 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3080 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3081 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3082 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3083 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3084 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3085 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3086 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3087 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3088 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3089 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3090 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3091 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3092 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3093 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3094 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3095 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3096 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3097 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3098 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3099 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3100 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3101 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3102 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3103 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3104 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3105 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3106 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3107 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3108 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3109 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3110 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3111 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3112 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3113 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3114 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3115 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3116 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3117 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3118 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3119 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3120 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3121 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3122 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3123 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3124 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3125 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3126 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3127 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3128 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3129 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3130 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3131 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3132 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3133 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3134 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3135 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3136 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3137 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3138 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3139 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3140 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3141 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3142 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3143 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3144 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3145 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3146 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3147 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3148 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3149 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3150 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3151 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3152 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3153 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3154 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3155 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3156 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3157 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3158 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3159 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3160 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3161 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3162 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3163 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3164 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3165 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3166 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3167 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3168 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3169 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3170 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3171 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3172 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3173 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3174 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3175 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3176 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3177 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3178 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3179 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3180 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3181 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3182 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3183 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3184 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3185 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3186 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3187 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3188 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3189 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3190 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3191 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3192 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3193 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3194 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3195 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3196 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3197 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3198 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3199 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3200 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3201 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3202 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3203 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3204 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3205 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3206 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3207 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3208 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3209 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3210 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3211 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3212 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3213 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3214 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3215 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3216 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3217 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3218 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3219 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3220 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3221 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3222 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3223 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3224 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3225 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3226 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3227 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3228 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3229 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3230 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3231 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3232 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3233 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3234 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3235 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3236 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3237 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3238 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3239 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3240 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3241 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3242 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3243 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3244 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3245 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3246 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3247 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3248 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3249 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3250 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3251 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3252 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3253 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3254 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3255 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3256 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3257 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3258 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3259 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3260 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3261 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3262 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3263 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3264 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3265 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3266 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3267 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3268 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3269 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3270 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3271 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3272 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3273 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3274 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3275 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3276 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3277 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3278 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3279 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3280 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3281 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3282 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3283 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3284 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3285 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3286 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3287 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3288 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3289 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3290 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3291 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3292 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3293 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3294 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3295 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3296 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3297 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3298 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3299 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3300 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3301 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3302 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3303 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3304 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3305 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3306 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3307 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3308 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3309 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3310 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3311 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3312 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3313 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3314 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3315 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3316 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3317 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3318 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3319 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3320 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3321 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3322 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3323 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3324 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3325 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3326 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3327 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3328 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3329 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3330 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3331 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3332 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3333 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3334 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3335 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3336 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3337 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3338 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3339 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3340 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3341 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3342 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3343 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3344 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3345 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3346 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3347 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3348 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3349 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3350 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3351 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3352 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3353 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3354 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3355 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3356 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3357 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3358 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3359 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3360 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3361 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3362 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3363 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3364 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3365 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3366 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3367 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3368 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3369 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3370 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3371 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3372 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3373 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3374 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3375 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3376 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3377 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3378 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3379 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3380 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3381 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3382 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3383 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3384 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3385 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3386 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3387 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3388 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3389 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3390 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3391 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3392 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3393 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3394 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3395 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3396 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3397 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3398 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3399 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3400 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3401 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3402 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3403 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3404 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3405 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3406 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3407 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3408 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3409 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3410 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3411 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3412 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3413 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3414 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3415 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3416 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3417 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3418 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3419 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3420 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3421 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3422 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3423 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3424 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3425 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3426 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3427 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3428 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3429 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3430 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3431 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3432 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3433 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3434 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3435 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3436 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3437 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3438 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3439 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3440 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3441 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3442 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3443 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3444 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3445 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3446 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3447 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3448 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3449 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3450 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3451 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3452 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3453 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3454 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3455 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3456 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3457 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3458 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3459 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3460 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3461 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3462 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3463 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3464 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3465 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3466 | 0x00000000,0x00000000,0x00000000,0x00000000, | ||
3467 | 0x00000000,0x00000000,0x00000000,0x00000000} | ||
3468 | }; | ||
diff --git a/sound/pci/cs46xx/cs46xx_lib.c b/sound/pci/cs46xx/cs46xx_lib.c new file mode 100644 index 000000000000..5f2ffb7efa06 --- /dev/null +++ b/sound/pci/cs46xx/cs46xx_lib.c | |||
@@ -0,0 +1,3922 @@ | |||
1 | /* | ||
2 | * Copyright (c) by Jaroslav Kysela <perex@suse.cz> | ||
3 | * Abramo Bagnara <abramo@alsa-project.org> | ||
4 | * Cirrus Logic, Inc. | ||
5 | * Routines for control of Cirrus Logic CS461x chips | ||
6 | * | ||
7 | * KNOWN BUGS: | ||
8 | * - Sometimes the SPDIF input DSP tasks get's unsynchronized | ||
9 | * and the SPDIF get somewhat "distorcionated", or/and left right channel | ||
10 | * are swapped. To get around this problem when it happens, mute and unmute | ||
11 | * the SPDIF input mixer controll. | ||
12 | * - On the Hercules Game Theater XP the amplifier are sometimes turned | ||
13 | * off on inadecuate moments which causes distorcions on sound. | ||
14 | * | ||
15 | * TODO: | ||
16 | * - Secondary CODEC on some soundcards | ||
17 | * - SPDIF input support for other sample rates then 48khz | ||
18 | * - Posibility to mix the SPDIF output with analog sources. | ||
19 | * - PCM channels for Center and LFE on secondary codec | ||
20 | * | ||
21 | * NOTE: with CONFIG_SND_CS46XX_NEW_DSP unset uses old DSP image (which | ||
22 | * is default configuration), no SPDIF, no secondary codec, no | ||
23 | * multi channel PCM. But known to work. | ||
24 | * | ||
25 | * FINALLY: A credit to the developers Tom and Jordan | ||
26 | * at Cirrus for have helping me out with the DSP, however we | ||
27 | * still don't have sufficient documentation and technical | ||
28 | * references to be able to implement all fancy feutures | ||
29 | * supported by the cs46xx DSP's. | ||
30 | * Benny <benny@hostmobility.com> | ||
31 | * | ||
32 | * This program is free software; you can redistribute it and/or modify | ||
33 | * it under the terms of the GNU General Public License as published by | ||
34 | * the Free Software Foundation; either version 2 of the License, or | ||
35 | * (at your option) any later version. | ||
36 | * | ||
37 | * This program is distributed in the hope that it will be useful, | ||
38 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
39 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
40 | * GNU General Public License for more details. | ||
41 | * | ||
42 | * You should have received a copy of the GNU General Public License | ||
43 | * along with this program; if not, write to the Free Software | ||
44 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
45 | * | ||
46 | */ | ||
47 | |||
48 | #include <sound/driver.h> | ||
49 | #include <linux/delay.h> | ||
50 | #include <linux/pci.h> | ||
51 | #include <linux/pm.h> | ||
52 | #include <linux/init.h> | ||
53 | #include <linux/interrupt.h> | ||
54 | #include <linux/slab.h> | ||
55 | #include <linux/gameport.h> | ||
56 | |||
57 | #include <sound/core.h> | ||
58 | #include <sound/control.h> | ||
59 | #include <sound/info.h> | ||
60 | #include <sound/pcm.h> | ||
61 | #include <sound/pcm_params.h> | ||
62 | #include <sound/cs46xx.h> | ||
63 | |||
64 | #include <asm/io.h> | ||
65 | |||
66 | #include "cs46xx_lib.h" | ||
67 | #include "dsp_spos.h" | ||
68 | |||
69 | static void amp_voyetra(cs46xx_t *chip, int change); | ||
70 | |||
71 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
72 | static snd_pcm_ops_t snd_cs46xx_playback_rear_ops; | ||
73 | static snd_pcm_ops_t snd_cs46xx_playback_indirect_rear_ops; | ||
74 | static snd_pcm_ops_t snd_cs46xx_playback_clfe_ops; | ||
75 | static snd_pcm_ops_t snd_cs46xx_playback_indirect_clfe_ops; | ||
76 | static snd_pcm_ops_t snd_cs46xx_playback_iec958_ops; | ||
77 | static snd_pcm_ops_t snd_cs46xx_playback_indirect_iec958_ops; | ||
78 | #endif | ||
79 | |||
80 | static snd_pcm_ops_t snd_cs46xx_playback_ops; | ||
81 | static snd_pcm_ops_t snd_cs46xx_playback_indirect_ops; | ||
82 | static snd_pcm_ops_t snd_cs46xx_capture_ops; | ||
83 | static snd_pcm_ops_t snd_cs46xx_capture_indirect_ops; | ||
84 | |||
85 | static unsigned short snd_cs46xx_codec_read(cs46xx_t *chip, | ||
86 | unsigned short reg, | ||
87 | int codec_index) | ||
88 | { | ||
89 | int count; | ||
90 | unsigned short result,tmp; | ||
91 | u32 offset = 0; | ||
92 | snd_assert ( (codec_index == CS46XX_PRIMARY_CODEC_INDEX) || | ||
93 | (codec_index == CS46XX_SECONDARY_CODEC_INDEX), | ||
94 | return -EINVAL); | ||
95 | |||
96 | chip->active_ctrl(chip, 1); | ||
97 | |||
98 | if (codec_index == CS46XX_SECONDARY_CODEC_INDEX) | ||
99 | offset = CS46XX_SECONDARY_CODEC_OFFSET; | ||
100 | |||
101 | /* | ||
102 | * 1. Write ACCAD = Command Address Register = 46Ch for AC97 register address | ||
103 | * 2. Write ACCDA = Command Data Register = 470h for data to write to AC97 | ||
104 | * 3. Write ACCTL = Control Register = 460h for initiating the write7---55 | ||
105 | * 4. Read ACCTL = 460h, DCV should be reset by now and 460h = 17h | ||
106 | * 5. if DCV not cleared, break and return error | ||
107 | * 6. Read ACSTS = Status Register = 464h, check VSTS bit | ||
108 | */ | ||
109 | |||
110 | snd_cs46xx_peekBA0(chip, BA0_ACSDA + offset); | ||
111 | |||
112 | tmp = snd_cs46xx_peekBA0(chip, BA0_ACCTL); | ||
113 | if ((tmp & ACCTL_VFRM) == 0) { | ||
114 | snd_printk(KERN_WARNING "cs46xx: ACCTL_VFRM not set 0x%x\n",tmp); | ||
115 | snd_cs46xx_pokeBA0(chip, BA0_ACCTL, (tmp & (~ACCTL_ESYN)) | ACCTL_VFRM ); | ||
116 | msleep(50); | ||
117 | tmp = snd_cs46xx_peekBA0(chip, BA0_ACCTL + offset); | ||
118 | snd_cs46xx_pokeBA0(chip, BA0_ACCTL, tmp | ACCTL_ESYN | ACCTL_VFRM ); | ||
119 | |||
120 | } | ||
121 | |||
122 | /* | ||
123 | * Setup the AC97 control registers on the CS461x to send the | ||
124 | * appropriate command to the AC97 to perform the read. | ||
125 | * ACCAD = Command Address Register = 46Ch | ||
126 | * ACCDA = Command Data Register = 470h | ||
127 | * ACCTL = Control Register = 460h | ||
128 | * set DCV - will clear when process completed | ||
129 | * set CRW - Read command | ||
130 | * set VFRM - valid frame enabled | ||
131 | * set ESYN - ASYNC generation enabled | ||
132 | * set RSTN - ARST# inactive, AC97 codec not reset | ||
133 | */ | ||
134 | |||
135 | snd_cs46xx_pokeBA0(chip, BA0_ACCAD, reg); | ||
136 | snd_cs46xx_pokeBA0(chip, BA0_ACCDA, 0); | ||
137 | if (codec_index == CS46XX_PRIMARY_CODEC_INDEX) { | ||
138 | snd_cs46xx_pokeBA0(chip, BA0_ACCTL,/* clear ACCTL_DCV */ ACCTL_CRW | | ||
139 | ACCTL_VFRM | ACCTL_ESYN | | ||
140 | ACCTL_RSTN); | ||
141 | snd_cs46xx_pokeBA0(chip, BA0_ACCTL, ACCTL_DCV | ACCTL_CRW | | ||
142 | ACCTL_VFRM | ACCTL_ESYN | | ||
143 | ACCTL_RSTN); | ||
144 | } else { | ||
145 | snd_cs46xx_pokeBA0(chip, BA0_ACCTL, ACCTL_DCV | ACCTL_TC | | ||
146 | ACCTL_CRW | ACCTL_VFRM | ACCTL_ESYN | | ||
147 | ACCTL_RSTN); | ||
148 | } | ||
149 | |||
150 | /* | ||
151 | * Wait for the read to occur. | ||
152 | */ | ||
153 | for (count = 0; count < 1000; count++) { | ||
154 | /* | ||
155 | * First, we want to wait for a short time. | ||
156 | */ | ||
157 | udelay(10); | ||
158 | /* | ||
159 | * Now, check to see if the read has completed. | ||
160 | * ACCTL = 460h, DCV should be reset by now and 460h = 17h | ||
161 | */ | ||
162 | if (!(snd_cs46xx_peekBA0(chip, BA0_ACCTL) & ACCTL_DCV)) | ||
163 | goto ok1; | ||
164 | } | ||
165 | |||
166 | snd_printk("AC'97 read problem (ACCTL_DCV), reg = 0x%x\n", reg); | ||
167 | result = 0xffff; | ||
168 | goto end; | ||
169 | |||
170 | ok1: | ||
171 | /* | ||
172 | * Wait for the valid status bit to go active. | ||
173 | */ | ||
174 | for (count = 0; count < 100; count++) { | ||
175 | /* | ||
176 | * Read the AC97 status register. | ||
177 | * ACSTS = Status Register = 464h | ||
178 | * VSTS - Valid Status | ||
179 | */ | ||
180 | if (snd_cs46xx_peekBA0(chip, BA0_ACSTS + offset) & ACSTS_VSTS) | ||
181 | goto ok2; | ||
182 | udelay(10); | ||
183 | } | ||
184 | |||
185 | snd_printk("AC'97 read problem (ACSTS_VSTS), codec_index %d, reg = 0x%x\n", codec_index, reg); | ||
186 | result = 0xffff; | ||
187 | goto end; | ||
188 | |||
189 | ok2: | ||
190 | /* | ||
191 | * Read the data returned from the AC97 register. | ||
192 | * ACSDA = Status Data Register = 474h | ||
193 | */ | ||
194 | #if 0 | ||
195 | printk("e) reg = 0x%x, val = 0x%x, BA0_ACCAD = 0x%x\n", reg, | ||
196 | snd_cs46xx_peekBA0(chip, BA0_ACSDA), | ||
197 | snd_cs46xx_peekBA0(chip, BA0_ACCAD)); | ||
198 | #endif | ||
199 | |||
200 | //snd_cs46xx_peekBA0(chip, BA0_ACCAD); | ||
201 | result = snd_cs46xx_peekBA0(chip, BA0_ACSDA + offset); | ||
202 | end: | ||
203 | chip->active_ctrl(chip, -1); | ||
204 | return result; | ||
205 | } | ||
206 | |||
207 | static unsigned short snd_cs46xx_ac97_read(ac97_t * ac97, | ||
208 | unsigned short reg) | ||
209 | { | ||
210 | cs46xx_t *chip = ac97->private_data; | ||
211 | unsigned short val; | ||
212 | int codec_index = ac97->num; | ||
213 | |||
214 | snd_assert(codec_index == CS46XX_PRIMARY_CODEC_INDEX || | ||
215 | codec_index == CS46XX_SECONDARY_CODEC_INDEX, | ||
216 | return 0xffff); | ||
217 | |||
218 | val = snd_cs46xx_codec_read(chip, reg, codec_index); | ||
219 | |||
220 | return val; | ||
221 | } | ||
222 | |||
223 | |||
224 | static void snd_cs46xx_codec_write(cs46xx_t *chip, | ||
225 | unsigned short reg, | ||
226 | unsigned short val, | ||
227 | int codec_index) | ||
228 | { | ||
229 | int count; | ||
230 | |||
231 | snd_assert ((codec_index == CS46XX_PRIMARY_CODEC_INDEX) || | ||
232 | (codec_index == CS46XX_SECONDARY_CODEC_INDEX), | ||
233 | return); | ||
234 | |||
235 | chip->active_ctrl(chip, 1); | ||
236 | |||
237 | /* | ||
238 | * 1. Write ACCAD = Command Address Register = 46Ch for AC97 register address | ||
239 | * 2. Write ACCDA = Command Data Register = 470h for data to write to AC97 | ||
240 | * 3. Write ACCTL = Control Register = 460h for initiating the write | ||
241 | * 4. Read ACCTL = 460h, DCV should be reset by now and 460h = 07h | ||
242 | * 5. if DCV not cleared, break and return error | ||
243 | */ | ||
244 | |||
245 | /* | ||
246 | * Setup the AC97 control registers on the CS461x to send the | ||
247 | * appropriate command to the AC97 to perform the read. | ||
248 | * ACCAD = Command Address Register = 46Ch | ||
249 | * ACCDA = Command Data Register = 470h | ||
250 | * ACCTL = Control Register = 460h | ||
251 | * set DCV - will clear when process completed | ||
252 | * reset CRW - Write command | ||
253 | * set VFRM - valid frame enabled | ||
254 | * set ESYN - ASYNC generation enabled | ||
255 | * set RSTN - ARST# inactive, AC97 codec not reset | ||
256 | */ | ||
257 | snd_cs46xx_pokeBA0(chip, BA0_ACCAD , reg); | ||
258 | snd_cs46xx_pokeBA0(chip, BA0_ACCDA , val); | ||
259 | snd_cs46xx_peekBA0(chip, BA0_ACCTL); | ||
260 | |||
261 | if (codec_index == CS46XX_PRIMARY_CODEC_INDEX) { | ||
262 | snd_cs46xx_pokeBA0(chip, BA0_ACCTL, /* clear ACCTL_DCV */ ACCTL_VFRM | | ||
263 | ACCTL_ESYN | ACCTL_RSTN); | ||
264 | snd_cs46xx_pokeBA0(chip, BA0_ACCTL, ACCTL_DCV | ACCTL_VFRM | | ||
265 | ACCTL_ESYN | ACCTL_RSTN); | ||
266 | } else { | ||
267 | snd_cs46xx_pokeBA0(chip, BA0_ACCTL, ACCTL_DCV | ACCTL_TC | | ||
268 | ACCTL_VFRM | ACCTL_ESYN | ACCTL_RSTN); | ||
269 | } | ||
270 | |||
271 | for (count = 0; count < 4000; count++) { | ||
272 | /* | ||
273 | * First, we want to wait for a short time. | ||
274 | */ | ||
275 | udelay(10); | ||
276 | /* | ||
277 | * Now, check to see if the write has completed. | ||
278 | * ACCTL = 460h, DCV should be reset by now and 460h = 07h | ||
279 | */ | ||
280 | if (!(snd_cs46xx_peekBA0(chip, BA0_ACCTL) & ACCTL_DCV)) { | ||
281 | goto end; | ||
282 | } | ||
283 | } | ||
284 | snd_printk("AC'97 write problem, codec_index = %d, reg = 0x%x, val = 0x%x\n", codec_index, reg, val); | ||
285 | end: | ||
286 | chip->active_ctrl(chip, -1); | ||
287 | } | ||
288 | |||
289 | static void snd_cs46xx_ac97_write(ac97_t *ac97, | ||
290 | unsigned short reg, | ||
291 | unsigned short val) | ||
292 | { | ||
293 | cs46xx_t *chip = ac97->private_data; | ||
294 | int codec_index = ac97->num; | ||
295 | |||
296 | snd_assert(codec_index == CS46XX_PRIMARY_CODEC_INDEX || | ||
297 | codec_index == CS46XX_SECONDARY_CODEC_INDEX, | ||
298 | return); | ||
299 | |||
300 | snd_cs46xx_codec_write(chip, reg, val, codec_index); | ||
301 | } | ||
302 | |||
303 | |||
304 | /* | ||
305 | * Chip initialization | ||
306 | */ | ||
307 | |||
308 | int snd_cs46xx_download(cs46xx_t *chip, | ||
309 | u32 *src, | ||
310 | unsigned long offset, | ||
311 | unsigned long len) | ||
312 | { | ||
313 | void __iomem *dst; | ||
314 | unsigned int bank = offset >> 16; | ||
315 | offset = offset & 0xffff; | ||
316 | |||
317 | snd_assert(!(offset & 3) && !(len & 3), return -EINVAL); | ||
318 | dst = chip->region.idx[bank+1].remap_addr + offset; | ||
319 | len /= sizeof(u32); | ||
320 | |||
321 | /* writel already converts 32-bit value to right endianess */ | ||
322 | while (len-- > 0) { | ||
323 | writel(*src++, dst); | ||
324 | dst += sizeof(u32); | ||
325 | } | ||
326 | return 0; | ||
327 | } | ||
328 | |||
329 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
330 | |||
331 | #include "imgs/cwc4630.h" | ||
332 | #include "imgs/cwcasync.h" | ||
333 | #include "imgs/cwcsnoop.h" | ||
334 | #include "imgs/cwcbinhack.h" | ||
335 | #include "imgs/cwcdma.h" | ||
336 | |||
337 | int snd_cs46xx_clear_BA1(cs46xx_t *chip, | ||
338 | unsigned long offset, | ||
339 | unsigned long len) | ||
340 | { | ||
341 | void __iomem *dst; | ||
342 | unsigned int bank = offset >> 16; | ||
343 | offset = offset & 0xffff; | ||
344 | |||
345 | snd_assert(!(offset & 3) && !(len & 3), return -EINVAL); | ||
346 | dst = chip->region.idx[bank+1].remap_addr + offset; | ||
347 | len /= sizeof(u32); | ||
348 | |||
349 | /* writel already converts 32-bit value to right endianess */ | ||
350 | while (len-- > 0) { | ||
351 | writel(0, dst); | ||
352 | dst += sizeof(u32); | ||
353 | } | ||
354 | return 0; | ||
355 | } | ||
356 | |||
357 | #else /* old DSP image */ | ||
358 | |||
359 | #include "cs46xx_image.h" | ||
360 | |||
361 | int snd_cs46xx_download_image(cs46xx_t *chip) | ||
362 | { | ||
363 | int idx, err; | ||
364 | unsigned long offset = 0; | ||
365 | |||
366 | for (idx = 0; idx < BA1_MEMORY_COUNT; idx++) { | ||
367 | if ((err = snd_cs46xx_download(chip, | ||
368 | &BA1Struct.map[offset], | ||
369 | BA1Struct.memory[idx].offset, | ||
370 | BA1Struct.memory[idx].size)) < 0) | ||
371 | return err; | ||
372 | offset += BA1Struct.memory[idx].size >> 2; | ||
373 | } | ||
374 | return 0; | ||
375 | } | ||
376 | #endif /* CONFIG_SND_CS46XX_NEW_DSP */ | ||
377 | |||
378 | /* | ||
379 | * Chip reset | ||
380 | */ | ||
381 | |||
382 | static void snd_cs46xx_reset(cs46xx_t *chip) | ||
383 | { | ||
384 | int idx; | ||
385 | |||
386 | /* | ||
387 | * Write the reset bit of the SP control register. | ||
388 | */ | ||
389 | snd_cs46xx_poke(chip, BA1_SPCR, SPCR_RSTSP); | ||
390 | |||
391 | /* | ||
392 | * Write the control register. | ||
393 | */ | ||
394 | snd_cs46xx_poke(chip, BA1_SPCR, SPCR_DRQEN); | ||
395 | |||
396 | /* | ||
397 | * Clear the trap registers. | ||
398 | */ | ||
399 | for (idx = 0; idx < 8; idx++) { | ||
400 | snd_cs46xx_poke(chip, BA1_DREG, DREG_REGID_TRAP_SELECT + idx); | ||
401 | snd_cs46xx_poke(chip, BA1_TWPR, 0xFFFF); | ||
402 | } | ||
403 | snd_cs46xx_poke(chip, BA1_DREG, 0); | ||
404 | |||
405 | /* | ||
406 | * Set the frame timer to reflect the number of cycles per frame. | ||
407 | */ | ||
408 | snd_cs46xx_poke(chip, BA1_FRMT, 0xadf); | ||
409 | } | ||
410 | |||
411 | static int cs46xx_wait_for_fifo(cs46xx_t * chip,int retry_timeout) | ||
412 | { | ||
413 | u32 i, status = 0; | ||
414 | /* | ||
415 | * Make sure the previous FIFO write operation has completed. | ||
416 | */ | ||
417 | for(i = 0; i < 50; i++){ | ||
418 | status = snd_cs46xx_peekBA0(chip, BA0_SERBST); | ||
419 | |||
420 | if( !(status & SERBST_WBSY) ) | ||
421 | break; | ||
422 | |||
423 | mdelay(retry_timeout); | ||
424 | } | ||
425 | |||
426 | if(status & SERBST_WBSY) { | ||
427 | snd_printk( KERN_ERR "cs46xx: failure waiting for FIFO command to complete\n"); | ||
428 | |||
429 | return -EINVAL; | ||
430 | } | ||
431 | |||
432 | return 0; | ||
433 | } | ||
434 | |||
435 | static void snd_cs46xx_clear_serial_FIFOs(cs46xx_t *chip) | ||
436 | { | ||
437 | int idx, powerdown = 0; | ||
438 | unsigned int tmp; | ||
439 | |||
440 | /* | ||
441 | * See if the devices are powered down. If so, we must power them up first | ||
442 | * or they will not respond. | ||
443 | */ | ||
444 | tmp = snd_cs46xx_peekBA0(chip, BA0_CLKCR1); | ||
445 | if (!(tmp & CLKCR1_SWCE)) { | ||
446 | snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, tmp | CLKCR1_SWCE); | ||
447 | powerdown = 1; | ||
448 | } | ||
449 | |||
450 | /* | ||
451 | * We want to clear out the serial port FIFOs so we don't end up playing | ||
452 | * whatever random garbage happens to be in them. We fill the sample FIFOS | ||
453 | * with zero (silence). | ||
454 | */ | ||
455 | snd_cs46xx_pokeBA0(chip, BA0_SERBWP, 0); | ||
456 | |||
457 | /* | ||
458 | * Fill all 256 sample FIFO locations. | ||
459 | */ | ||
460 | for (idx = 0; idx < 0xFF; idx++) { | ||
461 | /* | ||
462 | * Make sure the previous FIFO write operation has completed. | ||
463 | */ | ||
464 | if (cs46xx_wait_for_fifo(chip,1)) { | ||
465 | snd_printdd ("failed waiting for FIFO at addr (%02X)\n",idx); | ||
466 | |||
467 | if (powerdown) | ||
468 | snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, tmp); | ||
469 | |||
470 | break; | ||
471 | } | ||
472 | /* | ||
473 | * Write the serial port FIFO index. | ||
474 | */ | ||
475 | snd_cs46xx_pokeBA0(chip, BA0_SERBAD, idx); | ||
476 | /* | ||
477 | * Tell the serial port to load the new value into the FIFO location. | ||
478 | */ | ||
479 | snd_cs46xx_pokeBA0(chip, BA0_SERBCM, SERBCM_WRC); | ||
480 | } | ||
481 | /* | ||
482 | * Now, if we powered up the devices, then power them back down again. | ||
483 | * This is kinda ugly, but should never happen. | ||
484 | */ | ||
485 | if (powerdown) | ||
486 | snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, tmp); | ||
487 | } | ||
488 | |||
489 | static void snd_cs46xx_proc_start(cs46xx_t *chip) | ||
490 | { | ||
491 | int cnt; | ||
492 | |||
493 | /* | ||
494 | * Set the frame timer to reflect the number of cycles per frame. | ||
495 | */ | ||
496 | snd_cs46xx_poke(chip, BA1_FRMT, 0xadf); | ||
497 | /* | ||
498 | * Turn on the run, run at frame, and DMA enable bits in the local copy of | ||
499 | * the SP control register. | ||
500 | */ | ||
501 | snd_cs46xx_poke(chip, BA1_SPCR, SPCR_RUN | SPCR_RUNFR | SPCR_DRQEN); | ||
502 | /* | ||
503 | * Wait until the run at frame bit resets itself in the SP control | ||
504 | * register. | ||
505 | */ | ||
506 | for (cnt = 0; cnt < 25; cnt++) { | ||
507 | udelay(50); | ||
508 | if (!(snd_cs46xx_peek(chip, BA1_SPCR) & SPCR_RUNFR)) | ||
509 | break; | ||
510 | } | ||
511 | |||
512 | if (snd_cs46xx_peek(chip, BA1_SPCR) & SPCR_RUNFR) | ||
513 | snd_printk("SPCR_RUNFR never reset\n"); | ||
514 | } | ||
515 | |||
516 | static void snd_cs46xx_proc_stop(cs46xx_t *chip) | ||
517 | { | ||
518 | /* | ||
519 | * Turn off the run, run at frame, and DMA enable bits in the local copy of | ||
520 | * the SP control register. | ||
521 | */ | ||
522 | snd_cs46xx_poke(chip, BA1_SPCR, 0); | ||
523 | } | ||
524 | |||
525 | /* | ||
526 | * Sample rate routines | ||
527 | */ | ||
528 | |||
529 | #define GOF_PER_SEC 200 | ||
530 | |||
531 | static void snd_cs46xx_set_play_sample_rate(cs46xx_t *chip, unsigned int rate) | ||
532 | { | ||
533 | unsigned long flags; | ||
534 | unsigned int tmp1, tmp2; | ||
535 | unsigned int phiIncr; | ||
536 | unsigned int correctionPerGOF, correctionPerSec; | ||
537 | |||
538 | /* | ||
539 | * Compute the values used to drive the actual sample rate conversion. | ||
540 | * The following formulas are being computed, using inline assembly | ||
541 | * since we need to use 64 bit arithmetic to compute the values: | ||
542 | * | ||
543 | * phiIncr = floor((Fs,in * 2^26) / Fs,out) | ||
544 | * correctionPerGOF = floor((Fs,in * 2^26 - Fs,out * phiIncr) / | ||
545 | * GOF_PER_SEC) | ||
546 | * ulCorrectionPerSec = Fs,in * 2^26 - Fs,out * phiIncr -M | ||
547 | * GOF_PER_SEC * correctionPerGOF | ||
548 | * | ||
549 | * i.e. | ||
550 | * | ||
551 | * phiIncr:other = dividend:remainder((Fs,in * 2^26) / Fs,out) | ||
552 | * correctionPerGOF:correctionPerSec = | ||
553 | * dividend:remainder(ulOther / GOF_PER_SEC) | ||
554 | */ | ||
555 | tmp1 = rate << 16; | ||
556 | phiIncr = tmp1 / 48000; | ||
557 | tmp1 -= phiIncr * 48000; | ||
558 | tmp1 <<= 10; | ||
559 | phiIncr <<= 10; | ||
560 | tmp2 = tmp1 / 48000; | ||
561 | phiIncr += tmp2; | ||
562 | tmp1 -= tmp2 * 48000; | ||
563 | correctionPerGOF = tmp1 / GOF_PER_SEC; | ||
564 | tmp1 -= correctionPerGOF * GOF_PER_SEC; | ||
565 | correctionPerSec = tmp1; | ||
566 | |||
567 | /* | ||
568 | * Fill in the SampleRateConverter control block. | ||
569 | */ | ||
570 | spin_lock_irqsave(&chip->reg_lock, flags); | ||
571 | snd_cs46xx_poke(chip, BA1_PSRC, | ||
572 | ((correctionPerSec << 16) & 0xFFFF0000) | (correctionPerGOF & 0xFFFF)); | ||
573 | snd_cs46xx_poke(chip, BA1_PPI, phiIncr); | ||
574 | spin_unlock_irqrestore(&chip->reg_lock, flags); | ||
575 | } | ||
576 | |||
577 | static void snd_cs46xx_set_capture_sample_rate(cs46xx_t *chip, unsigned int rate) | ||
578 | { | ||
579 | unsigned long flags; | ||
580 | unsigned int phiIncr, coeffIncr, tmp1, tmp2; | ||
581 | unsigned int correctionPerGOF, correctionPerSec, initialDelay; | ||
582 | unsigned int frameGroupLength, cnt; | ||
583 | |||
584 | /* | ||
585 | * We can only decimate by up to a factor of 1/9th the hardware rate. | ||
586 | * Correct the value if an attempt is made to stray outside that limit. | ||
587 | */ | ||
588 | if ((rate * 9) < 48000) | ||
589 | rate = 48000 / 9; | ||
590 | |||
591 | /* | ||
592 | * We can not capture at at rate greater than the Input Rate (48000). | ||
593 | * Return an error if an attempt is made to stray outside that limit. | ||
594 | */ | ||
595 | if (rate > 48000) | ||
596 | rate = 48000; | ||
597 | |||
598 | /* | ||
599 | * Compute the values used to drive the actual sample rate conversion. | ||
600 | * The following formulas are being computed, using inline assembly | ||
601 | * since we need to use 64 bit arithmetic to compute the values: | ||
602 | * | ||
603 | * coeffIncr = -floor((Fs,out * 2^23) / Fs,in) | ||
604 | * phiIncr = floor((Fs,in * 2^26) / Fs,out) | ||
605 | * correctionPerGOF = floor((Fs,in * 2^26 - Fs,out * phiIncr) / | ||
606 | * GOF_PER_SEC) | ||
607 | * correctionPerSec = Fs,in * 2^26 - Fs,out * phiIncr - | ||
608 | * GOF_PER_SEC * correctionPerGOF | ||
609 | * initialDelay = ceil((24 * Fs,in) / Fs,out) | ||
610 | * | ||
611 | * i.e. | ||
612 | * | ||
613 | * coeffIncr = neg(dividend((Fs,out * 2^23) / Fs,in)) | ||
614 | * phiIncr:ulOther = dividend:remainder((Fs,in * 2^26) / Fs,out) | ||
615 | * correctionPerGOF:correctionPerSec = | ||
616 | * dividend:remainder(ulOther / GOF_PER_SEC) | ||
617 | * initialDelay = dividend(((24 * Fs,in) + Fs,out - 1) / Fs,out) | ||
618 | */ | ||
619 | |||
620 | tmp1 = rate << 16; | ||
621 | coeffIncr = tmp1 / 48000; | ||
622 | tmp1 -= coeffIncr * 48000; | ||
623 | tmp1 <<= 7; | ||
624 | coeffIncr <<= 7; | ||
625 | coeffIncr += tmp1 / 48000; | ||
626 | coeffIncr ^= 0xFFFFFFFF; | ||
627 | coeffIncr++; | ||
628 | tmp1 = 48000 << 16; | ||
629 | phiIncr = tmp1 / rate; | ||
630 | tmp1 -= phiIncr * rate; | ||
631 | tmp1 <<= 10; | ||
632 | phiIncr <<= 10; | ||
633 | tmp2 = tmp1 / rate; | ||
634 | phiIncr += tmp2; | ||
635 | tmp1 -= tmp2 * rate; | ||
636 | correctionPerGOF = tmp1 / GOF_PER_SEC; | ||
637 | tmp1 -= correctionPerGOF * GOF_PER_SEC; | ||
638 | correctionPerSec = tmp1; | ||
639 | initialDelay = ((48000 * 24) + rate - 1) / rate; | ||
640 | |||
641 | /* | ||
642 | * Fill in the VariDecimate control block. | ||
643 | */ | ||
644 | spin_lock_irqsave(&chip->reg_lock, flags); | ||
645 | snd_cs46xx_poke(chip, BA1_CSRC, | ||
646 | ((correctionPerSec << 16) & 0xFFFF0000) | (correctionPerGOF & 0xFFFF)); | ||
647 | snd_cs46xx_poke(chip, BA1_CCI, coeffIncr); | ||
648 | snd_cs46xx_poke(chip, BA1_CD, | ||
649 | (((BA1_VARIDEC_BUF_1 + (initialDelay << 2)) << 16) & 0xFFFF0000) | 0x80); | ||
650 | snd_cs46xx_poke(chip, BA1_CPI, phiIncr); | ||
651 | spin_unlock_irqrestore(&chip->reg_lock, flags); | ||
652 | |||
653 | /* | ||
654 | * Figure out the frame group length for the write back task. Basically, | ||
655 | * this is just the factors of 24000 (2^6*3*5^3) that are not present in | ||
656 | * the output sample rate. | ||
657 | */ | ||
658 | frameGroupLength = 1; | ||
659 | for (cnt = 2; cnt <= 64; cnt *= 2) { | ||
660 | if (((rate / cnt) * cnt) != rate) | ||
661 | frameGroupLength *= 2; | ||
662 | } | ||
663 | if (((rate / 3) * 3) != rate) { | ||
664 | frameGroupLength *= 3; | ||
665 | } | ||
666 | for (cnt = 5; cnt <= 125; cnt *= 5) { | ||
667 | if (((rate / cnt) * cnt) != rate) | ||
668 | frameGroupLength *= 5; | ||
669 | } | ||
670 | |||
671 | /* | ||
672 | * Fill in the WriteBack control block. | ||
673 | */ | ||
674 | spin_lock_irqsave(&chip->reg_lock, flags); | ||
675 | snd_cs46xx_poke(chip, BA1_CFG1, frameGroupLength); | ||
676 | snd_cs46xx_poke(chip, BA1_CFG2, (0x00800000 | frameGroupLength)); | ||
677 | snd_cs46xx_poke(chip, BA1_CCST, 0x0000FFFF); | ||
678 | snd_cs46xx_poke(chip, BA1_CSPB, ((65536 * rate) / 24000)); | ||
679 | snd_cs46xx_poke(chip, (BA1_CSPB + 4), 0x0000FFFF); | ||
680 | spin_unlock_irqrestore(&chip->reg_lock, flags); | ||
681 | } | ||
682 | |||
683 | /* | ||
684 | * PCM part | ||
685 | */ | ||
686 | |||
687 | static void snd_cs46xx_pb_trans_copy(snd_pcm_substream_t *substream, | ||
688 | snd_pcm_indirect_t *rec, size_t bytes) | ||
689 | { | ||
690 | snd_pcm_runtime_t *runtime = substream->runtime; | ||
691 | cs46xx_pcm_t * cpcm = runtime->private_data; | ||
692 | memcpy(cpcm->hw_buf.area + rec->hw_data, runtime->dma_area + rec->sw_data, bytes); | ||
693 | } | ||
694 | |||
695 | static int snd_cs46xx_playback_transfer(snd_pcm_substream_t *substream) | ||
696 | { | ||
697 | snd_pcm_runtime_t *runtime = substream->runtime; | ||
698 | cs46xx_pcm_t * cpcm = runtime->private_data; | ||
699 | snd_pcm_indirect_playback_transfer(substream, &cpcm->pcm_rec, snd_cs46xx_pb_trans_copy); | ||
700 | return 0; | ||
701 | } | ||
702 | |||
703 | static void snd_cs46xx_cp_trans_copy(snd_pcm_substream_t *substream, | ||
704 | snd_pcm_indirect_t *rec, size_t bytes) | ||
705 | { | ||
706 | cs46xx_t *chip = snd_pcm_substream_chip(substream); | ||
707 | snd_pcm_runtime_t *runtime = substream->runtime; | ||
708 | memcpy(runtime->dma_area + rec->sw_data, | ||
709 | chip->capt.hw_buf.area + rec->hw_data, bytes); | ||
710 | } | ||
711 | |||
712 | static int snd_cs46xx_capture_transfer(snd_pcm_substream_t *substream) | ||
713 | { | ||
714 | cs46xx_t *chip = snd_pcm_substream_chip(substream); | ||
715 | snd_pcm_indirect_capture_transfer(substream, &chip->capt.pcm_rec, snd_cs46xx_cp_trans_copy); | ||
716 | return 0; | ||
717 | } | ||
718 | |||
719 | static snd_pcm_uframes_t snd_cs46xx_playback_direct_pointer(snd_pcm_substream_t * substream) | ||
720 | { | ||
721 | cs46xx_t *chip = snd_pcm_substream_chip(substream); | ||
722 | size_t ptr; | ||
723 | cs46xx_pcm_t *cpcm = substream->runtime->private_data; | ||
724 | snd_assert (cpcm->pcm_channel,return -ENXIO); | ||
725 | |||
726 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
727 | ptr = snd_cs46xx_peek(chip, (cpcm->pcm_channel->pcm_reader_scb->address + 2) << 2); | ||
728 | #else | ||
729 | ptr = snd_cs46xx_peek(chip, BA1_PBA); | ||
730 | #endif | ||
731 | ptr -= cpcm->hw_buf.addr; | ||
732 | return ptr >> cpcm->shift; | ||
733 | } | ||
734 | |||
735 | static snd_pcm_uframes_t snd_cs46xx_playback_indirect_pointer(snd_pcm_substream_t * substream) | ||
736 | { | ||
737 | cs46xx_t *chip = snd_pcm_substream_chip(substream); | ||
738 | size_t ptr; | ||
739 | cs46xx_pcm_t *cpcm = substream->runtime->private_data; | ||
740 | |||
741 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
742 | snd_assert (cpcm->pcm_channel,return -ENXIO); | ||
743 | ptr = snd_cs46xx_peek(chip, (cpcm->pcm_channel->pcm_reader_scb->address + 2) << 2); | ||
744 | #else | ||
745 | ptr = snd_cs46xx_peek(chip, BA1_PBA); | ||
746 | #endif | ||
747 | ptr -= cpcm->hw_buf.addr; | ||
748 | return snd_pcm_indirect_playback_pointer(substream, &cpcm->pcm_rec, ptr); | ||
749 | } | ||
750 | |||
751 | static snd_pcm_uframes_t snd_cs46xx_capture_direct_pointer(snd_pcm_substream_t * substream) | ||
752 | { | ||
753 | cs46xx_t *chip = snd_pcm_substream_chip(substream); | ||
754 | size_t ptr = snd_cs46xx_peek(chip, BA1_CBA) - chip->capt.hw_buf.addr; | ||
755 | return ptr >> chip->capt.shift; | ||
756 | } | ||
757 | |||
758 | static snd_pcm_uframes_t snd_cs46xx_capture_indirect_pointer(snd_pcm_substream_t * substream) | ||
759 | { | ||
760 | cs46xx_t *chip = snd_pcm_substream_chip(substream); | ||
761 | size_t ptr = snd_cs46xx_peek(chip, BA1_CBA) - chip->capt.hw_buf.addr; | ||
762 | return snd_pcm_indirect_capture_pointer(substream, &chip->capt.pcm_rec, ptr); | ||
763 | } | ||
764 | |||
765 | static int snd_cs46xx_playback_trigger(snd_pcm_substream_t * substream, | ||
766 | int cmd) | ||
767 | { | ||
768 | cs46xx_t *chip = snd_pcm_substream_chip(substream); | ||
769 | /*snd_pcm_runtime_t *runtime = substream->runtime;*/ | ||
770 | int result = 0; | ||
771 | |||
772 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
773 | cs46xx_pcm_t *cpcm = substream->runtime->private_data; | ||
774 | if (! cpcm->pcm_channel) { | ||
775 | return -ENXIO; | ||
776 | } | ||
777 | #endif | ||
778 | switch (cmd) { | ||
779 | case SNDRV_PCM_TRIGGER_START: | ||
780 | case SNDRV_PCM_TRIGGER_RESUME: | ||
781 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
782 | /* magic value to unmute PCM stream playback volume */ | ||
783 | snd_cs46xx_poke(chip, (cpcm->pcm_channel->pcm_reader_scb->address + | ||
784 | SCBVolumeCtrl) << 2, 0x80008000); | ||
785 | |||
786 | if (cpcm->pcm_channel->unlinked) | ||
787 | cs46xx_dsp_pcm_link(chip,cpcm->pcm_channel); | ||
788 | |||
789 | if (substream->runtime->periods != CS46XX_FRAGS) | ||
790 | snd_cs46xx_playback_transfer(substream); | ||
791 | #else | ||
792 | spin_lock(&chip->reg_lock); | ||
793 | if (substream->runtime->periods != CS46XX_FRAGS) | ||
794 | snd_cs46xx_playback_transfer(substream); | ||
795 | { unsigned int tmp; | ||
796 | tmp = snd_cs46xx_peek(chip, BA1_PCTL); | ||
797 | tmp &= 0x0000ffff; | ||
798 | snd_cs46xx_poke(chip, BA1_PCTL, chip->play_ctl | tmp); | ||
799 | } | ||
800 | spin_unlock(&chip->reg_lock); | ||
801 | #endif | ||
802 | break; | ||
803 | case SNDRV_PCM_TRIGGER_STOP: | ||
804 | case SNDRV_PCM_TRIGGER_SUSPEND: | ||
805 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
806 | /* magic mute channel */ | ||
807 | snd_cs46xx_poke(chip, (cpcm->pcm_channel->pcm_reader_scb->address + | ||
808 | SCBVolumeCtrl) << 2, 0xffffffff); | ||
809 | |||
810 | if (!cpcm->pcm_channel->unlinked) | ||
811 | cs46xx_dsp_pcm_unlink(chip,cpcm->pcm_channel); | ||
812 | #else | ||
813 | spin_lock(&chip->reg_lock); | ||
814 | { unsigned int tmp; | ||
815 | tmp = snd_cs46xx_peek(chip, BA1_PCTL); | ||
816 | tmp &= 0x0000ffff; | ||
817 | snd_cs46xx_poke(chip, BA1_PCTL, tmp); | ||
818 | } | ||
819 | spin_unlock(&chip->reg_lock); | ||
820 | #endif | ||
821 | break; | ||
822 | default: | ||
823 | result = -EINVAL; | ||
824 | break; | ||
825 | } | ||
826 | |||
827 | return result; | ||
828 | } | ||
829 | |||
830 | static int snd_cs46xx_capture_trigger(snd_pcm_substream_t * substream, | ||
831 | int cmd) | ||
832 | { | ||
833 | cs46xx_t *chip = snd_pcm_substream_chip(substream); | ||
834 | unsigned int tmp; | ||
835 | int result = 0; | ||
836 | |||
837 | spin_lock(&chip->reg_lock); | ||
838 | switch (cmd) { | ||
839 | case SNDRV_PCM_TRIGGER_START: | ||
840 | case SNDRV_PCM_TRIGGER_RESUME: | ||
841 | tmp = snd_cs46xx_peek(chip, BA1_CCTL); | ||
842 | tmp &= 0xffff0000; | ||
843 | snd_cs46xx_poke(chip, BA1_CCTL, chip->capt.ctl | tmp); | ||
844 | break; | ||
845 | case SNDRV_PCM_TRIGGER_STOP: | ||
846 | case SNDRV_PCM_TRIGGER_SUSPEND: | ||
847 | tmp = snd_cs46xx_peek(chip, BA1_CCTL); | ||
848 | tmp &= 0xffff0000; | ||
849 | snd_cs46xx_poke(chip, BA1_CCTL, tmp); | ||
850 | break; | ||
851 | default: | ||
852 | result = -EINVAL; | ||
853 | break; | ||
854 | } | ||
855 | spin_unlock(&chip->reg_lock); | ||
856 | |||
857 | return result; | ||
858 | } | ||
859 | |||
860 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
861 | static int _cs46xx_adjust_sample_rate (cs46xx_t *chip, cs46xx_pcm_t *cpcm, | ||
862 | int sample_rate) | ||
863 | { | ||
864 | |||
865 | /* If PCMReaderSCB and SrcTaskSCB not created yet ... */ | ||
866 | if ( cpcm->pcm_channel == NULL) { | ||
867 | cpcm->pcm_channel = cs46xx_dsp_create_pcm_channel (chip, sample_rate, | ||
868 | cpcm, cpcm->hw_buf.addr,cpcm->pcm_channel_id); | ||
869 | if (cpcm->pcm_channel == NULL) { | ||
870 | snd_printk(KERN_ERR "cs46xx: failed to create virtual PCM channel\n"); | ||
871 | return -ENOMEM; | ||
872 | } | ||
873 | cpcm->pcm_channel->sample_rate = sample_rate; | ||
874 | } else | ||
875 | /* if sample rate is changed */ | ||
876 | if ((int)cpcm->pcm_channel->sample_rate != sample_rate) { | ||
877 | int unlinked = cpcm->pcm_channel->unlinked; | ||
878 | cs46xx_dsp_destroy_pcm_channel (chip,cpcm->pcm_channel); | ||
879 | |||
880 | if ( (cpcm->pcm_channel = cs46xx_dsp_create_pcm_channel (chip, sample_rate, cpcm, | ||
881 | cpcm->hw_buf.addr, | ||
882 | cpcm->pcm_channel_id)) == NULL) { | ||
883 | snd_printk(KERN_ERR "cs46xx: failed to re-create virtual PCM channel\n"); | ||
884 | return -ENOMEM; | ||
885 | } | ||
886 | |||
887 | if (!unlinked) cs46xx_dsp_pcm_link (chip,cpcm->pcm_channel); | ||
888 | cpcm->pcm_channel->sample_rate = sample_rate; | ||
889 | } | ||
890 | |||
891 | return 0; | ||
892 | } | ||
893 | #endif | ||
894 | |||
895 | |||
896 | static int snd_cs46xx_playback_hw_params(snd_pcm_substream_t * substream, | ||
897 | snd_pcm_hw_params_t * hw_params) | ||
898 | { | ||
899 | snd_pcm_runtime_t *runtime = substream->runtime; | ||
900 | cs46xx_pcm_t *cpcm; | ||
901 | int err; | ||
902 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
903 | cs46xx_t *chip = snd_pcm_substream_chip(substream); | ||
904 | int sample_rate = params_rate(hw_params); | ||
905 | int period_size = params_period_bytes(hw_params); | ||
906 | #endif | ||
907 | cpcm = runtime->private_data; | ||
908 | |||
909 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
910 | snd_assert (sample_rate != 0, return -ENXIO); | ||
911 | |||
912 | down (&chip->spos_mutex); | ||
913 | |||
914 | if (_cs46xx_adjust_sample_rate (chip,cpcm,sample_rate)) { | ||
915 | up (&chip->spos_mutex); | ||
916 | return -ENXIO; | ||
917 | } | ||
918 | |||
919 | snd_assert (cpcm->pcm_channel != NULL); | ||
920 | if (!cpcm->pcm_channel) { | ||
921 | up (&chip->spos_mutex); | ||
922 | return -ENXIO; | ||
923 | } | ||
924 | |||
925 | |||
926 | if (cs46xx_dsp_pcm_channel_set_period (chip,cpcm->pcm_channel,period_size)) { | ||
927 | up (&chip->spos_mutex); | ||
928 | return -EINVAL; | ||
929 | } | ||
930 | |||
931 | snd_printdd ("period_size (%d), periods (%d) buffer_size(%d)\n", | ||
932 | period_size, params_periods(hw_params), | ||
933 | params_buffer_bytes(hw_params)); | ||
934 | #endif | ||
935 | |||
936 | if (params_periods(hw_params) == CS46XX_FRAGS) { | ||
937 | if (runtime->dma_area != cpcm->hw_buf.area) | ||
938 | snd_pcm_lib_free_pages(substream); | ||
939 | runtime->dma_area = cpcm->hw_buf.area; | ||
940 | runtime->dma_addr = cpcm->hw_buf.addr; | ||
941 | runtime->dma_bytes = cpcm->hw_buf.bytes; | ||
942 | |||
943 | |||
944 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
945 | if (cpcm->pcm_channel_id == DSP_PCM_MAIN_CHANNEL) { | ||
946 | substream->ops = &snd_cs46xx_playback_ops; | ||
947 | } else if (cpcm->pcm_channel_id == DSP_PCM_REAR_CHANNEL) { | ||
948 | substream->ops = &snd_cs46xx_playback_rear_ops; | ||
949 | } else if (cpcm->pcm_channel_id == DSP_PCM_CENTER_LFE_CHANNEL) { | ||
950 | substream->ops = &snd_cs46xx_playback_clfe_ops; | ||
951 | } else if (cpcm->pcm_channel_id == DSP_IEC958_CHANNEL) { | ||
952 | substream->ops = &snd_cs46xx_playback_iec958_ops; | ||
953 | } else { | ||
954 | snd_assert(0); | ||
955 | } | ||
956 | #else | ||
957 | substream->ops = &snd_cs46xx_playback_ops; | ||
958 | #endif | ||
959 | |||
960 | } else { | ||
961 | if (runtime->dma_area == cpcm->hw_buf.area) { | ||
962 | runtime->dma_area = NULL; | ||
963 | runtime->dma_addr = 0; | ||
964 | runtime->dma_bytes = 0; | ||
965 | } | ||
966 | if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0) { | ||
967 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
968 | up (&chip->spos_mutex); | ||
969 | #endif | ||
970 | return err; | ||
971 | } | ||
972 | |||
973 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
974 | if (cpcm->pcm_channel_id == DSP_PCM_MAIN_CHANNEL) { | ||
975 | substream->ops = &snd_cs46xx_playback_indirect_ops; | ||
976 | } else if (cpcm->pcm_channel_id == DSP_PCM_REAR_CHANNEL) { | ||
977 | substream->ops = &snd_cs46xx_playback_indirect_rear_ops; | ||
978 | } else if (cpcm->pcm_channel_id == DSP_PCM_CENTER_LFE_CHANNEL) { | ||
979 | substream->ops = &snd_cs46xx_playback_indirect_clfe_ops; | ||
980 | } else if (cpcm->pcm_channel_id == DSP_IEC958_CHANNEL) { | ||
981 | substream->ops = &snd_cs46xx_playback_indirect_iec958_ops; | ||
982 | } else { | ||
983 | snd_assert(0); | ||
984 | } | ||
985 | #else | ||
986 | substream->ops = &snd_cs46xx_playback_indirect_ops; | ||
987 | #endif | ||
988 | |||
989 | } | ||
990 | |||
991 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
992 | up (&chip->spos_mutex); | ||
993 | #endif | ||
994 | |||
995 | return 0; | ||
996 | } | ||
997 | |||
998 | static int snd_cs46xx_playback_hw_free(snd_pcm_substream_t * substream) | ||
999 | { | ||
1000 | /*cs46xx_t *chip = snd_pcm_substream_chip(substream);*/ | ||
1001 | snd_pcm_runtime_t *runtime = substream->runtime; | ||
1002 | cs46xx_pcm_t *cpcm; | ||
1003 | |||
1004 | cpcm = runtime->private_data; | ||
1005 | |||
1006 | /* if play_back open fails, then this function | ||
1007 | is called and cpcm can actually be NULL here */ | ||
1008 | if (!cpcm) return -ENXIO; | ||
1009 | |||
1010 | if (runtime->dma_area != cpcm->hw_buf.area) | ||
1011 | snd_pcm_lib_free_pages(substream); | ||
1012 | |||
1013 | runtime->dma_area = NULL; | ||
1014 | runtime->dma_addr = 0; | ||
1015 | runtime->dma_bytes = 0; | ||
1016 | |||
1017 | return 0; | ||
1018 | } | ||
1019 | |||
1020 | static int snd_cs46xx_playback_prepare(snd_pcm_substream_t * substream) | ||
1021 | { | ||
1022 | unsigned int tmp; | ||
1023 | unsigned int pfie; | ||
1024 | cs46xx_t *chip = snd_pcm_substream_chip(substream); | ||
1025 | snd_pcm_runtime_t *runtime = substream->runtime; | ||
1026 | cs46xx_pcm_t *cpcm; | ||
1027 | |||
1028 | cpcm = runtime->private_data; | ||
1029 | |||
1030 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
1031 | snd_assert (cpcm->pcm_channel != NULL, return -ENXIO); | ||
1032 | |||
1033 | pfie = snd_cs46xx_peek(chip, (cpcm->pcm_channel->pcm_reader_scb->address + 1) << 2 ); | ||
1034 | pfie &= ~0x0000f03f; | ||
1035 | #else | ||
1036 | /* old dsp */ | ||
1037 | pfie = snd_cs46xx_peek(chip, BA1_PFIE); | ||
1038 | pfie &= ~0x0000f03f; | ||
1039 | #endif | ||
1040 | |||
1041 | cpcm->shift = 2; | ||
1042 | /* if to convert from stereo to mono */ | ||
1043 | if (runtime->channels == 1) { | ||
1044 | cpcm->shift--; | ||
1045 | pfie |= 0x00002000; | ||
1046 | } | ||
1047 | /* if to convert from 8 bit to 16 bit */ | ||
1048 | if (snd_pcm_format_width(runtime->format) == 8) { | ||
1049 | cpcm->shift--; | ||
1050 | pfie |= 0x00001000; | ||
1051 | } | ||
1052 | /* if to convert to unsigned */ | ||
1053 | if (snd_pcm_format_unsigned(runtime->format)) | ||
1054 | pfie |= 0x00008000; | ||
1055 | |||
1056 | /* Never convert byte order when sample stream is 8 bit */ | ||
1057 | if (snd_pcm_format_width(runtime->format) != 8) { | ||
1058 | /* convert from big endian to little endian */ | ||
1059 | if (snd_pcm_format_big_endian(runtime->format)) | ||
1060 | pfie |= 0x00004000; | ||
1061 | } | ||
1062 | |||
1063 | memset(&cpcm->pcm_rec, 0, sizeof(cpcm->pcm_rec)); | ||
1064 | cpcm->pcm_rec.sw_buffer_size = snd_pcm_lib_buffer_bytes(substream); | ||
1065 | cpcm->pcm_rec.hw_buffer_size = runtime->period_size * CS46XX_FRAGS << cpcm->shift; | ||
1066 | |||
1067 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
1068 | |||
1069 | tmp = snd_cs46xx_peek(chip, (cpcm->pcm_channel->pcm_reader_scb->address) << 2); | ||
1070 | tmp &= ~0x000003ff; | ||
1071 | tmp |= (4 << cpcm->shift) - 1; | ||
1072 | /* playback transaction count register */ | ||
1073 | snd_cs46xx_poke(chip, (cpcm->pcm_channel->pcm_reader_scb->address) << 2, tmp); | ||
1074 | |||
1075 | /* playback format && interrupt enable */ | ||
1076 | snd_cs46xx_poke(chip, (cpcm->pcm_channel->pcm_reader_scb->address + 1) << 2, pfie | cpcm->pcm_channel->pcm_slot); | ||
1077 | #else | ||
1078 | snd_cs46xx_poke(chip, BA1_PBA, cpcm->hw_buf.addr); | ||
1079 | tmp = snd_cs46xx_peek(chip, BA1_PDTC); | ||
1080 | tmp &= ~0x000003ff; | ||
1081 | tmp |= (4 << cpcm->shift) - 1; | ||
1082 | snd_cs46xx_poke(chip, BA1_PDTC, tmp); | ||
1083 | snd_cs46xx_poke(chip, BA1_PFIE, pfie); | ||
1084 | snd_cs46xx_set_play_sample_rate(chip, runtime->rate); | ||
1085 | #endif | ||
1086 | |||
1087 | return 0; | ||
1088 | } | ||
1089 | |||
1090 | static int snd_cs46xx_capture_hw_params(snd_pcm_substream_t * substream, | ||
1091 | snd_pcm_hw_params_t * hw_params) | ||
1092 | { | ||
1093 | cs46xx_t *chip = snd_pcm_substream_chip(substream); | ||
1094 | snd_pcm_runtime_t *runtime = substream->runtime; | ||
1095 | int err; | ||
1096 | |||
1097 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
1098 | cs46xx_dsp_pcm_ostream_set_period (chip, params_period_bytes(hw_params)); | ||
1099 | #endif | ||
1100 | if (runtime->periods == CS46XX_FRAGS) { | ||
1101 | if (runtime->dma_area != chip->capt.hw_buf.area) | ||
1102 | snd_pcm_lib_free_pages(substream); | ||
1103 | runtime->dma_area = chip->capt.hw_buf.area; | ||
1104 | runtime->dma_addr = chip->capt.hw_buf.addr; | ||
1105 | runtime->dma_bytes = chip->capt.hw_buf.bytes; | ||
1106 | substream->ops = &snd_cs46xx_capture_ops; | ||
1107 | } else { | ||
1108 | if (runtime->dma_area == chip->capt.hw_buf.area) { | ||
1109 | runtime->dma_area = NULL; | ||
1110 | runtime->dma_addr = 0; | ||
1111 | runtime->dma_bytes = 0; | ||
1112 | } | ||
1113 | if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0) | ||
1114 | return err; | ||
1115 | substream->ops = &snd_cs46xx_capture_indirect_ops; | ||
1116 | } | ||
1117 | |||
1118 | return 0; | ||
1119 | } | ||
1120 | |||
1121 | static int snd_cs46xx_capture_hw_free(snd_pcm_substream_t * substream) | ||
1122 | { | ||
1123 | cs46xx_t *chip = snd_pcm_substream_chip(substream); | ||
1124 | snd_pcm_runtime_t *runtime = substream->runtime; | ||
1125 | |||
1126 | if (runtime->dma_area != chip->capt.hw_buf.area) | ||
1127 | snd_pcm_lib_free_pages(substream); | ||
1128 | runtime->dma_area = NULL; | ||
1129 | runtime->dma_addr = 0; | ||
1130 | runtime->dma_bytes = 0; | ||
1131 | |||
1132 | return 0; | ||
1133 | } | ||
1134 | |||
1135 | static int snd_cs46xx_capture_prepare(snd_pcm_substream_t * substream) | ||
1136 | { | ||
1137 | cs46xx_t *chip = snd_pcm_substream_chip(substream); | ||
1138 | snd_pcm_runtime_t *runtime = substream->runtime; | ||
1139 | |||
1140 | snd_cs46xx_poke(chip, BA1_CBA, chip->capt.hw_buf.addr); | ||
1141 | chip->capt.shift = 2; | ||
1142 | memset(&chip->capt.pcm_rec, 0, sizeof(chip->capt.pcm_rec)); | ||
1143 | chip->capt.pcm_rec.sw_buffer_size = snd_pcm_lib_buffer_bytes(substream); | ||
1144 | chip->capt.pcm_rec.hw_buffer_size = runtime->period_size * CS46XX_FRAGS << 2; | ||
1145 | snd_cs46xx_set_capture_sample_rate(chip, runtime->rate); | ||
1146 | |||
1147 | return 0; | ||
1148 | } | ||
1149 | |||
1150 | static irqreturn_t snd_cs46xx_interrupt(int irq, void *dev_id, struct pt_regs *regs) | ||
1151 | { | ||
1152 | cs46xx_t *chip = dev_id; | ||
1153 | u32 status1; | ||
1154 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
1155 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
1156 | u32 status2; | ||
1157 | int i; | ||
1158 | cs46xx_pcm_t *cpcm = NULL; | ||
1159 | #endif | ||
1160 | |||
1161 | /* | ||
1162 | * Read the Interrupt Status Register to clear the interrupt | ||
1163 | */ | ||
1164 | status1 = snd_cs46xx_peekBA0(chip, BA0_HISR); | ||
1165 | if ((status1 & 0x7fffffff) == 0) { | ||
1166 | snd_cs46xx_pokeBA0(chip, BA0_HICR, HICR_CHGM | HICR_IEV); | ||
1167 | return IRQ_NONE; | ||
1168 | } | ||
1169 | |||
1170 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
1171 | status2 = snd_cs46xx_peekBA0(chip, BA0_HSR0); | ||
1172 | |||
1173 | for (i = 0; i < DSP_MAX_PCM_CHANNELS; ++i) { | ||
1174 | if (i <= 15) { | ||
1175 | if ( status1 & (1 << i) ) { | ||
1176 | if (i == CS46XX_DSP_CAPTURE_CHANNEL) { | ||
1177 | if (chip->capt.substream) | ||
1178 | snd_pcm_period_elapsed(chip->capt.substream); | ||
1179 | } else { | ||
1180 | if (ins->pcm_channels[i].active && | ||
1181 | ins->pcm_channels[i].private_data && | ||
1182 | !ins->pcm_channels[i].unlinked) { | ||
1183 | cpcm = ins->pcm_channels[i].private_data; | ||
1184 | snd_pcm_period_elapsed(cpcm->substream); | ||
1185 | } | ||
1186 | } | ||
1187 | } | ||
1188 | } else { | ||
1189 | if ( status2 & (1 << (i - 16))) { | ||
1190 | if (ins->pcm_channels[i].active && | ||
1191 | ins->pcm_channels[i].private_data && | ||
1192 | !ins->pcm_channels[i].unlinked) { | ||
1193 | cpcm = ins->pcm_channels[i].private_data; | ||
1194 | snd_pcm_period_elapsed(cpcm->substream); | ||
1195 | } | ||
1196 | } | ||
1197 | } | ||
1198 | } | ||
1199 | |||
1200 | #else | ||
1201 | /* old dsp */ | ||
1202 | if ((status1 & HISR_VC0) && chip->playback_pcm) { | ||
1203 | if (chip->playback_pcm->substream) | ||
1204 | snd_pcm_period_elapsed(chip->playback_pcm->substream); | ||
1205 | } | ||
1206 | if ((status1 & HISR_VC1) && chip->pcm) { | ||
1207 | if (chip->capt.substream) | ||
1208 | snd_pcm_period_elapsed(chip->capt.substream); | ||
1209 | } | ||
1210 | #endif | ||
1211 | |||
1212 | if ((status1 & HISR_MIDI) && chip->rmidi) { | ||
1213 | unsigned char c; | ||
1214 | |||
1215 | spin_lock(&chip->reg_lock); | ||
1216 | while ((snd_cs46xx_peekBA0(chip, BA0_MIDSR) & MIDSR_RBE) == 0) { | ||
1217 | c = snd_cs46xx_peekBA0(chip, BA0_MIDRP); | ||
1218 | if ((chip->midcr & MIDCR_RIE) == 0) | ||
1219 | continue; | ||
1220 | snd_rawmidi_receive(chip->midi_input, &c, 1); | ||
1221 | } | ||
1222 | while ((snd_cs46xx_peekBA0(chip, BA0_MIDSR) & MIDSR_TBF) == 0) { | ||
1223 | if ((chip->midcr & MIDCR_TIE) == 0) | ||
1224 | break; | ||
1225 | if (snd_rawmidi_transmit(chip->midi_output, &c, 1) != 1) { | ||
1226 | chip->midcr &= ~MIDCR_TIE; | ||
1227 | snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr); | ||
1228 | break; | ||
1229 | } | ||
1230 | snd_cs46xx_pokeBA0(chip, BA0_MIDWP, c); | ||
1231 | } | ||
1232 | spin_unlock(&chip->reg_lock); | ||
1233 | } | ||
1234 | /* | ||
1235 | * EOI to the PCI part....reenables interrupts | ||
1236 | */ | ||
1237 | snd_cs46xx_pokeBA0(chip, BA0_HICR, HICR_CHGM | HICR_IEV); | ||
1238 | |||
1239 | return IRQ_HANDLED; | ||
1240 | } | ||
1241 | |||
1242 | static snd_pcm_hardware_t snd_cs46xx_playback = | ||
1243 | { | ||
1244 | .info = (SNDRV_PCM_INFO_MMAP | | ||
1245 | SNDRV_PCM_INFO_INTERLEAVED | | ||
1246 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | ||
1247 | SNDRV_PCM_INFO_RESUME), | ||
1248 | .formats = (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 | | ||
1249 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | | ||
1250 | SNDRV_PCM_FMTBIT_U16_LE | SNDRV_PCM_FMTBIT_U16_BE), | ||
1251 | .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, | ||
1252 | .rate_min = 5500, | ||
1253 | .rate_max = 48000, | ||
1254 | .channels_min = 1, | ||
1255 | .channels_max = 2, | ||
1256 | .buffer_bytes_max = (256 * 1024), | ||
1257 | .period_bytes_min = CS46XX_MIN_PERIOD_SIZE, | ||
1258 | .period_bytes_max = CS46XX_MAX_PERIOD_SIZE, | ||
1259 | .periods_min = CS46XX_FRAGS, | ||
1260 | .periods_max = 1024, | ||
1261 | .fifo_size = 0, | ||
1262 | }; | ||
1263 | |||
1264 | static snd_pcm_hardware_t snd_cs46xx_capture = | ||
1265 | { | ||
1266 | .info = (SNDRV_PCM_INFO_MMAP | | ||
1267 | SNDRV_PCM_INFO_INTERLEAVED | | ||
1268 | SNDRV_PCM_INFO_BLOCK_TRANSFER | | ||
1269 | SNDRV_PCM_INFO_RESUME), | ||
1270 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | ||
1271 | .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, | ||
1272 | .rate_min = 5500, | ||
1273 | .rate_max = 48000, | ||
1274 | .channels_min = 2, | ||
1275 | .channels_max = 2, | ||
1276 | .buffer_bytes_max = (256 * 1024), | ||
1277 | .period_bytes_min = CS46XX_MIN_PERIOD_SIZE, | ||
1278 | .period_bytes_max = CS46XX_MAX_PERIOD_SIZE, | ||
1279 | .periods_min = CS46XX_FRAGS, | ||
1280 | .periods_max = 1024, | ||
1281 | .fifo_size = 0, | ||
1282 | }; | ||
1283 | |||
1284 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
1285 | |||
1286 | static unsigned int period_sizes[] = { 32, 64, 128, 256, 512, 1024, 2048 }; | ||
1287 | |||
1288 | static snd_pcm_hw_constraint_list_t hw_constraints_period_sizes = { | ||
1289 | .count = ARRAY_SIZE(period_sizes), | ||
1290 | .list = period_sizes, | ||
1291 | .mask = 0 | ||
1292 | }; | ||
1293 | |||
1294 | #endif | ||
1295 | |||
1296 | static void snd_cs46xx_pcm_free_substream(snd_pcm_runtime_t *runtime) | ||
1297 | { | ||
1298 | cs46xx_pcm_t * cpcm = runtime->private_data; | ||
1299 | kfree(cpcm); | ||
1300 | } | ||
1301 | |||
1302 | static int _cs46xx_playback_open_channel (snd_pcm_substream_t * substream,int pcm_channel_id) | ||
1303 | { | ||
1304 | cs46xx_t *chip = snd_pcm_substream_chip(substream); | ||
1305 | cs46xx_pcm_t * cpcm; | ||
1306 | snd_pcm_runtime_t *runtime = substream->runtime; | ||
1307 | |||
1308 | cpcm = kcalloc(1, sizeof(*cpcm), GFP_KERNEL); | ||
1309 | if (cpcm == NULL) | ||
1310 | return -ENOMEM; | ||
1311 | if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), | ||
1312 | PAGE_SIZE, &cpcm->hw_buf) < 0) { | ||
1313 | kfree(cpcm); | ||
1314 | return -ENOMEM; | ||
1315 | } | ||
1316 | |||
1317 | runtime->hw = snd_cs46xx_playback; | ||
1318 | runtime->private_data = cpcm; | ||
1319 | runtime->private_free = snd_cs46xx_pcm_free_substream; | ||
1320 | |||
1321 | cpcm->substream = substream; | ||
1322 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
1323 | down (&chip->spos_mutex); | ||
1324 | cpcm->pcm_channel = NULL; | ||
1325 | cpcm->pcm_channel_id = pcm_channel_id; | ||
1326 | |||
1327 | |||
1328 | snd_pcm_hw_constraint_list(runtime, 0, | ||
1329 | SNDRV_PCM_HW_PARAM_PERIOD_BYTES, | ||
1330 | &hw_constraints_period_sizes); | ||
1331 | |||
1332 | up (&chip->spos_mutex); | ||
1333 | #else | ||
1334 | chip->playback_pcm = cpcm; /* HACK */ | ||
1335 | #endif | ||
1336 | |||
1337 | if (chip->accept_valid) | ||
1338 | substream->runtime->hw.info |= SNDRV_PCM_INFO_MMAP_VALID; | ||
1339 | chip->active_ctrl(chip, 1); | ||
1340 | |||
1341 | return 0; | ||
1342 | } | ||
1343 | |||
1344 | static int snd_cs46xx_playback_open(snd_pcm_substream_t * substream) | ||
1345 | { | ||
1346 | snd_printdd("open front channel\n"); | ||
1347 | return _cs46xx_playback_open_channel(substream,DSP_PCM_MAIN_CHANNEL); | ||
1348 | } | ||
1349 | |||
1350 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
1351 | static int snd_cs46xx_playback_open_rear(snd_pcm_substream_t * substream) | ||
1352 | { | ||
1353 | snd_printdd("open rear channel\n"); | ||
1354 | |||
1355 | return _cs46xx_playback_open_channel(substream,DSP_PCM_REAR_CHANNEL); | ||
1356 | } | ||
1357 | |||
1358 | static int snd_cs46xx_playback_open_clfe(snd_pcm_substream_t * substream) | ||
1359 | { | ||
1360 | snd_printdd("open center - LFE channel\n"); | ||
1361 | |||
1362 | return _cs46xx_playback_open_channel(substream,DSP_PCM_CENTER_LFE_CHANNEL); | ||
1363 | } | ||
1364 | |||
1365 | static int snd_cs46xx_playback_open_iec958(snd_pcm_substream_t * substream) | ||
1366 | { | ||
1367 | cs46xx_t *chip = snd_pcm_substream_chip(substream); | ||
1368 | |||
1369 | snd_printdd("open raw iec958 channel\n"); | ||
1370 | |||
1371 | down (&chip->spos_mutex); | ||
1372 | cs46xx_iec958_pre_open (chip); | ||
1373 | up (&chip->spos_mutex); | ||
1374 | |||
1375 | return _cs46xx_playback_open_channel(substream,DSP_IEC958_CHANNEL); | ||
1376 | } | ||
1377 | |||
1378 | static int snd_cs46xx_playback_close(snd_pcm_substream_t * substream); | ||
1379 | |||
1380 | static int snd_cs46xx_playback_close_iec958(snd_pcm_substream_t * substream) | ||
1381 | { | ||
1382 | int err; | ||
1383 | cs46xx_t *chip = snd_pcm_substream_chip(substream); | ||
1384 | |||
1385 | snd_printdd("close raw iec958 channel\n"); | ||
1386 | |||
1387 | err = snd_cs46xx_playback_close(substream); | ||
1388 | |||
1389 | down (&chip->spos_mutex); | ||
1390 | cs46xx_iec958_post_close (chip); | ||
1391 | up (&chip->spos_mutex); | ||
1392 | |||
1393 | return err; | ||
1394 | } | ||
1395 | #endif | ||
1396 | |||
1397 | static int snd_cs46xx_capture_open(snd_pcm_substream_t * substream) | ||
1398 | { | ||
1399 | cs46xx_t *chip = snd_pcm_substream_chip(substream); | ||
1400 | |||
1401 | if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), | ||
1402 | PAGE_SIZE, &chip->capt.hw_buf) < 0) | ||
1403 | return -ENOMEM; | ||
1404 | chip->capt.substream = substream; | ||
1405 | substream->runtime->hw = snd_cs46xx_capture; | ||
1406 | |||
1407 | if (chip->accept_valid) | ||
1408 | substream->runtime->hw.info |= SNDRV_PCM_INFO_MMAP_VALID; | ||
1409 | |||
1410 | chip->active_ctrl(chip, 1); | ||
1411 | |||
1412 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
1413 | snd_pcm_hw_constraint_list(substream->runtime, 0, | ||
1414 | SNDRV_PCM_HW_PARAM_PERIOD_BYTES, | ||
1415 | &hw_constraints_period_sizes); | ||
1416 | #endif | ||
1417 | return 0; | ||
1418 | } | ||
1419 | |||
1420 | static int snd_cs46xx_playback_close(snd_pcm_substream_t * substream) | ||
1421 | { | ||
1422 | cs46xx_t *chip = snd_pcm_substream_chip(substream); | ||
1423 | snd_pcm_runtime_t *runtime = substream->runtime; | ||
1424 | cs46xx_pcm_t * cpcm; | ||
1425 | |||
1426 | cpcm = runtime->private_data; | ||
1427 | |||
1428 | /* when playback_open fails, then cpcm can be NULL */ | ||
1429 | if (!cpcm) return -ENXIO; | ||
1430 | |||
1431 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
1432 | down (&chip->spos_mutex); | ||
1433 | if (cpcm->pcm_channel) { | ||
1434 | cs46xx_dsp_destroy_pcm_channel(chip,cpcm->pcm_channel); | ||
1435 | cpcm->pcm_channel = NULL; | ||
1436 | } | ||
1437 | up (&chip->spos_mutex); | ||
1438 | #else | ||
1439 | chip->playback_pcm = NULL; | ||
1440 | #endif | ||
1441 | |||
1442 | cpcm->substream = NULL; | ||
1443 | snd_dma_free_pages(&cpcm->hw_buf); | ||
1444 | chip->active_ctrl(chip, -1); | ||
1445 | |||
1446 | return 0; | ||
1447 | } | ||
1448 | |||
1449 | static int snd_cs46xx_capture_close(snd_pcm_substream_t * substream) | ||
1450 | { | ||
1451 | cs46xx_t *chip = snd_pcm_substream_chip(substream); | ||
1452 | |||
1453 | chip->capt.substream = NULL; | ||
1454 | snd_dma_free_pages(&chip->capt.hw_buf); | ||
1455 | chip->active_ctrl(chip, -1); | ||
1456 | |||
1457 | return 0; | ||
1458 | } | ||
1459 | |||
1460 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
1461 | static snd_pcm_ops_t snd_cs46xx_playback_rear_ops = { | ||
1462 | .open = snd_cs46xx_playback_open_rear, | ||
1463 | .close = snd_cs46xx_playback_close, | ||
1464 | .ioctl = snd_pcm_lib_ioctl, | ||
1465 | .hw_params = snd_cs46xx_playback_hw_params, | ||
1466 | .hw_free = snd_cs46xx_playback_hw_free, | ||
1467 | .prepare = snd_cs46xx_playback_prepare, | ||
1468 | .trigger = snd_cs46xx_playback_trigger, | ||
1469 | .pointer = snd_cs46xx_playback_direct_pointer, | ||
1470 | }; | ||
1471 | |||
1472 | static snd_pcm_ops_t snd_cs46xx_playback_indirect_rear_ops = { | ||
1473 | .open = snd_cs46xx_playback_open_rear, | ||
1474 | .close = snd_cs46xx_playback_close, | ||
1475 | .ioctl = snd_pcm_lib_ioctl, | ||
1476 | .hw_params = snd_cs46xx_playback_hw_params, | ||
1477 | .hw_free = snd_cs46xx_playback_hw_free, | ||
1478 | .prepare = snd_cs46xx_playback_prepare, | ||
1479 | .trigger = snd_cs46xx_playback_trigger, | ||
1480 | .pointer = snd_cs46xx_playback_indirect_pointer, | ||
1481 | .ack = snd_cs46xx_playback_transfer, | ||
1482 | }; | ||
1483 | |||
1484 | static snd_pcm_ops_t snd_cs46xx_playback_clfe_ops = { | ||
1485 | .open = snd_cs46xx_playback_open_clfe, | ||
1486 | .close = snd_cs46xx_playback_close, | ||
1487 | .ioctl = snd_pcm_lib_ioctl, | ||
1488 | .hw_params = snd_cs46xx_playback_hw_params, | ||
1489 | .hw_free = snd_cs46xx_playback_hw_free, | ||
1490 | .prepare = snd_cs46xx_playback_prepare, | ||
1491 | .trigger = snd_cs46xx_playback_trigger, | ||
1492 | .pointer = snd_cs46xx_playback_direct_pointer, | ||
1493 | }; | ||
1494 | |||
1495 | static snd_pcm_ops_t snd_cs46xx_playback_indirect_clfe_ops = { | ||
1496 | .open = snd_cs46xx_playback_open_clfe, | ||
1497 | .close = snd_cs46xx_playback_close, | ||
1498 | .ioctl = snd_pcm_lib_ioctl, | ||
1499 | .hw_params = snd_cs46xx_playback_hw_params, | ||
1500 | .hw_free = snd_cs46xx_playback_hw_free, | ||
1501 | .prepare = snd_cs46xx_playback_prepare, | ||
1502 | .trigger = snd_cs46xx_playback_trigger, | ||
1503 | .pointer = snd_cs46xx_playback_indirect_pointer, | ||
1504 | .ack = snd_cs46xx_playback_transfer, | ||
1505 | }; | ||
1506 | |||
1507 | static snd_pcm_ops_t snd_cs46xx_playback_iec958_ops = { | ||
1508 | .open = snd_cs46xx_playback_open_iec958, | ||
1509 | .close = snd_cs46xx_playback_close_iec958, | ||
1510 | .ioctl = snd_pcm_lib_ioctl, | ||
1511 | .hw_params = snd_cs46xx_playback_hw_params, | ||
1512 | .hw_free = snd_cs46xx_playback_hw_free, | ||
1513 | .prepare = snd_cs46xx_playback_prepare, | ||
1514 | .trigger = snd_cs46xx_playback_trigger, | ||
1515 | .pointer = snd_cs46xx_playback_direct_pointer, | ||
1516 | }; | ||
1517 | |||
1518 | static snd_pcm_ops_t snd_cs46xx_playback_indirect_iec958_ops = { | ||
1519 | .open = snd_cs46xx_playback_open_iec958, | ||
1520 | .close = snd_cs46xx_playback_close_iec958, | ||
1521 | .ioctl = snd_pcm_lib_ioctl, | ||
1522 | .hw_params = snd_cs46xx_playback_hw_params, | ||
1523 | .hw_free = snd_cs46xx_playback_hw_free, | ||
1524 | .prepare = snd_cs46xx_playback_prepare, | ||
1525 | .trigger = snd_cs46xx_playback_trigger, | ||
1526 | .pointer = snd_cs46xx_playback_indirect_pointer, | ||
1527 | .ack = snd_cs46xx_playback_transfer, | ||
1528 | }; | ||
1529 | |||
1530 | #endif | ||
1531 | |||
1532 | static snd_pcm_ops_t snd_cs46xx_playback_ops = { | ||
1533 | .open = snd_cs46xx_playback_open, | ||
1534 | .close = snd_cs46xx_playback_close, | ||
1535 | .ioctl = snd_pcm_lib_ioctl, | ||
1536 | .hw_params = snd_cs46xx_playback_hw_params, | ||
1537 | .hw_free = snd_cs46xx_playback_hw_free, | ||
1538 | .prepare = snd_cs46xx_playback_prepare, | ||
1539 | .trigger = snd_cs46xx_playback_trigger, | ||
1540 | .pointer = snd_cs46xx_playback_direct_pointer, | ||
1541 | }; | ||
1542 | |||
1543 | static snd_pcm_ops_t snd_cs46xx_playback_indirect_ops = { | ||
1544 | .open = snd_cs46xx_playback_open, | ||
1545 | .close = snd_cs46xx_playback_close, | ||
1546 | .ioctl = snd_pcm_lib_ioctl, | ||
1547 | .hw_params = snd_cs46xx_playback_hw_params, | ||
1548 | .hw_free = snd_cs46xx_playback_hw_free, | ||
1549 | .prepare = snd_cs46xx_playback_prepare, | ||
1550 | .trigger = snd_cs46xx_playback_trigger, | ||
1551 | .pointer = snd_cs46xx_playback_indirect_pointer, | ||
1552 | .ack = snd_cs46xx_playback_transfer, | ||
1553 | }; | ||
1554 | |||
1555 | static snd_pcm_ops_t snd_cs46xx_capture_ops = { | ||
1556 | .open = snd_cs46xx_capture_open, | ||
1557 | .close = snd_cs46xx_capture_close, | ||
1558 | .ioctl = snd_pcm_lib_ioctl, | ||
1559 | .hw_params = snd_cs46xx_capture_hw_params, | ||
1560 | .hw_free = snd_cs46xx_capture_hw_free, | ||
1561 | .prepare = snd_cs46xx_capture_prepare, | ||
1562 | .trigger = snd_cs46xx_capture_trigger, | ||
1563 | .pointer = snd_cs46xx_capture_direct_pointer, | ||
1564 | }; | ||
1565 | |||
1566 | static snd_pcm_ops_t snd_cs46xx_capture_indirect_ops = { | ||
1567 | .open = snd_cs46xx_capture_open, | ||
1568 | .close = snd_cs46xx_capture_close, | ||
1569 | .ioctl = snd_pcm_lib_ioctl, | ||
1570 | .hw_params = snd_cs46xx_capture_hw_params, | ||
1571 | .hw_free = snd_cs46xx_capture_hw_free, | ||
1572 | .prepare = snd_cs46xx_capture_prepare, | ||
1573 | .trigger = snd_cs46xx_capture_trigger, | ||
1574 | .pointer = snd_cs46xx_capture_indirect_pointer, | ||
1575 | .ack = snd_cs46xx_capture_transfer, | ||
1576 | }; | ||
1577 | |||
1578 | static void snd_cs46xx_pcm_free(snd_pcm_t *pcm) | ||
1579 | { | ||
1580 | cs46xx_t *chip = pcm->private_data; | ||
1581 | chip->pcm = NULL; | ||
1582 | snd_pcm_lib_preallocate_free_for_all(pcm); | ||
1583 | } | ||
1584 | |||
1585 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
1586 | static void snd_cs46xx_pcm_rear_free(snd_pcm_t *pcm) | ||
1587 | { | ||
1588 | cs46xx_t *chip = pcm->private_data; | ||
1589 | chip->pcm_rear = NULL; | ||
1590 | snd_pcm_lib_preallocate_free_for_all(pcm); | ||
1591 | } | ||
1592 | |||
1593 | static void snd_cs46xx_pcm_center_lfe_free(snd_pcm_t *pcm) | ||
1594 | { | ||
1595 | cs46xx_t *chip = pcm->private_data; | ||
1596 | chip->pcm_center_lfe = NULL; | ||
1597 | snd_pcm_lib_preallocate_free_for_all(pcm); | ||
1598 | } | ||
1599 | |||
1600 | static void snd_cs46xx_pcm_iec958_free(snd_pcm_t *pcm) | ||
1601 | { | ||
1602 | cs46xx_t *chip = pcm->private_data; | ||
1603 | chip->pcm_iec958 = NULL; | ||
1604 | snd_pcm_lib_preallocate_free_for_all(pcm); | ||
1605 | } | ||
1606 | |||
1607 | #define MAX_PLAYBACK_CHANNELS (DSP_MAX_PCM_CHANNELS - 1) | ||
1608 | #else | ||
1609 | #define MAX_PLAYBACK_CHANNELS 1 | ||
1610 | #endif | ||
1611 | |||
1612 | int __devinit snd_cs46xx_pcm(cs46xx_t *chip, int device, snd_pcm_t ** rpcm) | ||
1613 | { | ||
1614 | snd_pcm_t *pcm; | ||
1615 | int err; | ||
1616 | |||
1617 | if (rpcm) | ||
1618 | *rpcm = NULL; | ||
1619 | if ((err = snd_pcm_new(chip->card, "CS46xx", device, MAX_PLAYBACK_CHANNELS, 1, &pcm)) < 0) | ||
1620 | return err; | ||
1621 | |||
1622 | pcm->private_data = chip; | ||
1623 | pcm->private_free = snd_cs46xx_pcm_free; | ||
1624 | |||
1625 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_cs46xx_playback_ops); | ||
1626 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_cs46xx_capture_ops); | ||
1627 | |||
1628 | /* global setup */ | ||
1629 | pcm->info_flags = 0; | ||
1630 | strcpy(pcm->name, "CS46xx"); | ||
1631 | chip->pcm = pcm; | ||
1632 | |||
1633 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | ||
1634 | snd_dma_pci_data(chip->pci), 64*1024, 256*1024); | ||
1635 | |||
1636 | if (rpcm) | ||
1637 | *rpcm = pcm; | ||
1638 | |||
1639 | return 0; | ||
1640 | } | ||
1641 | |||
1642 | |||
1643 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
1644 | int __devinit snd_cs46xx_pcm_rear(cs46xx_t *chip, int device, snd_pcm_t ** rpcm) | ||
1645 | { | ||
1646 | snd_pcm_t *pcm; | ||
1647 | int err; | ||
1648 | |||
1649 | if (rpcm) | ||
1650 | *rpcm = NULL; | ||
1651 | |||
1652 | if ((err = snd_pcm_new(chip->card, "CS46xx - Rear", device, MAX_PLAYBACK_CHANNELS, 0, &pcm)) < 0) | ||
1653 | return err; | ||
1654 | |||
1655 | pcm->private_data = chip; | ||
1656 | pcm->private_free = snd_cs46xx_pcm_rear_free; | ||
1657 | |||
1658 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_cs46xx_playback_rear_ops); | ||
1659 | |||
1660 | /* global setup */ | ||
1661 | pcm->info_flags = 0; | ||
1662 | strcpy(pcm->name, "CS46xx - Rear"); | ||
1663 | chip->pcm_rear = pcm; | ||
1664 | |||
1665 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | ||
1666 | snd_dma_pci_data(chip->pci), 64*1024, 256*1024); | ||
1667 | |||
1668 | if (rpcm) | ||
1669 | *rpcm = pcm; | ||
1670 | |||
1671 | return 0; | ||
1672 | } | ||
1673 | |||
1674 | int __devinit snd_cs46xx_pcm_center_lfe(cs46xx_t *chip, int device, snd_pcm_t ** rpcm) | ||
1675 | { | ||
1676 | snd_pcm_t *pcm; | ||
1677 | int err; | ||
1678 | |||
1679 | if (rpcm) | ||
1680 | *rpcm = NULL; | ||
1681 | |||
1682 | if ((err = snd_pcm_new(chip->card, "CS46xx - Center LFE", device, MAX_PLAYBACK_CHANNELS, 0, &pcm)) < 0) | ||
1683 | return err; | ||
1684 | |||
1685 | pcm->private_data = chip; | ||
1686 | pcm->private_free = snd_cs46xx_pcm_center_lfe_free; | ||
1687 | |||
1688 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_cs46xx_playback_clfe_ops); | ||
1689 | |||
1690 | /* global setup */ | ||
1691 | pcm->info_flags = 0; | ||
1692 | strcpy(pcm->name, "CS46xx - Center LFE"); | ||
1693 | chip->pcm_center_lfe = pcm; | ||
1694 | |||
1695 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | ||
1696 | snd_dma_pci_data(chip->pci), 64*1024, 256*1024); | ||
1697 | |||
1698 | if (rpcm) | ||
1699 | *rpcm = pcm; | ||
1700 | |||
1701 | return 0; | ||
1702 | } | ||
1703 | |||
1704 | int __devinit snd_cs46xx_pcm_iec958(cs46xx_t *chip, int device, snd_pcm_t ** rpcm) | ||
1705 | { | ||
1706 | snd_pcm_t *pcm; | ||
1707 | int err; | ||
1708 | |||
1709 | if (rpcm) | ||
1710 | *rpcm = NULL; | ||
1711 | |||
1712 | if ((err = snd_pcm_new(chip->card, "CS46xx - IEC958", device, 1, 0, &pcm)) < 0) | ||
1713 | return err; | ||
1714 | |||
1715 | pcm->private_data = chip; | ||
1716 | pcm->private_free = snd_cs46xx_pcm_iec958_free; | ||
1717 | |||
1718 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_cs46xx_playback_iec958_ops); | ||
1719 | |||
1720 | /* global setup */ | ||
1721 | pcm->info_flags = 0; | ||
1722 | strcpy(pcm->name, "CS46xx - IEC958"); | ||
1723 | chip->pcm_rear = pcm; | ||
1724 | |||
1725 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | ||
1726 | snd_dma_pci_data(chip->pci), 64*1024, 256*1024); | ||
1727 | |||
1728 | if (rpcm) | ||
1729 | *rpcm = pcm; | ||
1730 | |||
1731 | return 0; | ||
1732 | } | ||
1733 | #endif | ||
1734 | |||
1735 | /* | ||
1736 | * Mixer routines | ||
1737 | */ | ||
1738 | static void snd_cs46xx_mixer_free_ac97_bus(ac97_bus_t *bus) | ||
1739 | { | ||
1740 | cs46xx_t *chip = bus->private_data; | ||
1741 | |||
1742 | chip->ac97_bus = NULL; | ||
1743 | } | ||
1744 | |||
1745 | static void snd_cs46xx_mixer_free_ac97(ac97_t *ac97) | ||
1746 | { | ||
1747 | cs46xx_t *chip = ac97->private_data; | ||
1748 | |||
1749 | snd_assert ((ac97 == chip->ac97[CS46XX_PRIMARY_CODEC_INDEX]) || | ||
1750 | (ac97 == chip->ac97[CS46XX_SECONDARY_CODEC_INDEX]), | ||
1751 | return); | ||
1752 | |||
1753 | if (ac97 == chip->ac97[CS46XX_PRIMARY_CODEC_INDEX]) { | ||
1754 | chip->ac97[CS46XX_PRIMARY_CODEC_INDEX] = NULL; | ||
1755 | chip->eapd_switch = NULL; | ||
1756 | } | ||
1757 | else | ||
1758 | chip->ac97[CS46XX_SECONDARY_CODEC_INDEX] = NULL; | ||
1759 | } | ||
1760 | |||
1761 | static int snd_cs46xx_vol_info(snd_kcontrol_t *kcontrol, | ||
1762 | snd_ctl_elem_info_t *uinfo) | ||
1763 | { | ||
1764 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; | ||
1765 | uinfo->count = 2; | ||
1766 | uinfo->value.integer.min = 0; | ||
1767 | uinfo->value.integer.max = 0x7fff; | ||
1768 | return 0; | ||
1769 | } | ||
1770 | |||
1771 | static int snd_cs46xx_vol_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) | ||
1772 | { | ||
1773 | cs46xx_t *chip = snd_kcontrol_chip(kcontrol); | ||
1774 | int reg = kcontrol->private_value; | ||
1775 | unsigned int val = snd_cs46xx_peek(chip, reg); | ||
1776 | ucontrol->value.integer.value[0] = 0xffff - (val >> 16); | ||
1777 | ucontrol->value.integer.value[1] = 0xffff - (val & 0xffff); | ||
1778 | return 0; | ||
1779 | } | ||
1780 | |||
1781 | static int snd_cs46xx_vol_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) | ||
1782 | { | ||
1783 | cs46xx_t *chip = snd_kcontrol_chip(kcontrol); | ||
1784 | int reg = kcontrol->private_value; | ||
1785 | unsigned int val = ((0xffff - ucontrol->value.integer.value[0]) << 16 | | ||
1786 | (0xffff - ucontrol->value.integer.value[1])); | ||
1787 | unsigned int old = snd_cs46xx_peek(chip, reg); | ||
1788 | int change = (old != val); | ||
1789 | |||
1790 | if (change) { | ||
1791 | snd_cs46xx_poke(chip, reg, val); | ||
1792 | } | ||
1793 | |||
1794 | return change; | ||
1795 | } | ||
1796 | |||
1797 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
1798 | |||
1799 | static int snd_cs46xx_vol_dac_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) | ||
1800 | { | ||
1801 | cs46xx_t *chip = snd_kcontrol_chip(kcontrol); | ||
1802 | |||
1803 | ucontrol->value.integer.value[0] = chip->dsp_spos_instance->dac_volume_left; | ||
1804 | ucontrol->value.integer.value[1] = chip->dsp_spos_instance->dac_volume_right; | ||
1805 | |||
1806 | return 0; | ||
1807 | } | ||
1808 | |||
1809 | static int snd_cs46xx_vol_dac_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) | ||
1810 | { | ||
1811 | cs46xx_t *chip = snd_kcontrol_chip(kcontrol); | ||
1812 | int change = 0; | ||
1813 | |||
1814 | if (chip->dsp_spos_instance->dac_volume_right != ucontrol->value.integer.value[0] || | ||
1815 | chip->dsp_spos_instance->dac_volume_left != ucontrol->value.integer.value[1]) { | ||
1816 | cs46xx_dsp_set_dac_volume(chip, | ||
1817 | ucontrol->value.integer.value[0], | ||
1818 | ucontrol->value.integer.value[1]); | ||
1819 | change = 1; | ||
1820 | } | ||
1821 | |||
1822 | return change; | ||
1823 | } | ||
1824 | |||
1825 | #if 0 | ||
1826 | static int snd_cs46xx_vol_iec958_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) | ||
1827 | { | ||
1828 | cs46xx_t *chip = snd_kcontrol_chip(kcontrol); | ||
1829 | |||
1830 | ucontrol->value.integer.value[0] = chip->dsp_spos_instance->spdif_input_volume_left; | ||
1831 | ucontrol->value.integer.value[1] = chip->dsp_spos_instance->spdif_input_volume_right; | ||
1832 | return 0; | ||
1833 | } | ||
1834 | |||
1835 | static int snd_cs46xx_vol_iec958_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) | ||
1836 | { | ||
1837 | cs46xx_t *chip = snd_kcontrol_chip(kcontrol); | ||
1838 | int change = 0; | ||
1839 | |||
1840 | if (chip->dsp_spos_instance->spdif_input_volume_left != ucontrol->value.integer.value[0] || | ||
1841 | chip->dsp_spos_instance->spdif_input_volume_right!= ucontrol->value.integer.value[1]) { | ||
1842 | cs46xx_dsp_set_iec958_volume (chip, | ||
1843 | ucontrol->value.integer.value[0], | ||
1844 | ucontrol->value.integer.value[1]); | ||
1845 | change = 1; | ||
1846 | } | ||
1847 | |||
1848 | return change; | ||
1849 | } | ||
1850 | #endif | ||
1851 | |||
1852 | static int snd_mixer_boolean_info(snd_kcontrol_t *kcontrol, | ||
1853 | snd_ctl_elem_info_t *uinfo) | ||
1854 | { | ||
1855 | uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; | ||
1856 | uinfo->count = 1; | ||
1857 | uinfo->value.integer.min = 0; | ||
1858 | uinfo->value.integer.max = 1; | ||
1859 | return 0; | ||
1860 | } | ||
1861 | |||
1862 | static int snd_cs46xx_iec958_get(snd_kcontrol_t *kcontrol, | ||
1863 | snd_ctl_elem_value_t *ucontrol) | ||
1864 | { | ||
1865 | cs46xx_t *chip = snd_kcontrol_chip(kcontrol); | ||
1866 | int reg = kcontrol->private_value; | ||
1867 | |||
1868 | if (reg == CS46XX_MIXER_SPDIF_OUTPUT_ELEMENT) | ||
1869 | ucontrol->value.integer.value[0] = (chip->dsp_spos_instance->spdif_status_out & DSP_SPDIF_STATUS_OUTPUT_ENABLED); | ||
1870 | else | ||
1871 | ucontrol->value.integer.value[0] = chip->dsp_spos_instance->spdif_status_in; | ||
1872 | |||
1873 | return 0; | ||
1874 | } | ||
1875 | |||
1876 | static int snd_cs46xx_iec958_put(snd_kcontrol_t *kcontrol, | ||
1877 | snd_ctl_elem_value_t *ucontrol) | ||
1878 | { | ||
1879 | cs46xx_t *chip = snd_kcontrol_chip(kcontrol); | ||
1880 | int change, res; | ||
1881 | |||
1882 | switch (kcontrol->private_value) { | ||
1883 | case CS46XX_MIXER_SPDIF_OUTPUT_ELEMENT: | ||
1884 | down (&chip->spos_mutex); | ||
1885 | change = (chip->dsp_spos_instance->spdif_status_out & DSP_SPDIF_STATUS_OUTPUT_ENABLED); | ||
1886 | if (ucontrol->value.integer.value[0] && !change) | ||
1887 | cs46xx_dsp_enable_spdif_out(chip); | ||
1888 | else if (change && !ucontrol->value.integer.value[0]) | ||
1889 | cs46xx_dsp_disable_spdif_out(chip); | ||
1890 | |||
1891 | res = (change != (chip->dsp_spos_instance->spdif_status_out & DSP_SPDIF_STATUS_OUTPUT_ENABLED)); | ||
1892 | up (&chip->spos_mutex); | ||
1893 | break; | ||
1894 | case CS46XX_MIXER_SPDIF_INPUT_ELEMENT: | ||
1895 | change = chip->dsp_spos_instance->spdif_status_in; | ||
1896 | if (ucontrol->value.integer.value[0] && !change) { | ||
1897 | cs46xx_dsp_enable_spdif_in(chip); | ||
1898 | /* restore volume */ | ||
1899 | } | ||
1900 | else if (change && !ucontrol->value.integer.value[0]) | ||
1901 | cs46xx_dsp_disable_spdif_in(chip); | ||
1902 | |||
1903 | res = (change != chip->dsp_spos_instance->spdif_status_in); | ||
1904 | break; | ||
1905 | default: | ||
1906 | res = -EINVAL; | ||
1907 | snd_assert(0, (void)0); | ||
1908 | } | ||
1909 | |||
1910 | return res; | ||
1911 | } | ||
1912 | |||
1913 | static int snd_cs46xx_adc_capture_get(snd_kcontrol_t *kcontrol, | ||
1914 | snd_ctl_elem_value_t *ucontrol) | ||
1915 | { | ||
1916 | cs46xx_t *chip = snd_kcontrol_chip(kcontrol); | ||
1917 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
1918 | |||
1919 | if (ins->adc_input != NULL) | ||
1920 | ucontrol->value.integer.value[0] = 1; | ||
1921 | else | ||
1922 | ucontrol->value.integer.value[0] = 0; | ||
1923 | |||
1924 | return 0; | ||
1925 | } | ||
1926 | |||
1927 | static int snd_cs46xx_adc_capture_put(snd_kcontrol_t *kcontrol, | ||
1928 | snd_ctl_elem_value_t *ucontrol) | ||
1929 | { | ||
1930 | cs46xx_t *chip = snd_kcontrol_chip(kcontrol); | ||
1931 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
1932 | int change = 0; | ||
1933 | |||
1934 | if (ucontrol->value.integer.value[0] && !ins->adc_input) { | ||
1935 | cs46xx_dsp_enable_adc_capture(chip); | ||
1936 | change = 1; | ||
1937 | } else if (!ucontrol->value.integer.value[0] && ins->adc_input) { | ||
1938 | cs46xx_dsp_disable_adc_capture(chip); | ||
1939 | change = 1; | ||
1940 | } | ||
1941 | return change; | ||
1942 | } | ||
1943 | |||
1944 | static int snd_cs46xx_pcm_capture_get(snd_kcontrol_t *kcontrol, | ||
1945 | snd_ctl_elem_value_t *ucontrol) | ||
1946 | { | ||
1947 | cs46xx_t *chip = snd_kcontrol_chip(kcontrol); | ||
1948 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
1949 | |||
1950 | if (ins->pcm_input != NULL) | ||
1951 | ucontrol->value.integer.value[0] = 1; | ||
1952 | else | ||
1953 | ucontrol->value.integer.value[0] = 0; | ||
1954 | |||
1955 | return 0; | ||
1956 | } | ||
1957 | |||
1958 | |||
1959 | static int snd_cs46xx_pcm_capture_put(snd_kcontrol_t *kcontrol, | ||
1960 | snd_ctl_elem_value_t *ucontrol) | ||
1961 | { | ||
1962 | cs46xx_t *chip = snd_kcontrol_chip(kcontrol); | ||
1963 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
1964 | int change = 0; | ||
1965 | |||
1966 | if (ucontrol->value.integer.value[0] && !ins->pcm_input) { | ||
1967 | cs46xx_dsp_enable_pcm_capture(chip); | ||
1968 | change = 1; | ||
1969 | } else if (!ucontrol->value.integer.value[0] && ins->pcm_input) { | ||
1970 | cs46xx_dsp_disable_pcm_capture(chip); | ||
1971 | change = 1; | ||
1972 | } | ||
1973 | |||
1974 | return change; | ||
1975 | } | ||
1976 | |||
1977 | static int snd_herc_spdif_select_get(snd_kcontrol_t *kcontrol, | ||
1978 | snd_ctl_elem_value_t *ucontrol) | ||
1979 | { | ||
1980 | cs46xx_t *chip = snd_kcontrol_chip(kcontrol); | ||
1981 | |||
1982 | int val1 = snd_cs46xx_peekBA0(chip, BA0_EGPIODR); | ||
1983 | |||
1984 | if (val1 & EGPIODR_GPOE0) | ||
1985 | ucontrol->value.integer.value[0] = 1; | ||
1986 | else | ||
1987 | ucontrol->value.integer.value[0] = 0; | ||
1988 | |||
1989 | return 0; | ||
1990 | } | ||
1991 | |||
1992 | /* | ||
1993 | * Game Theatre XP card - EGPIO[0] is used to select SPDIF input optical or coaxial. | ||
1994 | */ | ||
1995 | static int snd_herc_spdif_select_put(snd_kcontrol_t *kcontrol, | ||
1996 | snd_ctl_elem_value_t *ucontrol) | ||
1997 | { | ||
1998 | cs46xx_t *chip = snd_kcontrol_chip(kcontrol); | ||
1999 | int val1 = snd_cs46xx_peekBA0(chip, BA0_EGPIODR); | ||
2000 | int val2 = snd_cs46xx_peekBA0(chip, BA0_EGPIOPTR); | ||
2001 | |||
2002 | if (ucontrol->value.integer.value[0]) { | ||
2003 | /* optical is default */ | ||
2004 | snd_cs46xx_pokeBA0(chip, BA0_EGPIODR, | ||
2005 | EGPIODR_GPOE0 | val1); /* enable EGPIO0 output */ | ||
2006 | snd_cs46xx_pokeBA0(chip, BA0_EGPIOPTR, | ||
2007 | EGPIOPTR_GPPT0 | val2); /* open-drain on output */ | ||
2008 | } else { | ||
2009 | /* coaxial */ | ||
2010 | snd_cs46xx_pokeBA0(chip, BA0_EGPIODR, val1 & ~EGPIODR_GPOE0); /* disable */ | ||
2011 | snd_cs46xx_pokeBA0(chip, BA0_EGPIOPTR, val2 & ~EGPIOPTR_GPPT0); /* disable */ | ||
2012 | } | ||
2013 | |||
2014 | /* checking diff from the EGPIO direction register | ||
2015 | should be enough */ | ||
2016 | return (val1 != (int)snd_cs46xx_peekBA0(chip, BA0_EGPIODR)); | ||
2017 | } | ||
2018 | |||
2019 | |||
2020 | static int snd_cs46xx_spdif_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) | ||
2021 | { | ||
2022 | uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; | ||
2023 | uinfo->count = 1; | ||
2024 | return 0; | ||
2025 | } | ||
2026 | |||
2027 | static int snd_cs46xx_spdif_default_get(snd_kcontrol_t * kcontrol, | ||
2028 | snd_ctl_elem_value_t * ucontrol) | ||
2029 | { | ||
2030 | cs46xx_t *chip = snd_kcontrol_chip(kcontrol); | ||
2031 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
2032 | |||
2033 | down (&chip->spos_mutex); | ||
2034 | ucontrol->value.iec958.status[0] = _wrap_all_bits((ins->spdif_csuv_default >> 24) & 0xff); | ||
2035 | ucontrol->value.iec958.status[1] = _wrap_all_bits((ins->spdif_csuv_default >> 16) & 0xff); | ||
2036 | ucontrol->value.iec958.status[2] = 0; | ||
2037 | ucontrol->value.iec958.status[3] = _wrap_all_bits((ins->spdif_csuv_default) & 0xff); | ||
2038 | up (&chip->spos_mutex); | ||
2039 | |||
2040 | return 0; | ||
2041 | } | ||
2042 | |||
2043 | static int snd_cs46xx_spdif_default_put(snd_kcontrol_t * kcontrol, | ||
2044 | snd_ctl_elem_value_t * ucontrol) | ||
2045 | { | ||
2046 | cs46xx_t * chip = snd_kcontrol_chip(kcontrol); | ||
2047 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
2048 | unsigned int val; | ||
2049 | int change; | ||
2050 | |||
2051 | down (&chip->spos_mutex); | ||
2052 | val = ((unsigned int)_wrap_all_bits(ucontrol->value.iec958.status[0]) << 24) | | ||
2053 | ((unsigned int)_wrap_all_bits(ucontrol->value.iec958.status[2]) << 16) | | ||
2054 | ((unsigned int)_wrap_all_bits(ucontrol->value.iec958.status[3])) | | ||
2055 | /* left and right validity bit */ | ||
2056 | (1 << 13) | (1 << 12); | ||
2057 | |||
2058 | |||
2059 | change = (unsigned int)ins->spdif_csuv_default != val; | ||
2060 | ins->spdif_csuv_default = val; | ||
2061 | |||
2062 | if ( !(ins->spdif_status_out & DSP_SPDIF_STATUS_PLAYBACK_OPEN) ) | ||
2063 | cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV,val); | ||
2064 | |||
2065 | up (&chip->spos_mutex); | ||
2066 | |||
2067 | return change; | ||
2068 | } | ||
2069 | |||
2070 | static int snd_cs46xx_spdif_mask_get(snd_kcontrol_t * kcontrol, | ||
2071 | snd_ctl_elem_value_t * ucontrol) | ||
2072 | { | ||
2073 | ucontrol->value.iec958.status[0] = 0xff; | ||
2074 | ucontrol->value.iec958.status[1] = 0xff; | ||
2075 | ucontrol->value.iec958.status[2] = 0x00; | ||
2076 | ucontrol->value.iec958.status[3] = 0xff; | ||
2077 | return 0; | ||
2078 | } | ||
2079 | |||
2080 | static int snd_cs46xx_spdif_stream_get(snd_kcontrol_t * kcontrol, | ||
2081 | snd_ctl_elem_value_t * ucontrol) | ||
2082 | { | ||
2083 | cs46xx_t *chip = snd_kcontrol_chip(kcontrol); | ||
2084 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
2085 | |||
2086 | down (&chip->spos_mutex); | ||
2087 | ucontrol->value.iec958.status[0] = _wrap_all_bits((ins->spdif_csuv_stream >> 24) & 0xff); | ||
2088 | ucontrol->value.iec958.status[1] = _wrap_all_bits((ins->spdif_csuv_stream >> 16) & 0xff); | ||
2089 | ucontrol->value.iec958.status[2] = 0; | ||
2090 | ucontrol->value.iec958.status[3] = _wrap_all_bits((ins->spdif_csuv_stream) & 0xff); | ||
2091 | up (&chip->spos_mutex); | ||
2092 | |||
2093 | return 0; | ||
2094 | } | ||
2095 | |||
2096 | static int snd_cs46xx_spdif_stream_put(snd_kcontrol_t * kcontrol, | ||
2097 | snd_ctl_elem_value_t * ucontrol) | ||
2098 | { | ||
2099 | cs46xx_t * chip = snd_kcontrol_chip(kcontrol); | ||
2100 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
2101 | unsigned int val; | ||
2102 | int change; | ||
2103 | |||
2104 | down (&chip->spos_mutex); | ||
2105 | val = ((unsigned int)_wrap_all_bits(ucontrol->value.iec958.status[0]) << 24) | | ||
2106 | ((unsigned int)_wrap_all_bits(ucontrol->value.iec958.status[1]) << 16) | | ||
2107 | ((unsigned int)_wrap_all_bits(ucontrol->value.iec958.status[3])) | | ||
2108 | /* left and right validity bit */ | ||
2109 | (1 << 13) | (1 << 12); | ||
2110 | |||
2111 | |||
2112 | change = ins->spdif_csuv_stream != val; | ||
2113 | ins->spdif_csuv_stream = val; | ||
2114 | |||
2115 | if ( ins->spdif_status_out & DSP_SPDIF_STATUS_PLAYBACK_OPEN ) | ||
2116 | cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV,val); | ||
2117 | |||
2118 | up (&chip->spos_mutex); | ||
2119 | |||
2120 | return change; | ||
2121 | } | ||
2122 | |||
2123 | #endif /* CONFIG_SND_CS46XX_NEW_DSP */ | ||
2124 | |||
2125 | |||
2126 | #ifdef CONFIG_SND_CS46XX_DEBUG_GPIO | ||
2127 | static int snd_cs46xx_egpio_select_info(snd_kcontrol_t *kcontrol, | ||
2128 | snd_ctl_elem_info_t *uinfo) | ||
2129 | { | ||
2130 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; | ||
2131 | uinfo->count = 1; | ||
2132 | uinfo->value.integer.min = 0; | ||
2133 | uinfo->value.integer.max = 8; | ||
2134 | return 0; | ||
2135 | } | ||
2136 | |||
2137 | static int snd_cs46xx_egpio_select_get(snd_kcontrol_t *kcontrol, | ||
2138 | snd_ctl_elem_value_t *ucontrol) | ||
2139 | { | ||
2140 | cs46xx_t *chip = snd_kcontrol_chip(kcontrol); | ||
2141 | ucontrol->value.integer.value[0] = chip->current_gpio; | ||
2142 | |||
2143 | return 0; | ||
2144 | } | ||
2145 | |||
2146 | static int snd_cs46xx_egpio_select_put(snd_kcontrol_t *kcontrol, | ||
2147 | snd_ctl_elem_value_t *ucontrol) | ||
2148 | { | ||
2149 | cs46xx_t *chip = snd_kcontrol_chip(kcontrol); | ||
2150 | int change = (chip->current_gpio != ucontrol->value.integer.value[0]); | ||
2151 | chip->current_gpio = ucontrol->value.integer.value[0]; | ||
2152 | |||
2153 | return change; | ||
2154 | } | ||
2155 | |||
2156 | |||
2157 | static int snd_cs46xx_egpio_get(snd_kcontrol_t *kcontrol, | ||
2158 | snd_ctl_elem_value_t *ucontrol) | ||
2159 | { | ||
2160 | cs46xx_t *chip = snd_kcontrol_chip(kcontrol); | ||
2161 | int reg = kcontrol->private_value; | ||
2162 | |||
2163 | snd_printdd ("put: reg = %04x, gpio %02x\n",reg,chip->current_gpio); | ||
2164 | ucontrol->value.integer.value[0] = | ||
2165 | (snd_cs46xx_peekBA0(chip, reg) & (1 << chip->current_gpio)) ? 1 : 0; | ||
2166 | |||
2167 | return 0; | ||
2168 | } | ||
2169 | |||
2170 | static int snd_cs46xx_egpio_put(snd_kcontrol_t *kcontrol, | ||
2171 | snd_ctl_elem_value_t *ucontrol) | ||
2172 | { | ||
2173 | cs46xx_t *chip = snd_kcontrol_chip(kcontrol); | ||
2174 | int reg = kcontrol->private_value; | ||
2175 | int val = snd_cs46xx_peekBA0(chip, reg); | ||
2176 | int oldval = val; | ||
2177 | snd_printdd ("put: reg = %04x, gpio %02x\n",reg,chip->current_gpio); | ||
2178 | |||
2179 | if (ucontrol->value.integer.value[0]) | ||
2180 | val |= (1 << chip->current_gpio); | ||
2181 | else | ||
2182 | val &= ~(1 << chip->current_gpio); | ||
2183 | |||
2184 | snd_cs46xx_pokeBA0(chip, reg,val); | ||
2185 | snd_printdd ("put: val %08x oldval %08x\n",val,oldval); | ||
2186 | |||
2187 | return (oldval != val); | ||
2188 | } | ||
2189 | #endif /* CONFIG_SND_CS46XX_DEBUG_GPIO */ | ||
2190 | |||
2191 | static snd_kcontrol_new_t snd_cs46xx_controls[] __devinitdata = { | ||
2192 | { | ||
2193 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | ||
2194 | .name = "DAC Volume", | ||
2195 | .info = snd_cs46xx_vol_info, | ||
2196 | #ifndef CONFIG_SND_CS46XX_NEW_DSP | ||
2197 | .get = snd_cs46xx_vol_get, | ||
2198 | .put = snd_cs46xx_vol_put, | ||
2199 | .private_value = BA1_PVOL, | ||
2200 | #else | ||
2201 | .get = snd_cs46xx_vol_dac_get, | ||
2202 | .put = snd_cs46xx_vol_dac_put, | ||
2203 | #endif | ||
2204 | }, | ||
2205 | |||
2206 | { | ||
2207 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | ||
2208 | .name = "ADC Volume", | ||
2209 | .info = snd_cs46xx_vol_info, | ||
2210 | .get = snd_cs46xx_vol_get, | ||
2211 | .put = snd_cs46xx_vol_put, | ||
2212 | #ifndef CONFIG_SND_CS46XX_NEW_DSP | ||
2213 | .private_value = BA1_CVOL, | ||
2214 | #else | ||
2215 | .private_value = (VARIDECIMATE_SCB_ADDR + 0xE) << 2, | ||
2216 | #endif | ||
2217 | }, | ||
2218 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
2219 | { | ||
2220 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | ||
2221 | .name = "ADC Capture Switch", | ||
2222 | .info = snd_mixer_boolean_info, | ||
2223 | .get = snd_cs46xx_adc_capture_get, | ||
2224 | .put = snd_cs46xx_adc_capture_put | ||
2225 | }, | ||
2226 | { | ||
2227 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | ||
2228 | .name = "DAC Capture Switch", | ||
2229 | .info = snd_mixer_boolean_info, | ||
2230 | .get = snd_cs46xx_pcm_capture_get, | ||
2231 | .put = snd_cs46xx_pcm_capture_put | ||
2232 | }, | ||
2233 | { | ||
2234 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | ||
2235 | .name = "IEC958 Output Switch", | ||
2236 | .info = snd_mixer_boolean_info, | ||
2237 | .get = snd_cs46xx_iec958_get, | ||
2238 | .put = snd_cs46xx_iec958_put, | ||
2239 | .private_value = CS46XX_MIXER_SPDIF_OUTPUT_ELEMENT, | ||
2240 | }, | ||
2241 | { | ||
2242 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | ||
2243 | .name = "IEC958 Input Switch", | ||
2244 | .info = snd_mixer_boolean_info, | ||
2245 | .get = snd_cs46xx_iec958_get, | ||
2246 | .put = snd_cs46xx_iec958_put, | ||
2247 | .private_value = CS46XX_MIXER_SPDIF_INPUT_ELEMENT, | ||
2248 | }, | ||
2249 | #if 0 | ||
2250 | /* Input IEC958 volume does not work for the moment. (Benny) */ | ||
2251 | { | ||
2252 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | ||
2253 | .name = "IEC958 Input Volume", | ||
2254 | .info = snd_cs46xx_vol_info, | ||
2255 | .get = snd_cs46xx_vol_iec958_get, | ||
2256 | .put = snd_cs46xx_vol_iec958_put, | ||
2257 | .private_value = (ASYNCRX_SCB_ADDR + 0xE) << 2, | ||
2258 | }, | ||
2259 | #endif | ||
2260 | { | ||
2261 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | ||
2262 | .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), | ||
2263 | .info = snd_cs46xx_spdif_info, | ||
2264 | .get = snd_cs46xx_spdif_default_get, | ||
2265 | .put = snd_cs46xx_spdif_default_put, | ||
2266 | }, | ||
2267 | { | ||
2268 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | ||
2269 | .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK), | ||
2270 | .info = snd_cs46xx_spdif_info, | ||
2271 | .get = snd_cs46xx_spdif_mask_get, | ||
2272 | .access = SNDRV_CTL_ELEM_ACCESS_READ | ||
2273 | }, | ||
2274 | { | ||
2275 | .iface = SNDRV_CTL_ELEM_IFACE_PCM, | ||
2276 | .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM), | ||
2277 | .info = snd_cs46xx_spdif_info, | ||
2278 | .get = snd_cs46xx_spdif_stream_get, | ||
2279 | .put = snd_cs46xx_spdif_stream_put | ||
2280 | }, | ||
2281 | |||
2282 | #endif | ||
2283 | #ifdef CONFIG_SND_CS46XX_DEBUG_GPIO | ||
2284 | { | ||
2285 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | ||
2286 | .name = "EGPIO select", | ||
2287 | .info = snd_cs46xx_egpio_select_info, | ||
2288 | .get = snd_cs46xx_egpio_select_get, | ||
2289 | .put = snd_cs46xx_egpio_select_put, | ||
2290 | .private_value = 0, | ||
2291 | }, | ||
2292 | { | ||
2293 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | ||
2294 | .name = "EGPIO Input/Output", | ||
2295 | .info = snd_mixer_boolean_info, | ||
2296 | .get = snd_cs46xx_egpio_get, | ||
2297 | .put = snd_cs46xx_egpio_put, | ||
2298 | .private_value = BA0_EGPIODR, | ||
2299 | }, | ||
2300 | { | ||
2301 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | ||
2302 | .name = "EGPIO CMOS/Open drain", | ||
2303 | .info = snd_mixer_boolean_info, | ||
2304 | .get = snd_cs46xx_egpio_get, | ||
2305 | .put = snd_cs46xx_egpio_put, | ||
2306 | .private_value = BA0_EGPIOPTR, | ||
2307 | }, | ||
2308 | { | ||
2309 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | ||
2310 | .name = "EGPIO On/Off", | ||
2311 | .info = snd_mixer_boolean_info, | ||
2312 | .get = snd_cs46xx_egpio_get, | ||
2313 | .put = snd_cs46xx_egpio_put, | ||
2314 | .private_value = BA0_EGPIOSR, | ||
2315 | }, | ||
2316 | #endif | ||
2317 | }; | ||
2318 | |||
2319 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
2320 | /* set primary cs4294 codec into Extended Audio Mode */ | ||
2321 | static int snd_cs46xx_front_dup_get(snd_kcontrol_t *kcontrol, | ||
2322 | snd_ctl_elem_value_t *ucontrol) | ||
2323 | { | ||
2324 | cs46xx_t *chip = snd_kcontrol_chip(kcontrol); | ||
2325 | unsigned short val; | ||
2326 | val = snd_ac97_read(chip->ac97[CS46XX_PRIMARY_CODEC_INDEX], AC97_CSR_ACMODE); | ||
2327 | ucontrol->value.integer.value[0] = (val & 0x200) ? 0 : 1; | ||
2328 | return 0; | ||
2329 | } | ||
2330 | |||
2331 | static int snd_cs46xx_front_dup_put(snd_kcontrol_t *kcontrol, | ||
2332 | snd_ctl_elem_value_t *ucontrol) | ||
2333 | { | ||
2334 | cs46xx_t *chip = snd_kcontrol_chip(kcontrol); | ||
2335 | return snd_ac97_update_bits(chip->ac97[CS46XX_PRIMARY_CODEC_INDEX], | ||
2336 | AC97_CSR_ACMODE, 0x200, | ||
2337 | ucontrol->value.integer.value[0] ? 0 : 0x200); | ||
2338 | } | ||
2339 | |||
2340 | static snd_kcontrol_new_t snd_cs46xx_front_dup_ctl = { | ||
2341 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | ||
2342 | .name = "Duplicate Front", | ||
2343 | .info = snd_mixer_boolean_info, | ||
2344 | .get = snd_cs46xx_front_dup_get, | ||
2345 | .put = snd_cs46xx_front_dup_put, | ||
2346 | }; | ||
2347 | #endif | ||
2348 | |||
2349 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
2350 | /* Only available on the Hercules Game Theater XP soundcard */ | ||
2351 | static snd_kcontrol_new_t snd_hercules_controls[] __devinitdata = { | ||
2352 | { | ||
2353 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | ||
2354 | .name = "Optical/Coaxial SPDIF Input Switch", | ||
2355 | .info = snd_mixer_boolean_info, | ||
2356 | .get = snd_herc_spdif_select_get, | ||
2357 | .put = snd_herc_spdif_select_put, | ||
2358 | }, | ||
2359 | }; | ||
2360 | |||
2361 | |||
2362 | static void snd_cs46xx_codec_reset (ac97_t * ac97) | ||
2363 | { | ||
2364 | unsigned long end_time; | ||
2365 | int err; | ||
2366 | |||
2367 | /* reset to defaults */ | ||
2368 | snd_ac97_write(ac97, AC97_RESET, 0); | ||
2369 | |||
2370 | /* set the desired CODEC mode */ | ||
2371 | if (ac97->num == CS46XX_PRIMARY_CODEC_INDEX) { | ||
2372 | snd_printdd("cs46xx: CODOEC1 mode %04x\n",0x0); | ||
2373 | snd_cs46xx_ac97_write(ac97,AC97_CSR_ACMODE,0x0); | ||
2374 | } else if (ac97->num == CS46XX_SECONDARY_CODEC_INDEX) { | ||
2375 | snd_printdd("cs46xx: CODOEC2 mode %04x\n",0x3); | ||
2376 | snd_cs46xx_ac97_write(ac97,AC97_CSR_ACMODE,0x3); | ||
2377 | } else { | ||
2378 | snd_assert(0); /* should never happen ... */ | ||
2379 | } | ||
2380 | |||
2381 | udelay(50); | ||
2382 | |||
2383 | /* it's necessary to wait awhile until registers are accessible after RESET */ | ||
2384 | /* because the PCM or MASTER volume registers can be modified, */ | ||
2385 | /* the REC_GAIN register is used for tests */ | ||
2386 | end_time = jiffies + HZ; | ||
2387 | do { | ||
2388 | unsigned short ext_mid; | ||
2389 | |||
2390 | /* use preliminary reads to settle the communication */ | ||
2391 | snd_ac97_read(ac97, AC97_RESET); | ||
2392 | snd_ac97_read(ac97, AC97_VENDOR_ID1); | ||
2393 | snd_ac97_read(ac97, AC97_VENDOR_ID2); | ||
2394 | /* modem? */ | ||
2395 | ext_mid = snd_ac97_read(ac97, AC97_EXTENDED_MID); | ||
2396 | if (ext_mid != 0xffff && (ext_mid & 1) != 0) | ||
2397 | return; | ||
2398 | |||
2399 | /* test if we can write to the record gain volume register */ | ||
2400 | snd_ac97_write_cache(ac97, AC97_REC_GAIN, 0x8a05); | ||
2401 | if ((err = snd_ac97_read(ac97, AC97_REC_GAIN)) == 0x8a05) | ||
2402 | return; | ||
2403 | |||
2404 | set_current_state(TASK_UNINTERRUPTIBLE); | ||
2405 | schedule_timeout(HZ/100); | ||
2406 | } while (time_after_eq(end_time, jiffies)); | ||
2407 | |||
2408 | snd_printk("CS46xx secondary codec dont respond!\n"); | ||
2409 | } | ||
2410 | #endif | ||
2411 | |||
2412 | static int __devinit cs46xx_detect_codec(cs46xx_t *chip, int codec) | ||
2413 | { | ||
2414 | int idx, err; | ||
2415 | ac97_template_t ac97; | ||
2416 | |||
2417 | memset(&ac97, 0, sizeof(ac97)); | ||
2418 | ac97.private_data = chip; | ||
2419 | ac97.private_free = snd_cs46xx_mixer_free_ac97; | ||
2420 | ac97.num = codec; | ||
2421 | if (chip->amplifier_ctrl == amp_voyetra) | ||
2422 | ac97.scaps = AC97_SCAP_INV_EAPD; | ||
2423 | |||
2424 | if (codec == CS46XX_SECONDARY_CODEC_INDEX) { | ||
2425 | snd_cs46xx_codec_write(chip, AC97_RESET, 0, codec); | ||
2426 | udelay(10); | ||
2427 | if (snd_cs46xx_codec_read(chip, AC97_RESET, codec) & 0x8000) { | ||
2428 | snd_printdd("snd_cs46xx: seconadry codec not present\n"); | ||
2429 | return -ENXIO; | ||
2430 | } | ||
2431 | } | ||
2432 | |||
2433 | snd_cs46xx_codec_write(chip, AC97_MASTER, 0x8000, codec); | ||
2434 | for (idx = 0; idx < 100; ++idx) { | ||
2435 | if (snd_cs46xx_codec_read(chip, AC97_MASTER, codec) == 0x8000) { | ||
2436 | err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97[codec]); | ||
2437 | return err; | ||
2438 | } | ||
2439 | set_current_state(TASK_INTERRUPTIBLE); | ||
2440 | schedule_timeout(HZ/100); | ||
2441 | } | ||
2442 | snd_printdd("snd_cs46xx: codec %d detection timeout\n", codec); | ||
2443 | return -ENXIO; | ||
2444 | } | ||
2445 | |||
2446 | int __devinit snd_cs46xx_mixer(cs46xx_t *chip) | ||
2447 | { | ||
2448 | snd_card_t *card = chip->card; | ||
2449 | snd_ctl_elem_id_t id; | ||
2450 | int err; | ||
2451 | unsigned int idx; | ||
2452 | static ac97_bus_ops_t ops = { | ||
2453 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
2454 | .reset = snd_cs46xx_codec_reset, | ||
2455 | #endif | ||
2456 | .write = snd_cs46xx_ac97_write, | ||
2457 | .read = snd_cs46xx_ac97_read, | ||
2458 | }; | ||
2459 | |||
2460 | /* detect primary codec */ | ||
2461 | chip->nr_ac97_codecs = 0; | ||
2462 | snd_printdd("snd_cs46xx: detecting primary codec\n"); | ||
2463 | if ((err = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus)) < 0) | ||
2464 | return err; | ||
2465 | chip->ac97_bus->private_free = snd_cs46xx_mixer_free_ac97_bus; | ||
2466 | |||
2467 | if (cs46xx_detect_codec(chip, CS46XX_PRIMARY_CODEC_INDEX) < 0) | ||
2468 | return -ENXIO; | ||
2469 | chip->nr_ac97_codecs = 1; | ||
2470 | |||
2471 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
2472 | snd_printdd("snd_cs46xx: detecting seconadry codec\n"); | ||
2473 | /* try detect a secondary codec */ | ||
2474 | if (! cs46xx_detect_codec(chip, CS46XX_SECONDARY_CODEC_INDEX)) | ||
2475 | chip->nr_ac97_codecs = 2; | ||
2476 | #endif /* CONFIG_SND_CS46XX_NEW_DSP */ | ||
2477 | |||
2478 | /* add cs4630 mixer controls */ | ||
2479 | for (idx = 0; idx < ARRAY_SIZE(snd_cs46xx_controls); idx++) { | ||
2480 | snd_kcontrol_t *kctl; | ||
2481 | kctl = snd_ctl_new1(&snd_cs46xx_controls[idx], chip); | ||
2482 | if ((err = snd_ctl_add(card, kctl)) < 0) | ||
2483 | return err; | ||
2484 | } | ||
2485 | |||
2486 | /* get EAPD mixer switch (for voyetra hack) */ | ||
2487 | memset(&id, 0, sizeof(id)); | ||
2488 | id.iface = SNDRV_CTL_ELEM_IFACE_MIXER; | ||
2489 | strcpy(id.name, "External Amplifier"); | ||
2490 | chip->eapd_switch = snd_ctl_find_id(chip->card, &id); | ||
2491 | |||
2492 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
2493 | if (chip->nr_ac97_codecs == 1) { | ||
2494 | unsigned int id2 = chip->ac97[CS46XX_PRIMARY_CODEC_INDEX]->id & 0xffff; | ||
2495 | if (id2 == 0x592b || id2 == 0x592d) { | ||
2496 | err = snd_ctl_add(card, snd_ctl_new1(&snd_cs46xx_front_dup_ctl, chip)); | ||
2497 | if (err < 0) | ||
2498 | return err; | ||
2499 | snd_ac97_write_cache(chip->ac97[CS46XX_PRIMARY_CODEC_INDEX], | ||
2500 | AC97_CSR_ACMODE, 0x200); | ||
2501 | } | ||
2502 | } | ||
2503 | /* do soundcard specific mixer setup */ | ||
2504 | if (chip->mixer_init) { | ||
2505 | snd_printdd ("calling chip->mixer_init(chip);\n"); | ||
2506 | chip->mixer_init(chip); | ||
2507 | } | ||
2508 | #endif | ||
2509 | |||
2510 | /* turn on amplifier */ | ||
2511 | chip->amplifier_ctrl(chip, 1); | ||
2512 | |||
2513 | return 0; | ||
2514 | } | ||
2515 | |||
2516 | /* | ||
2517 | * RawMIDI interface | ||
2518 | */ | ||
2519 | |||
2520 | static void snd_cs46xx_midi_reset(cs46xx_t *chip) | ||
2521 | { | ||
2522 | snd_cs46xx_pokeBA0(chip, BA0_MIDCR, MIDCR_MRST); | ||
2523 | udelay(100); | ||
2524 | snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr); | ||
2525 | } | ||
2526 | |||
2527 | static int snd_cs46xx_midi_input_open(snd_rawmidi_substream_t * substream) | ||
2528 | { | ||
2529 | cs46xx_t *chip = substream->rmidi->private_data; | ||
2530 | |||
2531 | chip->active_ctrl(chip, 1); | ||
2532 | spin_lock_irq(&chip->reg_lock); | ||
2533 | chip->uartm |= CS46XX_MODE_INPUT; | ||
2534 | chip->midcr |= MIDCR_RXE; | ||
2535 | chip->midi_input = substream; | ||
2536 | if (!(chip->uartm & CS46XX_MODE_OUTPUT)) { | ||
2537 | snd_cs46xx_midi_reset(chip); | ||
2538 | } else { | ||
2539 | snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr); | ||
2540 | } | ||
2541 | spin_unlock_irq(&chip->reg_lock); | ||
2542 | return 0; | ||
2543 | } | ||
2544 | |||
2545 | static int snd_cs46xx_midi_input_close(snd_rawmidi_substream_t * substream) | ||
2546 | { | ||
2547 | cs46xx_t *chip = substream->rmidi->private_data; | ||
2548 | |||
2549 | spin_lock_irq(&chip->reg_lock); | ||
2550 | chip->midcr &= ~(MIDCR_RXE | MIDCR_RIE); | ||
2551 | chip->midi_input = NULL; | ||
2552 | if (!(chip->uartm & CS46XX_MODE_OUTPUT)) { | ||
2553 | snd_cs46xx_midi_reset(chip); | ||
2554 | } else { | ||
2555 | snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr); | ||
2556 | } | ||
2557 | chip->uartm &= ~CS46XX_MODE_INPUT; | ||
2558 | spin_unlock_irq(&chip->reg_lock); | ||
2559 | chip->active_ctrl(chip, -1); | ||
2560 | return 0; | ||
2561 | } | ||
2562 | |||
2563 | static int snd_cs46xx_midi_output_open(snd_rawmidi_substream_t * substream) | ||
2564 | { | ||
2565 | cs46xx_t *chip = substream->rmidi->private_data; | ||
2566 | |||
2567 | chip->active_ctrl(chip, 1); | ||
2568 | |||
2569 | spin_lock_irq(&chip->reg_lock); | ||
2570 | chip->uartm |= CS46XX_MODE_OUTPUT; | ||
2571 | chip->midcr |= MIDCR_TXE; | ||
2572 | chip->midi_output = substream; | ||
2573 | if (!(chip->uartm & CS46XX_MODE_INPUT)) { | ||
2574 | snd_cs46xx_midi_reset(chip); | ||
2575 | } else { | ||
2576 | snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr); | ||
2577 | } | ||
2578 | spin_unlock_irq(&chip->reg_lock); | ||
2579 | return 0; | ||
2580 | } | ||
2581 | |||
2582 | static int snd_cs46xx_midi_output_close(snd_rawmidi_substream_t * substream) | ||
2583 | { | ||
2584 | cs46xx_t *chip = substream->rmidi->private_data; | ||
2585 | |||
2586 | spin_lock_irq(&chip->reg_lock); | ||
2587 | chip->midcr &= ~(MIDCR_TXE | MIDCR_TIE); | ||
2588 | chip->midi_output = NULL; | ||
2589 | if (!(chip->uartm & CS46XX_MODE_INPUT)) { | ||
2590 | snd_cs46xx_midi_reset(chip); | ||
2591 | } else { | ||
2592 | snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr); | ||
2593 | } | ||
2594 | chip->uartm &= ~CS46XX_MODE_OUTPUT; | ||
2595 | spin_unlock_irq(&chip->reg_lock); | ||
2596 | chip->active_ctrl(chip, -1); | ||
2597 | return 0; | ||
2598 | } | ||
2599 | |||
2600 | static void snd_cs46xx_midi_input_trigger(snd_rawmidi_substream_t * substream, int up) | ||
2601 | { | ||
2602 | unsigned long flags; | ||
2603 | cs46xx_t *chip = substream->rmidi->private_data; | ||
2604 | |||
2605 | spin_lock_irqsave(&chip->reg_lock, flags); | ||
2606 | if (up) { | ||
2607 | if ((chip->midcr & MIDCR_RIE) == 0) { | ||
2608 | chip->midcr |= MIDCR_RIE; | ||
2609 | snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr); | ||
2610 | } | ||
2611 | } else { | ||
2612 | if (chip->midcr & MIDCR_RIE) { | ||
2613 | chip->midcr &= ~MIDCR_RIE; | ||
2614 | snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr); | ||
2615 | } | ||
2616 | } | ||
2617 | spin_unlock_irqrestore(&chip->reg_lock, flags); | ||
2618 | } | ||
2619 | |||
2620 | static void snd_cs46xx_midi_output_trigger(snd_rawmidi_substream_t * substream, int up) | ||
2621 | { | ||
2622 | unsigned long flags; | ||
2623 | cs46xx_t *chip = substream->rmidi->private_data; | ||
2624 | unsigned char byte; | ||
2625 | |||
2626 | spin_lock_irqsave(&chip->reg_lock, flags); | ||
2627 | if (up) { | ||
2628 | if ((chip->midcr & MIDCR_TIE) == 0) { | ||
2629 | chip->midcr |= MIDCR_TIE; | ||
2630 | /* fill UART FIFO buffer at first, and turn Tx interrupts only if necessary */ | ||
2631 | while ((chip->midcr & MIDCR_TIE) && | ||
2632 | (snd_cs46xx_peekBA0(chip, BA0_MIDSR) & MIDSR_TBF) == 0) { | ||
2633 | if (snd_rawmidi_transmit(substream, &byte, 1) != 1) { | ||
2634 | chip->midcr &= ~MIDCR_TIE; | ||
2635 | } else { | ||
2636 | snd_cs46xx_pokeBA0(chip, BA0_MIDWP, byte); | ||
2637 | } | ||
2638 | } | ||
2639 | snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr); | ||
2640 | } | ||
2641 | } else { | ||
2642 | if (chip->midcr & MIDCR_TIE) { | ||
2643 | chip->midcr &= ~MIDCR_TIE; | ||
2644 | snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr); | ||
2645 | } | ||
2646 | } | ||
2647 | spin_unlock_irqrestore(&chip->reg_lock, flags); | ||
2648 | } | ||
2649 | |||
2650 | static snd_rawmidi_ops_t snd_cs46xx_midi_output = | ||
2651 | { | ||
2652 | .open = snd_cs46xx_midi_output_open, | ||
2653 | .close = snd_cs46xx_midi_output_close, | ||
2654 | .trigger = snd_cs46xx_midi_output_trigger, | ||
2655 | }; | ||
2656 | |||
2657 | static snd_rawmidi_ops_t snd_cs46xx_midi_input = | ||
2658 | { | ||
2659 | .open = snd_cs46xx_midi_input_open, | ||
2660 | .close = snd_cs46xx_midi_input_close, | ||
2661 | .trigger = snd_cs46xx_midi_input_trigger, | ||
2662 | }; | ||
2663 | |||
2664 | int __devinit snd_cs46xx_midi(cs46xx_t *chip, int device, snd_rawmidi_t **rrawmidi) | ||
2665 | { | ||
2666 | snd_rawmidi_t *rmidi; | ||
2667 | int err; | ||
2668 | |||
2669 | if (rrawmidi) | ||
2670 | *rrawmidi = NULL; | ||
2671 | if ((err = snd_rawmidi_new(chip->card, "CS46XX", device, 1, 1, &rmidi)) < 0) | ||
2672 | return err; | ||
2673 | strcpy(rmidi->name, "CS46XX"); | ||
2674 | snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_cs46xx_midi_output); | ||
2675 | snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_cs46xx_midi_input); | ||
2676 | rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT | SNDRV_RAWMIDI_INFO_INPUT | SNDRV_RAWMIDI_INFO_DUPLEX; | ||
2677 | rmidi->private_data = chip; | ||
2678 | chip->rmidi = rmidi; | ||
2679 | if (rrawmidi) | ||
2680 | *rrawmidi = NULL; | ||
2681 | return 0; | ||
2682 | } | ||
2683 | |||
2684 | |||
2685 | /* | ||
2686 | * gameport interface | ||
2687 | */ | ||
2688 | |||
2689 | #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE)) | ||
2690 | |||
2691 | static void snd_cs46xx_gameport_trigger(struct gameport *gameport) | ||
2692 | { | ||
2693 | cs46xx_t *chip = gameport_get_port_data(gameport); | ||
2694 | |||
2695 | snd_assert(chip, return); | ||
2696 | snd_cs46xx_pokeBA0(chip, BA0_JSPT, 0xFF); //outb(gameport->io, 0xFF); | ||
2697 | } | ||
2698 | |||
2699 | static unsigned char snd_cs46xx_gameport_read(struct gameport *gameport) | ||
2700 | { | ||
2701 | cs46xx_t *chip = gameport_get_port_data(gameport); | ||
2702 | |||
2703 | snd_assert(chip, return 0); | ||
2704 | return snd_cs46xx_peekBA0(chip, BA0_JSPT); //inb(gameport->io); | ||
2705 | } | ||
2706 | |||
2707 | static int snd_cs46xx_gameport_cooked_read(struct gameport *gameport, int *axes, int *buttons) | ||
2708 | { | ||
2709 | cs46xx_t *chip = gameport_get_port_data(gameport); | ||
2710 | unsigned js1, js2, jst; | ||
2711 | |||
2712 | snd_assert(chip, return 0); | ||
2713 | |||
2714 | js1 = snd_cs46xx_peekBA0(chip, BA0_JSC1); | ||
2715 | js2 = snd_cs46xx_peekBA0(chip, BA0_JSC2); | ||
2716 | jst = snd_cs46xx_peekBA0(chip, BA0_JSPT); | ||
2717 | |||
2718 | *buttons = (~jst >> 4) & 0x0F; | ||
2719 | |||
2720 | axes[0] = ((js1 & JSC1_Y1V_MASK) >> JSC1_Y1V_SHIFT) & 0xFFFF; | ||
2721 | axes[1] = ((js1 & JSC1_X1V_MASK) >> JSC1_X1V_SHIFT) & 0xFFFF; | ||
2722 | axes[2] = ((js2 & JSC2_Y2V_MASK) >> JSC2_Y2V_SHIFT) & 0xFFFF; | ||
2723 | axes[3] = ((js2 & JSC2_X2V_MASK) >> JSC2_X2V_SHIFT) & 0xFFFF; | ||
2724 | |||
2725 | for(jst=0;jst<4;++jst) | ||
2726 | if(axes[jst]==0xFFFF) axes[jst] = -1; | ||
2727 | return 0; | ||
2728 | } | ||
2729 | |||
2730 | static int snd_cs46xx_gameport_open(struct gameport *gameport, int mode) | ||
2731 | { | ||
2732 | switch (mode) { | ||
2733 | case GAMEPORT_MODE_COOKED: | ||
2734 | return 0; | ||
2735 | case GAMEPORT_MODE_RAW: | ||
2736 | return 0; | ||
2737 | default: | ||
2738 | return -1; | ||
2739 | } | ||
2740 | return 0; | ||
2741 | } | ||
2742 | |||
2743 | int __devinit snd_cs46xx_gameport(cs46xx_t *chip) | ||
2744 | { | ||
2745 | struct gameport *gp; | ||
2746 | |||
2747 | chip->gameport = gp = gameport_allocate_port(); | ||
2748 | if (!gp) { | ||
2749 | printk(KERN_ERR "cs46xx: cannot allocate memory for gameport\n"); | ||
2750 | return -ENOMEM; | ||
2751 | } | ||
2752 | |||
2753 | gameport_set_name(gp, "CS46xx Gameport"); | ||
2754 | gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci)); | ||
2755 | gameport_set_dev_parent(gp, &chip->pci->dev); | ||
2756 | gameport_set_port_data(gp, chip); | ||
2757 | |||
2758 | gp->open = snd_cs46xx_gameport_open; | ||
2759 | gp->read = snd_cs46xx_gameport_read; | ||
2760 | gp->trigger = snd_cs46xx_gameport_trigger; | ||
2761 | gp->cooked_read = snd_cs46xx_gameport_cooked_read; | ||
2762 | |||
2763 | snd_cs46xx_pokeBA0(chip, BA0_JSIO, 0xFF); // ? | ||
2764 | snd_cs46xx_pokeBA0(chip, BA0_JSCTL, JSCTL_SP_MEDIUM_SLOW); | ||
2765 | |||
2766 | gameport_register_port(gp); | ||
2767 | |||
2768 | return 0; | ||
2769 | } | ||
2770 | |||
2771 | static inline void snd_cs46xx_remove_gameport(cs46xx_t *chip) | ||
2772 | { | ||
2773 | if (chip->gameport) { | ||
2774 | gameport_unregister_port(chip->gameport); | ||
2775 | chip->gameport = NULL; | ||
2776 | } | ||
2777 | } | ||
2778 | #else | ||
2779 | int __devinit snd_cs46xx_gameport(cs46xx_t *chip) { return -ENOSYS; } | ||
2780 | static inline void snd_cs46xx_remove_gameport(cs46xx_t *chip) { } | ||
2781 | #endif /* CONFIG_GAMEPORT */ | ||
2782 | |||
2783 | /* | ||
2784 | * proc interface | ||
2785 | */ | ||
2786 | |||
2787 | static long snd_cs46xx_io_read(snd_info_entry_t *entry, void *file_private_data, | ||
2788 | struct file *file, char __user *buf, | ||
2789 | unsigned long count, unsigned long pos) | ||
2790 | { | ||
2791 | long size; | ||
2792 | snd_cs46xx_region_t *region = (snd_cs46xx_region_t *)entry->private_data; | ||
2793 | |||
2794 | size = count; | ||
2795 | if (pos + (size_t)size > region->size) | ||
2796 | size = region->size - pos; | ||
2797 | if (size > 0) { | ||
2798 | if (copy_to_user_fromio(buf, region->remap_addr + pos, size)) | ||
2799 | return -EFAULT; | ||
2800 | } | ||
2801 | return size; | ||
2802 | } | ||
2803 | |||
2804 | static struct snd_info_entry_ops snd_cs46xx_proc_io_ops = { | ||
2805 | .read = snd_cs46xx_io_read, | ||
2806 | }; | ||
2807 | |||
2808 | static int __devinit snd_cs46xx_proc_init(snd_card_t * card, cs46xx_t *chip) | ||
2809 | { | ||
2810 | snd_info_entry_t *entry; | ||
2811 | int idx; | ||
2812 | |||
2813 | for (idx = 0; idx < 5; idx++) { | ||
2814 | snd_cs46xx_region_t *region = &chip->region.idx[idx]; | ||
2815 | if (! snd_card_proc_new(card, region->name, &entry)) { | ||
2816 | entry->content = SNDRV_INFO_CONTENT_DATA; | ||
2817 | entry->private_data = chip; | ||
2818 | entry->c.ops = &snd_cs46xx_proc_io_ops; | ||
2819 | entry->size = region->size; | ||
2820 | entry->mode = S_IFREG | S_IRUSR; | ||
2821 | } | ||
2822 | } | ||
2823 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
2824 | cs46xx_dsp_proc_init(card, chip); | ||
2825 | #endif | ||
2826 | return 0; | ||
2827 | } | ||
2828 | |||
2829 | static int snd_cs46xx_proc_done(cs46xx_t *chip) | ||
2830 | { | ||
2831 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
2832 | cs46xx_dsp_proc_done(chip); | ||
2833 | #endif | ||
2834 | return 0; | ||
2835 | } | ||
2836 | |||
2837 | /* | ||
2838 | * stop the h/w | ||
2839 | */ | ||
2840 | static void snd_cs46xx_hw_stop(cs46xx_t *chip) | ||
2841 | { | ||
2842 | unsigned int tmp; | ||
2843 | |||
2844 | tmp = snd_cs46xx_peek(chip, BA1_PFIE); | ||
2845 | tmp &= ~0x0000f03f; | ||
2846 | tmp |= 0x00000010; | ||
2847 | snd_cs46xx_poke(chip, BA1_PFIE, tmp); /* playback interrupt disable */ | ||
2848 | |||
2849 | tmp = snd_cs46xx_peek(chip, BA1_CIE); | ||
2850 | tmp &= ~0x0000003f; | ||
2851 | tmp |= 0x00000011; | ||
2852 | snd_cs46xx_poke(chip, BA1_CIE, tmp); /* capture interrupt disable */ | ||
2853 | |||
2854 | /* | ||
2855 | * Stop playback DMA. | ||
2856 | */ | ||
2857 | tmp = snd_cs46xx_peek(chip, BA1_PCTL); | ||
2858 | snd_cs46xx_poke(chip, BA1_PCTL, tmp & 0x0000ffff); | ||
2859 | |||
2860 | /* | ||
2861 | * Stop capture DMA. | ||
2862 | */ | ||
2863 | tmp = snd_cs46xx_peek(chip, BA1_CCTL); | ||
2864 | snd_cs46xx_poke(chip, BA1_CCTL, tmp & 0xffff0000); | ||
2865 | |||
2866 | /* | ||
2867 | * Reset the processor. | ||
2868 | */ | ||
2869 | snd_cs46xx_reset(chip); | ||
2870 | |||
2871 | snd_cs46xx_proc_stop(chip); | ||
2872 | |||
2873 | /* | ||
2874 | * Power down the PLL. | ||
2875 | */ | ||
2876 | snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, 0); | ||
2877 | |||
2878 | /* | ||
2879 | * Turn off the Processor by turning off the software clock enable flag in | ||
2880 | * the clock control register. | ||
2881 | */ | ||
2882 | tmp = snd_cs46xx_peekBA0(chip, BA0_CLKCR1) & ~CLKCR1_SWCE; | ||
2883 | snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, tmp); | ||
2884 | } | ||
2885 | |||
2886 | |||
2887 | static int snd_cs46xx_free(cs46xx_t *chip) | ||
2888 | { | ||
2889 | int idx; | ||
2890 | |||
2891 | snd_assert(chip != NULL, return -EINVAL); | ||
2892 | |||
2893 | if (chip->active_ctrl) | ||
2894 | chip->active_ctrl(chip, 1); | ||
2895 | |||
2896 | snd_cs46xx_remove_gameport(chip); | ||
2897 | |||
2898 | if (chip->amplifier_ctrl) | ||
2899 | chip->amplifier_ctrl(chip, -chip->amplifier); /* force to off */ | ||
2900 | |||
2901 | snd_cs46xx_proc_done(chip); | ||
2902 | |||
2903 | if (chip->region.idx[0].resource) | ||
2904 | snd_cs46xx_hw_stop(chip); | ||
2905 | |||
2906 | for (idx = 0; idx < 5; idx++) { | ||
2907 | snd_cs46xx_region_t *region = &chip->region.idx[idx]; | ||
2908 | if (region->remap_addr) | ||
2909 | iounmap(region->remap_addr); | ||
2910 | if (region->resource) { | ||
2911 | release_resource(region->resource); | ||
2912 | kfree_nocheck(region->resource); | ||
2913 | } | ||
2914 | } | ||
2915 | if (chip->irq >= 0) | ||
2916 | free_irq(chip->irq, (void *)chip); | ||
2917 | |||
2918 | if (chip->active_ctrl) | ||
2919 | chip->active_ctrl(chip, -chip->amplifier); | ||
2920 | |||
2921 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
2922 | if (chip->dsp_spos_instance) { | ||
2923 | cs46xx_dsp_spos_destroy(chip); | ||
2924 | chip->dsp_spos_instance = NULL; | ||
2925 | } | ||
2926 | #endif | ||
2927 | |||
2928 | pci_disable_device(chip->pci); | ||
2929 | kfree(chip); | ||
2930 | return 0; | ||
2931 | } | ||
2932 | |||
2933 | static int snd_cs46xx_dev_free(snd_device_t *device) | ||
2934 | { | ||
2935 | cs46xx_t *chip = device->device_data; | ||
2936 | return snd_cs46xx_free(chip); | ||
2937 | } | ||
2938 | |||
2939 | /* | ||
2940 | * initialize chip | ||
2941 | */ | ||
2942 | static int snd_cs46xx_chip_init(cs46xx_t *chip) | ||
2943 | { | ||
2944 | int timeout; | ||
2945 | |||
2946 | /* | ||
2947 | * First, blast the clock control register to zero so that the PLL starts | ||
2948 | * out in a known state, and blast the master serial port control register | ||
2949 | * to zero so that the serial ports also start out in a known state. | ||
2950 | */ | ||
2951 | snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, 0); | ||
2952 | snd_cs46xx_pokeBA0(chip, BA0_SERMC1, 0); | ||
2953 | |||
2954 | /* | ||
2955 | * If we are in AC97 mode, then we must set the part to a host controlled | ||
2956 | * AC-link. Otherwise, we won't be able to bring up the link. | ||
2957 | */ | ||
2958 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
2959 | snd_cs46xx_pokeBA0(chip, BA0_SERACC, SERACC_HSP | SERACC_CHIP_TYPE_2_0 | | ||
2960 | SERACC_TWO_CODECS); /* 2.00 dual codecs */ | ||
2961 | /* snd_cs46xx_pokeBA0(chip, BA0_SERACC, SERACC_HSP | SERACC_CHIP_TYPE_2_0); */ /* 2.00 codec */ | ||
2962 | #else | ||
2963 | snd_cs46xx_pokeBA0(chip, BA0_SERACC, SERACC_HSP | SERACC_CHIP_TYPE_1_03); /* 1.03 codec */ | ||
2964 | #endif | ||
2965 | |||
2966 | /* | ||
2967 | * Drive the ARST# pin low for a minimum of 1uS (as defined in the AC97 | ||
2968 | * spec) and then drive it high. This is done for non AC97 modes since | ||
2969 | * there might be logic external to the CS461x that uses the ARST# line | ||
2970 | * for a reset. | ||
2971 | */ | ||
2972 | snd_cs46xx_pokeBA0(chip, BA0_ACCTL, 0); | ||
2973 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
2974 | snd_cs46xx_pokeBA0(chip, BA0_ACCTL2, 0); | ||
2975 | #endif | ||
2976 | udelay(50); | ||
2977 | snd_cs46xx_pokeBA0(chip, BA0_ACCTL, ACCTL_RSTN); | ||
2978 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
2979 | snd_cs46xx_pokeBA0(chip, BA0_ACCTL2, ACCTL_RSTN); | ||
2980 | #endif | ||
2981 | |||
2982 | /* | ||
2983 | * The first thing we do here is to enable sync generation. As soon | ||
2984 | * as we start receiving bit clock, we'll start producing the SYNC | ||
2985 | * signal. | ||
2986 | */ | ||
2987 | snd_cs46xx_pokeBA0(chip, BA0_ACCTL, ACCTL_ESYN | ACCTL_RSTN); | ||
2988 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
2989 | snd_cs46xx_pokeBA0(chip, BA0_ACCTL2, ACCTL_ESYN | ACCTL_RSTN); | ||
2990 | #endif | ||
2991 | |||
2992 | /* | ||
2993 | * Now wait for a short while to allow the AC97 part to start | ||
2994 | * generating bit clock (so we don't try to start the PLL without an | ||
2995 | * input clock). | ||
2996 | */ | ||
2997 | mdelay(10); | ||
2998 | |||
2999 | /* | ||
3000 | * Set the serial port timing configuration, so that | ||
3001 | * the clock control circuit gets its clock from the correct place. | ||
3002 | */ | ||
3003 | snd_cs46xx_pokeBA0(chip, BA0_SERMC1, SERMC1_PTC_AC97); | ||
3004 | |||
3005 | /* | ||
3006 | * Write the selected clock control setup to the hardware. Do not turn on | ||
3007 | * SWCE yet (if requested), so that the devices clocked by the output of | ||
3008 | * PLL are not clocked until the PLL is stable. | ||
3009 | */ | ||
3010 | snd_cs46xx_pokeBA0(chip, BA0_PLLCC, PLLCC_LPF_1050_2780_KHZ | PLLCC_CDR_73_104_MHZ); | ||
3011 | snd_cs46xx_pokeBA0(chip, BA0_PLLM, 0x3a); | ||
3012 | snd_cs46xx_pokeBA0(chip, BA0_CLKCR2, CLKCR2_PDIVS_8); | ||
3013 | |||
3014 | /* | ||
3015 | * Power up the PLL. | ||
3016 | */ | ||
3017 | snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, CLKCR1_PLLP); | ||
3018 | |||
3019 | /* | ||
3020 | * Wait until the PLL has stabilized. | ||
3021 | */ | ||
3022 | set_current_state(TASK_UNINTERRUPTIBLE); | ||
3023 | schedule_timeout(HZ/10); /* 100ms */ | ||
3024 | |||
3025 | /* | ||
3026 | * Turn on clocking of the core so that we can setup the serial ports. | ||
3027 | */ | ||
3028 | snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, CLKCR1_PLLP | CLKCR1_SWCE); | ||
3029 | |||
3030 | /* | ||
3031 | * Enable FIFO Host Bypass | ||
3032 | */ | ||
3033 | snd_cs46xx_pokeBA0(chip, BA0_SERBCF, SERBCF_HBP); | ||
3034 | |||
3035 | /* | ||
3036 | * Fill the serial port FIFOs with silence. | ||
3037 | */ | ||
3038 | snd_cs46xx_clear_serial_FIFOs(chip); | ||
3039 | |||
3040 | /* | ||
3041 | * Set the serial port FIFO pointer to the first sample in the FIFO. | ||
3042 | */ | ||
3043 | /* snd_cs46xx_pokeBA0(chip, BA0_SERBSP, 0); */ | ||
3044 | |||
3045 | /* | ||
3046 | * Write the serial port configuration to the part. The master | ||
3047 | * enable bit is not set until all other values have been written. | ||
3048 | */ | ||
3049 | snd_cs46xx_pokeBA0(chip, BA0_SERC1, SERC1_SO1F_AC97 | SERC1_SO1EN); | ||
3050 | snd_cs46xx_pokeBA0(chip, BA0_SERC2, SERC2_SI1F_AC97 | SERC1_SO1EN); | ||
3051 | snd_cs46xx_pokeBA0(chip, BA0_SERMC1, SERMC1_PTC_AC97 | SERMC1_MSPE); | ||
3052 | |||
3053 | |||
3054 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
3055 | snd_cs46xx_pokeBA0(chip, BA0_SERC7, SERC7_ASDI2EN); | ||
3056 | snd_cs46xx_pokeBA0(chip, BA0_SERC3, 0); | ||
3057 | snd_cs46xx_pokeBA0(chip, BA0_SERC4, 0); | ||
3058 | snd_cs46xx_pokeBA0(chip, BA0_SERC5, 0); | ||
3059 | snd_cs46xx_pokeBA0(chip, BA0_SERC6, 1); | ||
3060 | #endif | ||
3061 | |||
3062 | mdelay(5); | ||
3063 | |||
3064 | |||
3065 | /* | ||
3066 | * Wait for the codec ready signal from the AC97 codec. | ||
3067 | */ | ||
3068 | timeout = 150; | ||
3069 | while (timeout-- > 0) { | ||
3070 | /* | ||
3071 | * Read the AC97 status register to see if we've seen a CODEC READY | ||
3072 | * signal from the AC97 codec. | ||
3073 | */ | ||
3074 | if (snd_cs46xx_peekBA0(chip, BA0_ACSTS) & ACSTS_CRDY) | ||
3075 | goto ok1; | ||
3076 | set_current_state(TASK_UNINTERRUPTIBLE); | ||
3077 | schedule_timeout((HZ+99)/100); | ||
3078 | } | ||
3079 | |||
3080 | |||
3081 | snd_printk("create - never read codec ready from AC'97\n"); | ||
3082 | snd_printk("it is not probably bug, try to use CS4236 driver\n"); | ||
3083 | return -EIO; | ||
3084 | ok1: | ||
3085 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
3086 | { | ||
3087 | int count; | ||
3088 | for (count = 0; count < 150; count++) { | ||
3089 | /* First, we want to wait for a short time. */ | ||
3090 | udelay(25); | ||
3091 | |||
3092 | if (snd_cs46xx_peekBA0(chip, BA0_ACSTS2) & ACSTS_CRDY) | ||
3093 | break; | ||
3094 | } | ||
3095 | |||
3096 | /* | ||
3097 | * Make sure CODEC is READY. | ||
3098 | */ | ||
3099 | if (!(snd_cs46xx_peekBA0(chip, BA0_ACSTS2) & ACSTS_CRDY)) | ||
3100 | snd_printdd("cs46xx: never read card ready from secondary AC'97\n"); | ||
3101 | } | ||
3102 | #endif | ||
3103 | |||
3104 | /* | ||
3105 | * Assert the vaid frame signal so that we can start sending commands | ||
3106 | * to the AC97 codec. | ||
3107 | */ | ||
3108 | snd_cs46xx_pokeBA0(chip, BA0_ACCTL, ACCTL_VFRM | ACCTL_ESYN | ACCTL_RSTN); | ||
3109 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
3110 | snd_cs46xx_pokeBA0(chip, BA0_ACCTL2, ACCTL_VFRM | ACCTL_ESYN | ACCTL_RSTN); | ||
3111 | #endif | ||
3112 | |||
3113 | |||
3114 | /* | ||
3115 | * Wait until we've sampled input slots 3 and 4 as valid, meaning that | ||
3116 | * the codec is pumping ADC data across the AC-link. | ||
3117 | */ | ||
3118 | timeout = 150; | ||
3119 | while (timeout-- > 0) { | ||
3120 | /* | ||
3121 | * Read the input slot valid register and see if input slots 3 and | ||
3122 | * 4 are valid yet. | ||
3123 | */ | ||
3124 | if ((snd_cs46xx_peekBA0(chip, BA0_ACISV) & (ACISV_ISV3 | ACISV_ISV4)) == (ACISV_ISV3 | ACISV_ISV4)) | ||
3125 | goto ok2; | ||
3126 | set_current_state(TASK_UNINTERRUPTIBLE); | ||
3127 | schedule_timeout((HZ+99)/100); | ||
3128 | } | ||
3129 | |||
3130 | #ifndef CONFIG_SND_CS46XX_NEW_DSP | ||
3131 | snd_printk("create - never read ISV3 & ISV4 from AC'97\n"); | ||
3132 | return -EIO; | ||
3133 | #else | ||
3134 | /* This may happen on a cold boot with a Terratec SiXPack 5.1. | ||
3135 | Reloading the driver may help, if there's other soundcards | ||
3136 | with the same problem I would like to know. (Benny) */ | ||
3137 | |||
3138 | snd_printk("ERROR: snd-cs46xx: never read ISV3 & ISV4 from AC'97\n"); | ||
3139 | snd_printk(" Try reloading the ALSA driver, if you find something\n"); | ||
3140 | snd_printk(" broken or not working on your soundcard upon\n"); | ||
3141 | snd_printk(" this message please report to alsa-devel@lists.sourceforge.net\n"); | ||
3142 | |||
3143 | return -EIO; | ||
3144 | #endif | ||
3145 | ok2: | ||
3146 | |||
3147 | /* | ||
3148 | * Now, assert valid frame and the slot 3 and 4 valid bits. This will | ||
3149 | * commense the transfer of digital audio data to the AC97 codec. | ||
3150 | */ | ||
3151 | |||
3152 | snd_cs46xx_pokeBA0(chip, BA0_ACOSV, ACOSV_SLV3 | ACOSV_SLV4); | ||
3153 | |||
3154 | |||
3155 | /* | ||
3156 | * Power down the DAC and ADC. We will power them up (if) when we need | ||
3157 | * them. | ||
3158 | */ | ||
3159 | /* snd_cs46xx_pokeBA0(chip, BA0_AC97_POWERDOWN, 0x300); */ | ||
3160 | |||
3161 | /* | ||
3162 | * Turn off the Processor by turning off the software clock enable flag in | ||
3163 | * the clock control register. | ||
3164 | */ | ||
3165 | /* tmp = snd_cs46xx_peekBA0(chip, BA0_CLKCR1) & ~CLKCR1_SWCE; */ | ||
3166 | /* snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, tmp); */ | ||
3167 | |||
3168 | return 0; | ||
3169 | } | ||
3170 | |||
3171 | /* | ||
3172 | * start and load DSP | ||
3173 | */ | ||
3174 | int __devinit snd_cs46xx_start_dsp(cs46xx_t *chip) | ||
3175 | { | ||
3176 | unsigned int tmp; | ||
3177 | /* | ||
3178 | * Reset the processor. | ||
3179 | */ | ||
3180 | snd_cs46xx_reset(chip); | ||
3181 | /* | ||
3182 | * Download the image to the processor. | ||
3183 | */ | ||
3184 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
3185 | #if 0 | ||
3186 | if (cs46xx_dsp_load_module(chip, &cwcemb80_module) < 0) { | ||
3187 | snd_printk(KERN_ERR "image download error\n"); | ||
3188 | return -EIO; | ||
3189 | } | ||
3190 | #endif | ||
3191 | |||
3192 | if (cs46xx_dsp_load_module(chip, &cwc4630_module) < 0) { | ||
3193 | snd_printk(KERN_ERR "image download error [cwc4630]\n"); | ||
3194 | return -EIO; | ||
3195 | } | ||
3196 | |||
3197 | if (cs46xx_dsp_load_module(chip, &cwcasync_module) < 0) { | ||
3198 | snd_printk(KERN_ERR "image download error [cwcasync]\n"); | ||
3199 | return -EIO; | ||
3200 | } | ||
3201 | |||
3202 | if (cs46xx_dsp_load_module(chip, &cwcsnoop_module) < 0) { | ||
3203 | snd_printk(KERN_ERR "image download error [cwcsnoop]\n"); | ||
3204 | return -EIO; | ||
3205 | } | ||
3206 | |||
3207 | if (cs46xx_dsp_load_module(chip, &cwcbinhack_module) < 0) { | ||
3208 | snd_printk(KERN_ERR "image download error [cwcbinhack]\n"); | ||
3209 | return -EIO; | ||
3210 | } | ||
3211 | |||
3212 | if (cs46xx_dsp_load_module(chip, &cwcdma_module) < 0) { | ||
3213 | snd_printk(KERN_ERR "image download error [cwcdma]\n"); | ||
3214 | return -EIO; | ||
3215 | } | ||
3216 | |||
3217 | if (cs46xx_dsp_scb_and_task_init(chip) < 0) | ||
3218 | return -EIO; | ||
3219 | #else | ||
3220 | /* old image */ | ||
3221 | if (snd_cs46xx_download_image(chip) < 0) { | ||
3222 | snd_printk("image download error\n"); | ||
3223 | return -EIO; | ||
3224 | } | ||
3225 | |||
3226 | /* | ||
3227 | * Stop playback DMA. | ||
3228 | */ | ||
3229 | tmp = snd_cs46xx_peek(chip, BA1_PCTL); | ||
3230 | chip->play_ctl = tmp & 0xffff0000; | ||
3231 | snd_cs46xx_poke(chip, BA1_PCTL, tmp & 0x0000ffff); | ||
3232 | #endif | ||
3233 | |||
3234 | /* | ||
3235 | * Stop capture DMA. | ||
3236 | */ | ||
3237 | tmp = snd_cs46xx_peek(chip, BA1_CCTL); | ||
3238 | chip->capt.ctl = tmp & 0x0000ffff; | ||
3239 | snd_cs46xx_poke(chip, BA1_CCTL, tmp & 0xffff0000); | ||
3240 | |||
3241 | mdelay(5); | ||
3242 | |||
3243 | snd_cs46xx_set_play_sample_rate(chip, 8000); | ||
3244 | snd_cs46xx_set_capture_sample_rate(chip, 8000); | ||
3245 | |||
3246 | snd_cs46xx_proc_start(chip); | ||
3247 | |||
3248 | /* | ||
3249 | * Enable interrupts on the part. | ||
3250 | */ | ||
3251 | snd_cs46xx_pokeBA0(chip, BA0_HICR, HICR_IEV | HICR_CHGM); | ||
3252 | |||
3253 | tmp = snd_cs46xx_peek(chip, BA1_PFIE); | ||
3254 | tmp &= ~0x0000f03f; | ||
3255 | snd_cs46xx_poke(chip, BA1_PFIE, tmp); /* playback interrupt enable */ | ||
3256 | |||
3257 | tmp = snd_cs46xx_peek(chip, BA1_CIE); | ||
3258 | tmp &= ~0x0000003f; | ||
3259 | tmp |= 0x00000001; | ||
3260 | snd_cs46xx_poke(chip, BA1_CIE, tmp); /* capture interrupt enable */ | ||
3261 | |||
3262 | #ifndef CONFIG_SND_CS46XX_NEW_DSP | ||
3263 | /* set the attenuation to 0dB */ | ||
3264 | snd_cs46xx_poke(chip, BA1_PVOL, 0x80008000); | ||
3265 | snd_cs46xx_poke(chip, BA1_CVOL, 0x80008000); | ||
3266 | #endif | ||
3267 | |||
3268 | return 0; | ||
3269 | } | ||
3270 | |||
3271 | |||
3272 | /* | ||
3273 | * AMP control - null AMP | ||
3274 | */ | ||
3275 | |||
3276 | static void amp_none(cs46xx_t *chip, int change) | ||
3277 | { | ||
3278 | } | ||
3279 | |||
3280 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
3281 | static int voyetra_setup_eapd_slot(cs46xx_t *chip) | ||
3282 | { | ||
3283 | |||
3284 | u32 idx, valid_slots,tmp,powerdown = 0; | ||
3285 | u16 modem_power,pin_config,logic_type; | ||
3286 | |||
3287 | snd_printdd ("cs46xx: cs46xx_setup_eapd_slot()+\n"); | ||
3288 | |||
3289 | /* | ||
3290 | * See if the devices are powered down. If so, we must power them up first | ||
3291 | * or they will not respond. | ||
3292 | */ | ||
3293 | tmp = snd_cs46xx_peekBA0(chip, BA0_CLKCR1); | ||
3294 | |||
3295 | if (!(tmp & CLKCR1_SWCE)) { | ||
3296 | snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, tmp | CLKCR1_SWCE); | ||
3297 | powerdown = 1; | ||
3298 | } | ||
3299 | |||
3300 | /* | ||
3301 | * Clear PRA. The Bonzo chip will be used for GPIO not for modem | ||
3302 | * stuff. | ||
3303 | */ | ||
3304 | if(chip->nr_ac97_codecs != 2) { | ||
3305 | snd_printk (KERN_ERR "cs46xx: cs46xx_setup_eapd_slot() - no secondary codec configured\n"); | ||
3306 | return -EINVAL; | ||
3307 | } | ||
3308 | |||
3309 | modem_power = snd_cs46xx_codec_read (chip, | ||
3310 | AC97_EXTENDED_MSTATUS, | ||
3311 | CS46XX_SECONDARY_CODEC_INDEX); | ||
3312 | modem_power &=0xFEFF; | ||
3313 | |||
3314 | snd_cs46xx_codec_write(chip, | ||
3315 | AC97_EXTENDED_MSTATUS, modem_power, | ||
3316 | CS46XX_SECONDARY_CODEC_INDEX); | ||
3317 | |||
3318 | /* | ||
3319 | * Set GPIO pin's 7 and 8 so that they are configured for output. | ||
3320 | */ | ||
3321 | pin_config = snd_cs46xx_codec_read (chip, | ||
3322 | AC97_GPIO_CFG, | ||
3323 | CS46XX_SECONDARY_CODEC_INDEX); | ||
3324 | pin_config &=0x27F; | ||
3325 | |||
3326 | snd_cs46xx_codec_write(chip, | ||
3327 | AC97_GPIO_CFG, pin_config, | ||
3328 | CS46XX_SECONDARY_CODEC_INDEX); | ||
3329 | |||
3330 | /* | ||
3331 | * Set GPIO pin's 7 and 8 so that they are compatible with CMOS logic. | ||
3332 | */ | ||
3333 | |||
3334 | logic_type = snd_cs46xx_codec_read(chip, AC97_GPIO_POLARITY, | ||
3335 | CS46XX_SECONDARY_CODEC_INDEX); | ||
3336 | logic_type &=0x27F; | ||
3337 | |||
3338 | snd_cs46xx_codec_write (chip, AC97_GPIO_POLARITY, logic_type, | ||
3339 | CS46XX_SECONDARY_CODEC_INDEX); | ||
3340 | |||
3341 | valid_slots = snd_cs46xx_peekBA0(chip, BA0_ACOSV); | ||
3342 | valid_slots |= 0x200; | ||
3343 | snd_cs46xx_pokeBA0(chip, BA0_ACOSV, valid_slots); | ||
3344 | |||
3345 | if ( cs46xx_wait_for_fifo(chip,1) ) { | ||
3346 | snd_printdd("FIFO is busy\n"); | ||
3347 | |||
3348 | return -EINVAL; | ||
3349 | } | ||
3350 | |||
3351 | /* | ||
3352 | * Fill slots 12 with the correct value for the GPIO pins. | ||
3353 | */ | ||
3354 | for(idx = 0x90; idx <= 0x9F; idx++) { | ||
3355 | /* | ||
3356 | * Initialize the fifo so that bits 7 and 8 are on. | ||
3357 | * | ||
3358 | * Remember that the GPIO pins in bonzo are shifted by 4 bits to | ||
3359 | * the left. 0x1800 corresponds to bits 7 and 8. | ||
3360 | */ | ||
3361 | snd_cs46xx_pokeBA0(chip, BA0_SERBWP, 0x1800); | ||
3362 | |||
3363 | /* | ||
3364 | * Wait for command to complete | ||
3365 | */ | ||
3366 | if ( cs46xx_wait_for_fifo(chip,200) ) { | ||
3367 | snd_printdd("failed waiting for FIFO at addr (%02X)\n",idx); | ||
3368 | |||
3369 | return -EINVAL; | ||
3370 | } | ||
3371 | |||
3372 | /* | ||
3373 | * Write the serial port FIFO index. | ||
3374 | */ | ||
3375 | snd_cs46xx_pokeBA0(chip, BA0_SERBAD, idx); | ||
3376 | |||
3377 | /* | ||
3378 | * Tell the serial port to load the new value into the FIFO location. | ||
3379 | */ | ||
3380 | snd_cs46xx_pokeBA0(chip, BA0_SERBCM, SERBCM_WRC); | ||
3381 | } | ||
3382 | |||
3383 | /* wait for last command to complete */ | ||
3384 | cs46xx_wait_for_fifo(chip,200); | ||
3385 | |||
3386 | /* | ||
3387 | * Now, if we powered up the devices, then power them back down again. | ||
3388 | * This is kinda ugly, but should never happen. | ||
3389 | */ | ||
3390 | if (powerdown) | ||
3391 | snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, tmp); | ||
3392 | |||
3393 | return 0; | ||
3394 | } | ||
3395 | #endif | ||
3396 | |||
3397 | /* | ||
3398 | * Crystal EAPD mode | ||
3399 | */ | ||
3400 | |||
3401 | static void amp_voyetra(cs46xx_t *chip, int change) | ||
3402 | { | ||
3403 | /* Manage the EAPD bit on the Crystal 4297 | ||
3404 | and the Analog AD1885 */ | ||
3405 | |||
3406 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
3407 | int old = chip->amplifier; | ||
3408 | #endif | ||
3409 | int oval, val; | ||
3410 | |||
3411 | chip->amplifier += change; | ||
3412 | oval = snd_cs46xx_codec_read(chip, AC97_POWERDOWN, | ||
3413 | CS46XX_PRIMARY_CODEC_INDEX); | ||
3414 | val = oval; | ||
3415 | if (chip->amplifier) { | ||
3416 | /* Turn the EAPD amp on */ | ||
3417 | val |= 0x8000; | ||
3418 | } else { | ||
3419 | /* Turn the EAPD amp off */ | ||
3420 | val &= ~0x8000; | ||
3421 | } | ||
3422 | if (val != oval) { | ||
3423 | snd_cs46xx_codec_write(chip, AC97_POWERDOWN, val, | ||
3424 | CS46XX_PRIMARY_CODEC_INDEX); | ||
3425 | if (chip->eapd_switch) | ||
3426 | snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, | ||
3427 | &chip->eapd_switch->id); | ||
3428 | } | ||
3429 | |||
3430 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
3431 | if (chip->amplifier && !old) { | ||
3432 | voyetra_setup_eapd_slot(chip); | ||
3433 | } | ||
3434 | #endif | ||
3435 | } | ||
3436 | |||
3437 | static void hercules_init(cs46xx_t *chip) | ||
3438 | { | ||
3439 | /* default: AMP off, and SPDIF input optical */ | ||
3440 | snd_cs46xx_pokeBA0(chip, BA0_EGPIODR, EGPIODR_GPOE0); | ||
3441 | snd_cs46xx_pokeBA0(chip, BA0_EGPIOPTR, EGPIODR_GPOE0); | ||
3442 | } | ||
3443 | |||
3444 | |||
3445 | /* | ||
3446 | * Game Theatre XP card - EGPIO[2] is used to enable the external amp. | ||
3447 | */ | ||
3448 | static void amp_hercules(cs46xx_t *chip, int change) | ||
3449 | { | ||
3450 | int old = chip->amplifier; | ||
3451 | int val1 = snd_cs46xx_peekBA0(chip, BA0_EGPIODR); | ||
3452 | int val2 = snd_cs46xx_peekBA0(chip, BA0_EGPIOPTR); | ||
3453 | |||
3454 | chip->amplifier += change; | ||
3455 | if (chip->amplifier && !old) { | ||
3456 | snd_printdd ("Hercules amplifier ON\n"); | ||
3457 | |||
3458 | snd_cs46xx_pokeBA0(chip, BA0_EGPIODR, | ||
3459 | EGPIODR_GPOE2 | val1); /* enable EGPIO2 output */ | ||
3460 | snd_cs46xx_pokeBA0(chip, BA0_EGPIOPTR, | ||
3461 | EGPIOPTR_GPPT2 | val2); /* open-drain on output */ | ||
3462 | } else if (old && !chip->amplifier) { | ||
3463 | snd_printdd ("Hercules amplifier OFF\n"); | ||
3464 | snd_cs46xx_pokeBA0(chip, BA0_EGPIODR, val1 & ~EGPIODR_GPOE2); /* disable */ | ||
3465 | snd_cs46xx_pokeBA0(chip, BA0_EGPIOPTR, val2 & ~EGPIOPTR_GPPT2); /* disable */ | ||
3466 | } | ||
3467 | } | ||
3468 | |||
3469 | static void voyetra_mixer_init (cs46xx_t *chip) | ||
3470 | { | ||
3471 | snd_printdd ("initializing Voyetra mixer\n"); | ||
3472 | |||
3473 | /* Enable SPDIF out */ | ||
3474 | snd_cs46xx_pokeBA0(chip, BA0_EGPIODR, EGPIODR_GPOE0); | ||
3475 | snd_cs46xx_pokeBA0(chip, BA0_EGPIOPTR, EGPIODR_GPOE0); | ||
3476 | } | ||
3477 | |||
3478 | static void hercules_mixer_init (cs46xx_t *chip) | ||
3479 | { | ||
3480 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
3481 | unsigned int idx; | ||
3482 | int err; | ||
3483 | snd_card_t *card = chip->card; | ||
3484 | #endif | ||
3485 | |||
3486 | /* set EGPIO to default */ | ||
3487 | hercules_init(chip); | ||
3488 | |||
3489 | snd_printdd ("initializing Hercules mixer\n"); | ||
3490 | |||
3491 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
3492 | for (idx = 0 ; idx < ARRAY_SIZE(snd_hercules_controls); idx++) { | ||
3493 | snd_kcontrol_t *kctl; | ||
3494 | |||
3495 | kctl = snd_ctl_new1(&snd_hercules_controls[idx], chip); | ||
3496 | if ((err = snd_ctl_add(card, kctl)) < 0) { | ||
3497 | printk (KERN_ERR "cs46xx: failed to initialize Hercules mixer (%d)\n",err); | ||
3498 | break; | ||
3499 | } | ||
3500 | } | ||
3501 | #endif | ||
3502 | } | ||
3503 | |||
3504 | |||
3505 | #if 0 | ||
3506 | /* | ||
3507 | * Untested | ||
3508 | */ | ||
3509 | |||
3510 | static void amp_voyetra_4294(cs46xx_t *chip, int change) | ||
3511 | { | ||
3512 | chip->amplifier += change; | ||
3513 | |||
3514 | if (chip->amplifier) { | ||
3515 | /* Switch the GPIO pins 7 and 8 to open drain */ | ||
3516 | snd_cs46xx_codec_write(chip, 0x4C, | ||
3517 | snd_cs46xx_codec_read(chip, 0x4C) & 0xFE7F); | ||
3518 | snd_cs46xx_codec_write(chip, 0x4E, | ||
3519 | snd_cs46xx_codec_read(chip, 0x4E) | 0x0180); | ||
3520 | /* Now wake the AMP (this might be backwards) */ | ||
3521 | snd_cs46xx_codec_write(chip, 0x54, | ||
3522 | snd_cs46xx_codec_read(chip, 0x54) & ~0x0180); | ||
3523 | } else { | ||
3524 | snd_cs46xx_codec_write(chip, 0x54, | ||
3525 | snd_cs46xx_codec_read(chip, 0x54) | 0x0180); | ||
3526 | } | ||
3527 | } | ||
3528 | #endif | ||
3529 | |||
3530 | |||
3531 | /* | ||
3532 | * piix4 pci ids | ||
3533 | */ | ||
3534 | #ifndef PCI_VENDOR_ID_INTEL | ||
3535 | #define PCI_VENDOR_ID_INTEL 0x8086 | ||
3536 | #endif /* PCI_VENDOR_ID_INTEL */ | ||
3537 | |||
3538 | #ifndef PCI_DEVICE_ID_INTEL_82371AB_3 | ||
3539 | #define PCI_DEVICE_ID_INTEL_82371AB_3 0x7113 | ||
3540 | #endif /* PCI_DEVICE_ID_INTEL_82371AB_3 */ | ||
3541 | |||
3542 | /* | ||
3543 | * Handle the CLKRUN on a thinkpad. We must disable CLKRUN support | ||
3544 | * whenever we need to beat on the chip. | ||
3545 | * | ||
3546 | * The original idea and code for this hack comes from David Kaiser at | ||
3547 | * Linuxcare. Perhaps one day Crystal will document their chips well | ||
3548 | * enough to make them useful. | ||
3549 | */ | ||
3550 | |||
3551 | static void clkrun_hack(cs46xx_t *chip, int change) | ||
3552 | { | ||
3553 | u16 control, nval; | ||
3554 | |||
3555 | if (chip->acpi_dev == NULL) | ||
3556 | return; | ||
3557 | |||
3558 | chip->amplifier += change; | ||
3559 | |||
3560 | /* Read ACPI port */ | ||
3561 | nval = control = inw(chip->acpi_port + 0x10); | ||
3562 | |||
3563 | /* Flip CLKRUN off while running */ | ||
3564 | if (! chip->amplifier) | ||
3565 | nval |= 0x2000; | ||
3566 | else | ||
3567 | nval &= ~0x2000; | ||
3568 | if (nval != control) | ||
3569 | outw(nval, chip->acpi_port + 0x10); | ||
3570 | } | ||
3571 | |||
3572 | |||
3573 | /* | ||
3574 | * detect intel piix4 | ||
3575 | */ | ||
3576 | static void clkrun_init(cs46xx_t *chip) | ||
3577 | { | ||
3578 | u8 pp; | ||
3579 | |||
3580 | chip->acpi_dev = pci_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3, NULL); | ||
3581 | if (chip->acpi_dev == NULL) | ||
3582 | return; /* Not a thinkpad thats for sure */ | ||
3583 | |||
3584 | /* Find the control port */ | ||
3585 | pci_read_config_byte(chip->acpi_dev, 0x41, &pp); | ||
3586 | chip->acpi_port = pp << 8; | ||
3587 | } | ||
3588 | |||
3589 | |||
3590 | /* | ||
3591 | * Card subid table | ||
3592 | */ | ||
3593 | |||
3594 | struct cs_card_type | ||
3595 | { | ||
3596 | u16 vendor; | ||
3597 | u16 id; | ||
3598 | char *name; | ||
3599 | void (*init)(cs46xx_t *); | ||
3600 | void (*amp)(cs46xx_t *, int); | ||
3601 | void (*active)(cs46xx_t *, int); | ||
3602 | void (*mixer_init)(cs46xx_t *); | ||
3603 | }; | ||
3604 | |||
3605 | static struct cs_card_type __devinitdata cards[] = { | ||
3606 | { | ||
3607 | .vendor = 0x1489, | ||
3608 | .id = 0x7001, | ||
3609 | .name = "Genius Soundmaker 128 value", | ||
3610 | /* nothing special */ | ||
3611 | }, | ||
3612 | { | ||
3613 | .vendor = 0x5053, | ||
3614 | .id = 0x3357, | ||
3615 | .name = "Voyetra", | ||
3616 | .amp = amp_voyetra, | ||
3617 | .mixer_init = voyetra_mixer_init, | ||
3618 | }, | ||
3619 | { | ||
3620 | .vendor = 0x1071, | ||
3621 | .id = 0x6003, | ||
3622 | .name = "Mitac MI6020/21", | ||
3623 | .amp = amp_voyetra, | ||
3624 | }, | ||
3625 | { | ||
3626 | .vendor = 0x14AF, | ||
3627 | .id = 0x0050, | ||
3628 | .name = "Hercules Game Theatre XP", | ||
3629 | .amp = amp_hercules, | ||
3630 | .mixer_init = hercules_mixer_init, | ||
3631 | }, | ||
3632 | { | ||
3633 | .vendor = 0x1681, | ||
3634 | .id = 0x0050, | ||
3635 | .name = "Hercules Game Theatre XP", | ||
3636 | .amp = amp_hercules, | ||
3637 | .mixer_init = hercules_mixer_init, | ||
3638 | }, | ||
3639 | { | ||
3640 | .vendor = 0x1681, | ||
3641 | .id = 0x0051, | ||
3642 | .name = "Hercules Game Theatre XP", | ||
3643 | .amp = amp_hercules, | ||
3644 | .mixer_init = hercules_mixer_init, | ||
3645 | |||
3646 | }, | ||
3647 | { | ||
3648 | .vendor = 0x1681, | ||
3649 | .id = 0x0052, | ||
3650 | .name = "Hercules Game Theatre XP", | ||
3651 | .amp = amp_hercules, | ||
3652 | .mixer_init = hercules_mixer_init, | ||
3653 | }, | ||
3654 | { | ||
3655 | .vendor = 0x1681, | ||
3656 | .id = 0x0053, | ||
3657 | .name = "Hercules Game Theatre XP", | ||
3658 | .amp = amp_hercules, | ||
3659 | .mixer_init = hercules_mixer_init, | ||
3660 | }, | ||
3661 | { | ||
3662 | .vendor = 0x1681, | ||
3663 | .id = 0x0054, | ||
3664 | .name = "Hercules Game Theatre XP", | ||
3665 | .amp = amp_hercules, | ||
3666 | .mixer_init = hercules_mixer_init, | ||
3667 | }, | ||
3668 | /* Teratec */ | ||
3669 | { | ||
3670 | .vendor = 0x153b, | ||
3671 | .id = 0x1136, | ||
3672 | .name = "Terratec SiXPack 5.1", | ||
3673 | }, | ||
3674 | /* Not sure if the 570 needs the clkrun hack */ | ||
3675 | { | ||
3676 | .vendor = PCI_VENDOR_ID_IBM, | ||
3677 | .id = 0x0132, | ||
3678 | .name = "Thinkpad 570", | ||
3679 | .init = clkrun_init, | ||
3680 | .active = clkrun_hack, | ||
3681 | }, | ||
3682 | { | ||
3683 | .vendor = PCI_VENDOR_ID_IBM, | ||
3684 | .id = 0x0153, | ||
3685 | .name = "Thinkpad 600X/A20/T20", | ||
3686 | .init = clkrun_init, | ||
3687 | .active = clkrun_hack, | ||
3688 | }, | ||
3689 | { | ||
3690 | .vendor = PCI_VENDOR_ID_IBM, | ||
3691 | .id = 0x1010, | ||
3692 | .name = "Thinkpad 600E (unsupported)", | ||
3693 | }, | ||
3694 | {} /* terminator */ | ||
3695 | }; | ||
3696 | |||
3697 | |||
3698 | /* | ||
3699 | * APM support | ||
3700 | */ | ||
3701 | #ifdef CONFIG_PM | ||
3702 | static int snd_cs46xx_suspend(snd_card_t *card, pm_message_t state) | ||
3703 | { | ||
3704 | cs46xx_t *chip = card->pm_private_data; | ||
3705 | int amp_saved; | ||
3706 | |||
3707 | snd_pcm_suspend_all(chip->pcm); | ||
3708 | // chip->ac97_powerdown = snd_cs46xx_codec_read(chip, AC97_POWER_CONTROL); | ||
3709 | // chip->ac97_general_purpose = snd_cs46xx_codec_read(chip, BA0_AC97_GENERAL_PURPOSE); | ||
3710 | |||
3711 | snd_ac97_suspend(chip->ac97[CS46XX_PRIMARY_CODEC_INDEX]); | ||
3712 | if (chip->ac97[CS46XX_SECONDARY_CODEC_INDEX]) | ||
3713 | snd_ac97_suspend(chip->ac97[CS46XX_SECONDARY_CODEC_INDEX]); | ||
3714 | |||
3715 | amp_saved = chip->amplifier; | ||
3716 | /* turn off amp */ | ||
3717 | chip->amplifier_ctrl(chip, -chip->amplifier); | ||
3718 | snd_cs46xx_hw_stop(chip); | ||
3719 | /* disable CLKRUN */ | ||
3720 | chip->active_ctrl(chip, -chip->amplifier); | ||
3721 | chip->amplifier = amp_saved; /* restore the status */ | ||
3722 | pci_disable_device(chip->pci); | ||
3723 | return 0; | ||
3724 | } | ||
3725 | |||
3726 | static int snd_cs46xx_resume(snd_card_t *card) | ||
3727 | { | ||
3728 | cs46xx_t *chip = card->pm_private_data; | ||
3729 | int amp_saved; | ||
3730 | |||
3731 | pci_enable_device(chip->pci); | ||
3732 | pci_set_master(chip->pci); | ||
3733 | amp_saved = chip->amplifier; | ||
3734 | chip->amplifier = 0; | ||
3735 | chip->active_ctrl(chip, 1); /* force to on */ | ||
3736 | |||
3737 | snd_cs46xx_chip_init(chip); | ||
3738 | |||
3739 | #if 0 | ||
3740 | snd_cs46xx_codec_write(chip, BA0_AC97_GENERAL_PURPOSE, | ||
3741 | chip->ac97_general_purpose); | ||
3742 | snd_cs46xx_codec_write(chip, AC97_POWER_CONTROL, | ||
3743 | chip->ac97_powerdown); | ||
3744 | mdelay(10); | ||
3745 | snd_cs46xx_codec_write(chip, BA0_AC97_POWERDOWN, | ||
3746 | chip->ac97_powerdown); | ||
3747 | mdelay(5); | ||
3748 | #endif | ||
3749 | |||
3750 | snd_ac97_resume(chip->ac97[CS46XX_PRIMARY_CODEC_INDEX]); | ||
3751 | if (chip->ac97[CS46XX_SECONDARY_CODEC_INDEX]) | ||
3752 | snd_ac97_resume(chip->ac97[CS46XX_SECONDARY_CODEC_INDEX]); | ||
3753 | |||
3754 | if (amp_saved) | ||
3755 | chip->amplifier_ctrl(chip, 1); /* turn amp on */ | ||
3756 | else | ||
3757 | chip->active_ctrl(chip, -1); /* disable CLKRUN */ | ||
3758 | chip->amplifier = amp_saved; | ||
3759 | return 0; | ||
3760 | } | ||
3761 | #endif /* CONFIG_PM */ | ||
3762 | |||
3763 | |||
3764 | /* | ||
3765 | */ | ||
3766 | |||
3767 | int __devinit snd_cs46xx_create(snd_card_t * card, | ||
3768 | struct pci_dev * pci, | ||
3769 | int external_amp, int thinkpad, | ||
3770 | cs46xx_t ** rchip) | ||
3771 | { | ||
3772 | cs46xx_t *chip; | ||
3773 | int err, idx; | ||
3774 | snd_cs46xx_region_t *region; | ||
3775 | struct cs_card_type *cp; | ||
3776 | u16 ss_card, ss_vendor; | ||
3777 | static snd_device_ops_t ops = { | ||
3778 | .dev_free = snd_cs46xx_dev_free, | ||
3779 | }; | ||
3780 | |||
3781 | *rchip = NULL; | ||
3782 | |||
3783 | /* enable PCI device */ | ||
3784 | if ((err = pci_enable_device(pci)) < 0) | ||
3785 | return err; | ||
3786 | |||
3787 | chip = kcalloc(1, sizeof(*chip), GFP_KERNEL); | ||
3788 | if (chip == NULL) { | ||
3789 | pci_disable_device(pci); | ||
3790 | return -ENOMEM; | ||
3791 | } | ||
3792 | spin_lock_init(&chip->reg_lock); | ||
3793 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
3794 | init_MUTEX(&chip->spos_mutex); | ||
3795 | #endif | ||
3796 | chip->card = card; | ||
3797 | chip->pci = pci; | ||
3798 | chip->irq = -1; | ||
3799 | chip->ba0_addr = pci_resource_start(pci, 0); | ||
3800 | chip->ba1_addr = pci_resource_start(pci, 1); | ||
3801 | if (chip->ba0_addr == 0 || chip->ba0_addr == (unsigned long)~0 || | ||
3802 | chip->ba1_addr == 0 || chip->ba1_addr == (unsigned long)~0) { | ||
3803 | snd_printk("wrong address(es) - ba0 = 0x%lx, ba1 = 0x%lx\n", chip->ba0_addr, chip->ba1_addr); | ||
3804 | snd_cs46xx_free(chip); | ||
3805 | return -ENOMEM; | ||
3806 | } | ||
3807 | |||
3808 | region = &chip->region.name.ba0; | ||
3809 | strcpy(region->name, "CS46xx_BA0"); | ||
3810 | region->base = chip->ba0_addr; | ||
3811 | region->size = CS46XX_BA0_SIZE; | ||
3812 | |||
3813 | region = &chip->region.name.data0; | ||
3814 | strcpy(region->name, "CS46xx_BA1_data0"); | ||
3815 | region->base = chip->ba1_addr + BA1_SP_DMEM0; | ||
3816 | region->size = CS46XX_BA1_DATA0_SIZE; | ||
3817 | |||
3818 | region = &chip->region.name.data1; | ||
3819 | strcpy(region->name, "CS46xx_BA1_data1"); | ||
3820 | region->base = chip->ba1_addr + BA1_SP_DMEM1; | ||
3821 | region->size = CS46XX_BA1_DATA1_SIZE; | ||
3822 | |||
3823 | region = &chip->region.name.pmem; | ||
3824 | strcpy(region->name, "CS46xx_BA1_pmem"); | ||
3825 | region->base = chip->ba1_addr + BA1_SP_PMEM; | ||
3826 | region->size = CS46XX_BA1_PRG_SIZE; | ||
3827 | |||
3828 | region = &chip->region.name.reg; | ||
3829 | strcpy(region->name, "CS46xx_BA1_reg"); | ||
3830 | region->base = chip->ba1_addr + BA1_SP_REG; | ||
3831 | region->size = CS46XX_BA1_REG_SIZE; | ||
3832 | |||
3833 | /* set up amp and clkrun hack */ | ||
3834 | pci_read_config_word(pci, PCI_SUBSYSTEM_VENDOR_ID, &ss_vendor); | ||
3835 | pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &ss_card); | ||
3836 | |||
3837 | for (cp = &cards[0]; cp->name; cp++) { | ||
3838 | if (cp->vendor == ss_vendor && cp->id == ss_card) { | ||
3839 | snd_printdd ("hack for %s enabled\n", cp->name); | ||
3840 | |||
3841 | chip->amplifier_ctrl = cp->amp; | ||
3842 | chip->active_ctrl = cp->active; | ||
3843 | chip->mixer_init = cp->mixer_init; | ||
3844 | |||
3845 | if (cp->init) | ||
3846 | cp->init(chip); | ||
3847 | break; | ||
3848 | } | ||
3849 | } | ||
3850 | |||
3851 | if (external_amp) { | ||
3852 | snd_printk("Crystal EAPD support forced on.\n"); | ||
3853 | chip->amplifier_ctrl = amp_voyetra; | ||
3854 | } | ||
3855 | |||
3856 | if (thinkpad) { | ||
3857 | snd_printk("Activating CLKRUN hack for Thinkpad.\n"); | ||
3858 | chip->active_ctrl = clkrun_hack; | ||
3859 | clkrun_init(chip); | ||
3860 | } | ||
3861 | |||
3862 | if (chip->amplifier_ctrl == NULL) | ||
3863 | chip->amplifier_ctrl = amp_none; | ||
3864 | if (chip->active_ctrl == NULL) | ||
3865 | chip->active_ctrl = amp_none; | ||
3866 | |||
3867 | chip->active_ctrl(chip, 1); /* enable CLKRUN */ | ||
3868 | |||
3869 | pci_set_master(pci); | ||
3870 | |||
3871 | for (idx = 0; idx < 5; idx++) { | ||
3872 | region = &chip->region.idx[idx]; | ||
3873 | if ((region->resource = request_mem_region(region->base, region->size, region->name)) == NULL) { | ||
3874 | snd_printk("unable to request memory region 0x%lx-0x%lx\n", region->base, region->base + region->size - 1); | ||
3875 | snd_cs46xx_free(chip); | ||
3876 | return -EBUSY; | ||
3877 | } | ||
3878 | region->remap_addr = ioremap_nocache(region->base, region->size); | ||
3879 | if (region->remap_addr == NULL) { | ||
3880 | snd_printk("%s ioremap problem\n", region->name); | ||
3881 | snd_cs46xx_free(chip); | ||
3882 | return -ENOMEM; | ||
3883 | } | ||
3884 | } | ||
3885 | |||
3886 | if (request_irq(pci->irq, snd_cs46xx_interrupt, SA_INTERRUPT|SA_SHIRQ, "CS46XX", (void *) chip)) { | ||
3887 | snd_printk("unable to grab IRQ %d\n", pci->irq); | ||
3888 | snd_cs46xx_free(chip); | ||
3889 | return -EBUSY; | ||
3890 | } | ||
3891 | chip->irq = pci->irq; | ||
3892 | |||
3893 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
3894 | chip->dsp_spos_instance = cs46xx_dsp_spos_create(chip); | ||
3895 | if (chip->dsp_spos_instance == NULL) { | ||
3896 | snd_cs46xx_free(chip); | ||
3897 | return -ENOMEM; | ||
3898 | } | ||
3899 | #endif | ||
3900 | |||
3901 | err = snd_cs46xx_chip_init(chip); | ||
3902 | if (err < 0) { | ||
3903 | snd_cs46xx_free(chip); | ||
3904 | return err; | ||
3905 | } | ||
3906 | |||
3907 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { | ||
3908 | snd_cs46xx_free(chip); | ||
3909 | return err; | ||
3910 | } | ||
3911 | |||
3912 | snd_cs46xx_proc_init(card, chip); | ||
3913 | |||
3914 | snd_card_set_pm_callback(card, snd_cs46xx_suspend, snd_cs46xx_resume, chip); | ||
3915 | |||
3916 | chip->active_ctrl(chip, -1); /* disable CLKRUN */ | ||
3917 | |||
3918 | snd_card_set_dev(card, &pci->dev); | ||
3919 | |||
3920 | *rchip = chip; | ||
3921 | return 0; | ||
3922 | } | ||
diff --git a/sound/pci/cs46xx/cs46xx_lib.h b/sound/pci/cs46xx/cs46xx_lib.h new file mode 100644 index 000000000000..d7bec096d247 --- /dev/null +++ b/sound/pci/cs46xx/cs46xx_lib.h | |||
@@ -0,0 +1,182 @@ | |||
1 | /* | ||
2 | * The driver for the Cirrus Logic's Sound Fusion CS46XX based soundcards | ||
3 | * Copyright (c) by Jaroslav Kysela <perex@suse.cz> | ||
4 | * | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | * | ||
20 | */ | ||
21 | |||
22 | #ifndef __CS46XX_LIB_H__ | ||
23 | #define __CS46XX_LIB_H__ | ||
24 | |||
25 | /* | ||
26 | * constants | ||
27 | */ | ||
28 | |||
29 | #define CS46XX_BA0_SIZE 0x1000 | ||
30 | #define CS46XX_BA1_DATA0_SIZE 0x3000 | ||
31 | #define CS46XX_BA1_DATA1_SIZE 0x3800 | ||
32 | #define CS46XX_BA1_PRG_SIZE 0x7000 | ||
33 | #define CS46XX_BA1_REG_SIZE 0x0100 | ||
34 | |||
35 | |||
36 | |||
37 | #ifdef CONFIG_SND_CS46XX_NEW_DSP | ||
38 | #define CS46XX_MIN_PERIOD_SIZE 1 | ||
39 | #define CS46XX_MAX_PERIOD_SIZE 1024*1024 | ||
40 | #else | ||
41 | #define CS46XX_MIN_PERIOD_SIZE 2048 | ||
42 | #define CS46XX_MAX_PERIOD_SIZE 2048 | ||
43 | #endif | ||
44 | |||
45 | #define CS46XX_FRAGS 2 | ||
46 | /* #define CS46XX_BUFFER_SIZE CS46XX_MAX_PERIOD_SIZE * CS46XX_FRAGS */ | ||
47 | |||
48 | #define SCB_NO_PARENT 0 | ||
49 | #define SCB_ON_PARENT_NEXT_SCB 1 | ||
50 | #define SCB_ON_PARENT_SUBLIST_SCB 2 | ||
51 | |||
52 | /* 3*1024 parameter, 3.5*1024 sample, 2*3.5*1024 code */ | ||
53 | #define BA1_DWORD_SIZE (13 * 1024 + 512) | ||
54 | #define BA1_MEMORY_COUNT 3 | ||
55 | |||
56 | /* | ||
57 | * common I/O routines | ||
58 | */ | ||
59 | |||
60 | static inline void snd_cs46xx_poke(cs46xx_t *chip, unsigned long reg, unsigned int val) | ||
61 | { | ||
62 | unsigned int bank = reg >> 16; | ||
63 | unsigned int offset = reg & 0xffff; | ||
64 | |||
65 | /*if (bank == 0) printk("snd_cs46xx_poke: %04X - %08X\n",reg >> 2,val); */ | ||
66 | writel(val, chip->region.idx[bank+1].remap_addr + offset); | ||
67 | } | ||
68 | |||
69 | static inline unsigned int snd_cs46xx_peek(cs46xx_t *chip, unsigned long reg) | ||
70 | { | ||
71 | unsigned int bank = reg >> 16; | ||
72 | unsigned int offset = reg & 0xffff; | ||
73 | return readl(chip->region.idx[bank+1].remap_addr + offset); | ||
74 | } | ||
75 | |||
76 | static inline void snd_cs46xx_pokeBA0(cs46xx_t *chip, unsigned long offset, unsigned int val) | ||
77 | { | ||
78 | writel(val, chip->region.name.ba0.remap_addr + offset); | ||
79 | } | ||
80 | |||
81 | static inline unsigned int snd_cs46xx_peekBA0(cs46xx_t *chip, unsigned long offset) | ||
82 | { | ||
83 | return readl(chip->region.name.ba0.remap_addr + offset); | ||
84 | } | ||
85 | |||
86 | dsp_spos_instance_t * cs46xx_dsp_spos_create (cs46xx_t * chip); | ||
87 | void cs46xx_dsp_spos_destroy (cs46xx_t * chip); | ||
88 | int cs46xx_dsp_load_module (cs46xx_t * chip,dsp_module_desc_t * module); | ||
89 | symbol_entry_t * cs46xx_dsp_lookup_symbol (cs46xx_t * chip,char * symbol_name,int symbol_type); | ||
90 | int cs46xx_dsp_proc_init (snd_card_t * card, cs46xx_t *chip); | ||
91 | int cs46xx_dsp_proc_done (cs46xx_t *chip); | ||
92 | int cs46xx_dsp_scb_and_task_init (cs46xx_t *chip); | ||
93 | int snd_cs46xx_download (cs46xx_t *chip,u32 *src,unsigned long offset, | ||
94 | unsigned long len); | ||
95 | int snd_cs46xx_clear_BA1(cs46xx_t *chip,unsigned long offset,unsigned long len); | ||
96 | int cs46xx_dsp_enable_spdif_out (cs46xx_t *chip); | ||
97 | int cs46xx_dsp_enable_spdif_hw (cs46xx_t *chip); | ||
98 | int cs46xx_dsp_disable_spdif_out (cs46xx_t *chip); | ||
99 | int cs46xx_dsp_enable_spdif_in (cs46xx_t *chip); | ||
100 | int cs46xx_dsp_disable_spdif_in (cs46xx_t *chip); | ||
101 | int cs46xx_dsp_enable_pcm_capture (cs46xx_t *chip); | ||
102 | int cs46xx_dsp_disable_pcm_capture (cs46xx_t *chip); | ||
103 | int cs46xx_dsp_enable_adc_capture (cs46xx_t *chip); | ||
104 | int cs46xx_dsp_disable_adc_capture (cs46xx_t *chip); | ||
105 | int cs46xx_poke_via_dsp (cs46xx_t *chip,u32 address,u32 data); | ||
106 | dsp_scb_descriptor_t * cs46xx_dsp_create_scb (cs46xx_t *chip,char * name, u32 * scb_data,u32 dest); | ||
107 | void cs46xx_dsp_proc_free_scb_desc (dsp_scb_descriptor_t * scb); | ||
108 | void cs46xx_dsp_proc_register_scb_desc (cs46xx_t *chip,dsp_scb_descriptor_t * scb); | ||
109 | dsp_scb_descriptor_t * cs46xx_dsp_create_timing_master_scb (cs46xx_t *chip); | ||
110 | dsp_scb_descriptor_t * cs46xx_dsp_create_codec_out_scb(cs46xx_t * chip,char * codec_name, | ||
111 | u16 channel_disp,u16 fifo_addr, | ||
112 | u16 child_scb_addr, | ||
113 | u32 dest, | ||
114 | dsp_scb_descriptor_t * parent_scb, | ||
115 | int scb_child_type); | ||
116 | dsp_scb_descriptor_t * cs46xx_dsp_create_codec_in_scb(cs46xx_t * chip,char * codec_name, | ||
117 | u16 channel_disp,u16 fifo_addr, | ||
118 | u16 sample_buffer_addr, | ||
119 | u32 dest, | ||
120 | dsp_scb_descriptor_t * parent_scb, | ||
121 | int scb_child_type); | ||
122 | void cs46xx_dsp_remove_scb (cs46xx_t *chip,dsp_scb_descriptor_t * scb); | ||
123 | dsp_scb_descriptor_t * cs46xx_dsp_create_codec_in_scb(cs46xx_t * chip,char * codec_name, | ||
124 | u16 channel_disp,u16 fifo_addr, | ||
125 | u16 sample_buffer_addr, | ||
126 | u32 dest,dsp_scb_descriptor_t * parent_scb, | ||
127 | int scb_child_type); | ||
128 | dsp_scb_descriptor_t * cs46xx_dsp_create_src_task_scb(cs46xx_t * chip,char * scb_name, | ||
129 | int sample_rate, | ||
130 | u16 src_buffer_addr, | ||
131 | u16 src_delay_buffer_addr,u32 dest, | ||
132 | dsp_scb_descriptor_t * parent_scb, | ||
133 | int scb_child_type, | ||
134 | int pass_through); | ||
135 | dsp_scb_descriptor_t * cs46xx_dsp_create_mix_only_scb(cs46xx_t * chip,char * scb_name, | ||
136 | u16 mix_buffer_addr,u32 dest, | ||
137 | dsp_scb_descriptor_t * parent_scb, | ||
138 | int scb_child_type); | ||
139 | |||
140 | dsp_scb_descriptor_t * cs46xx_dsp_create_vari_decimate_scb(cs46xx_t * chip,char * scb_name, | ||
141 | u16 vari_buffer_addr0, | ||
142 | u16 vari_buffer_addr1, | ||
143 | u32 dest, | ||
144 | dsp_scb_descriptor_t * parent_scb, | ||
145 | int scb_child_type); | ||
146 | dsp_scb_descriptor_t * cs46xx_dsp_create_asynch_fg_rx_scb(cs46xx_t * chip,char * scb_name,u32 dest, | ||
147 | u16 hfg_scb_address, | ||
148 | u16 asynch_buffer_address, | ||
149 | dsp_scb_descriptor_t * parent_scb, | ||
150 | int scb_child_type); | ||
151 | dsp_scb_descriptor_t * cs46xx_dsp_create_spio_write_scb(cs46xx_t * chip,char * scb_name,u32 dest, | ||
152 | dsp_scb_descriptor_t * parent_scb, | ||
153 | int scb_child_type); | ||
154 | dsp_scb_descriptor_t * cs46xx_dsp_create_mix_to_ostream_scb(cs46xx_t * chip,char * scb_name, | ||
155 | u16 mix_buffer_addr,u16 writeback_spb,u32 dest, | ||
156 | dsp_scb_descriptor_t * parent_scb, | ||
157 | int scb_child_type); | ||
158 | dsp_scb_descriptor_t * cs46xx_dsp_create_magic_snoop_scb(cs46xx_t * chip,char * scb_name,u32 dest, | ||
159 | u16 snoop_buffer_address, | ||
160 | dsp_scb_descriptor_t * snoop_scb, | ||
161 | dsp_scb_descriptor_t * parent_scb, | ||
162 | int scb_child_type); | ||
163 | pcm_channel_descriptor_t * cs46xx_dsp_create_pcm_channel (cs46xx_t * chip,u32 sample_rate, void * private_data, u32 hw_dma_addr, | ||
164 | int pcm_channel_id); | ||
165 | void cs46xx_dsp_destroy_pcm_channel (cs46xx_t * chip, | ||
166 | pcm_channel_descriptor_t * pcm_channel); | ||
167 | int cs46xx_dsp_pcm_unlink (cs46xx_t * chip,pcm_channel_descriptor_t * pcm_channel); | ||
168 | int cs46xx_dsp_pcm_link (cs46xx_t * chip,pcm_channel_descriptor_t * pcm_channel); | ||
169 | dsp_scb_descriptor_t * cs46xx_add_record_source (cs46xx_t *chip,dsp_scb_descriptor_t * source, | ||
170 | u16 addr,char * scb_name); | ||
171 | int cs46xx_src_unlink(cs46xx_t *chip,dsp_scb_descriptor_t * src); | ||
172 | int cs46xx_src_link(cs46xx_t *chip,dsp_scb_descriptor_t * src); | ||
173 | int cs46xx_iec958_pre_open (cs46xx_t *chip); | ||
174 | int cs46xx_iec958_post_close (cs46xx_t *chip); | ||
175 | int cs46xx_dsp_pcm_channel_set_period (cs46xx_t * chip, | ||
176 | pcm_channel_descriptor_t * pcm_channel, | ||
177 | int period_size); | ||
178 | int cs46xx_dsp_pcm_ostream_set_period (cs46xx_t * chip, | ||
179 | int period_size); | ||
180 | int cs46xx_dsp_set_dac_volume (cs46xx_t * chip,u16 left,u16 right); | ||
181 | int cs46xx_dsp_set_iec958_volume (cs46xx_t * chip,u16 left,u16 right); | ||
182 | #endif /* __CS46XX_LIB_H__ */ | ||
diff --git a/sound/pci/cs46xx/dsp_spos.c b/sound/pci/cs46xx/dsp_spos.c new file mode 100644 index 000000000000..b66304fc4e4a --- /dev/null +++ b/sound/pci/cs46xx/dsp_spos.c | |||
@@ -0,0 +1,1892 @@ | |||
1 | /* | ||
2 | * This program is free software; you can redistribute it and/or modify | ||
3 | * it under the terms of the GNU General Public License as published by | ||
4 | * the Free Software Foundation; either version 2 of the License, or | ||
5 | * (at your option) any later version. | ||
6 | * | ||
7 | * This program is distributed in the hope that it will be useful, | ||
8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
10 | * GNU General Public License for more details. | ||
11 | * | ||
12 | * You should have received a copy of the GNU General Public License | ||
13 | * along with this program; if not, write to the Free Software | ||
14 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
15 | * | ||
16 | */ | ||
17 | |||
18 | /* | ||
19 | * 2002-07 Benny Sjostrand benny@hostmobility.com | ||
20 | */ | ||
21 | |||
22 | |||
23 | #include <sound/driver.h> | ||
24 | #include <asm/io.h> | ||
25 | #include <linux/delay.h> | ||
26 | #include <linux/pci.h> | ||
27 | #include <linux/pm.h> | ||
28 | #include <linux/init.h> | ||
29 | #include <linux/slab.h> | ||
30 | #include <linux/vmalloc.h> | ||
31 | #include <sound/core.h> | ||
32 | #include <sound/control.h> | ||
33 | #include <sound/info.h> | ||
34 | #include <sound/asoundef.h> | ||
35 | #include <sound/cs46xx.h> | ||
36 | |||
37 | #include "cs46xx_lib.h" | ||
38 | #include "dsp_spos.h" | ||
39 | |||
40 | static int cs46xx_dsp_async_init (cs46xx_t *chip, dsp_scb_descriptor_t * fg_entry); | ||
41 | |||
42 | static wide_opcode_t wide_opcodes[] = { | ||
43 | WIDE_FOR_BEGIN_LOOP, | ||
44 | WIDE_FOR_BEGIN_LOOP2, | ||
45 | WIDE_COND_GOTO_ADDR, | ||
46 | WIDE_COND_GOTO_CALL, | ||
47 | WIDE_TBEQ_COND_GOTO_ADDR, | ||
48 | WIDE_TBEQ_COND_CALL_ADDR, | ||
49 | WIDE_TBEQ_NCOND_GOTO_ADDR, | ||
50 | WIDE_TBEQ_NCOND_CALL_ADDR, | ||
51 | WIDE_TBEQ_COND_GOTO1_ADDR, | ||
52 | WIDE_TBEQ_COND_CALL1_ADDR, | ||
53 | WIDE_TBEQ_NCOND_GOTOI_ADDR, | ||
54 | WIDE_TBEQ_NCOND_CALL1_ADDR | ||
55 | }; | ||
56 | |||
57 | static int shadow_and_reallocate_code (cs46xx_t * chip,u32 * data,u32 size, u32 overlay_begin_address) | ||
58 | { | ||
59 | unsigned int i = 0, j, nreallocated = 0; | ||
60 | u32 hival,loval,address; | ||
61 | u32 mop_operands,mop_type,wide_op; | ||
62 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
63 | |||
64 | snd_assert( ((size % 2) == 0), return -EINVAL); | ||
65 | |||
66 | while (i < size) { | ||
67 | loval = data[i++]; | ||
68 | hival = data[i++]; | ||
69 | |||
70 | if (ins->code.offset > 0) { | ||
71 | mop_operands = (hival >> 6) & 0x03fff; | ||
72 | mop_type = mop_operands >> 10; | ||
73 | |||
74 | /* check for wide type instruction */ | ||
75 | if (mop_type == 0 && | ||
76 | (mop_operands & WIDE_LADD_INSTR_MASK) == 0 && | ||
77 | (mop_operands & WIDE_INSTR_MASK) != 0) { | ||
78 | wide_op = loval & 0x7f; | ||
79 | for (j = 0;j < ARRAY_SIZE(wide_opcodes); ++j) { | ||
80 | if (wide_opcodes[j] == wide_op) { | ||
81 | /* need to reallocate instruction */ | ||
82 | address = (hival & 0x00FFF) << 5; | ||
83 | address |= loval >> 15; | ||
84 | |||
85 | snd_printdd("handle_wideop[1]: %05x:%05x addr %04x\n",hival,loval,address); | ||
86 | |||
87 | if ( !(address & 0x8000) ) { | ||
88 | address += (ins->code.offset / 2) - overlay_begin_address; | ||
89 | } else { | ||
90 | snd_printdd("handle_wideop[1]: ROM symbol not reallocated\n"); | ||
91 | } | ||
92 | |||
93 | hival &= 0xFF000; | ||
94 | loval &= 0x07FFF; | ||
95 | |||
96 | hival |= ( (address >> 5) & 0x00FFF); | ||
97 | loval |= ( (address << 15) & 0xF8000); | ||
98 | |||
99 | address = (hival & 0x00FFF) << 5; | ||
100 | address |= loval >> 15; | ||
101 | |||
102 | snd_printdd("handle_wideop:[2] %05x:%05x addr %04x\n",hival,loval,address); | ||
103 | nreallocated ++; | ||
104 | } /* wide_opcodes[j] == wide_op */ | ||
105 | } /* for */ | ||
106 | } /* mod_type == 0 ... */ | ||
107 | } /* ins->code.offset > 0 */ | ||
108 | |||
109 | ins->code.data[ins->code.size++] = loval; | ||
110 | ins->code.data[ins->code.size++] = hival; | ||
111 | } | ||
112 | |||
113 | snd_printdd("dsp_spos: %d instructions reallocated\n",nreallocated); | ||
114 | return nreallocated; | ||
115 | } | ||
116 | |||
117 | static segment_desc_t * get_segment_desc (dsp_module_desc_t * module, int seg_type) | ||
118 | { | ||
119 | int i; | ||
120 | for (i = 0;i < module->nsegments; ++i) { | ||
121 | if (module->segments[i].segment_type == seg_type) { | ||
122 | return (module->segments + i); | ||
123 | } | ||
124 | } | ||
125 | |||
126 | return NULL; | ||
127 | }; | ||
128 | |||
129 | static int find_free_symbol_index (dsp_spos_instance_t * ins) | ||
130 | { | ||
131 | int index = ins->symbol_table.nsymbols,i; | ||
132 | |||
133 | for (i = ins->symbol_table.highest_frag_index; i < ins->symbol_table.nsymbols; ++i) { | ||
134 | if (ins->symbol_table.symbols[i].deleted) { | ||
135 | index = i; | ||
136 | break; | ||
137 | } | ||
138 | } | ||
139 | |||
140 | return index; | ||
141 | } | ||
142 | |||
143 | static int add_symbols (cs46xx_t * chip, dsp_module_desc_t * module) | ||
144 | { | ||
145 | int i; | ||
146 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
147 | |||
148 | if (module->symbol_table.nsymbols > 0) { | ||
149 | if (!strcmp(module->symbol_table.symbols[0].symbol_name, "OVERLAYBEGINADDRESS") && | ||
150 | module->symbol_table.symbols[0].symbol_type == SYMBOL_CONSTANT ) { | ||
151 | module->overlay_begin_address = module->symbol_table.symbols[0].address; | ||
152 | } | ||
153 | } | ||
154 | |||
155 | for (i = 0;i < module->symbol_table.nsymbols; ++i) { | ||
156 | if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) { | ||
157 | snd_printk(KERN_ERR "dsp_spos: symbol table is full\n"); | ||
158 | return -ENOMEM; | ||
159 | } | ||
160 | |||
161 | |||
162 | if (cs46xx_dsp_lookup_symbol(chip, | ||
163 | module->symbol_table.symbols[i].symbol_name, | ||
164 | module->symbol_table.symbols[i].symbol_type) == NULL) { | ||
165 | |||
166 | ins->symbol_table.symbols[ins->symbol_table.nsymbols] = module->symbol_table.symbols[i]; | ||
167 | ins->symbol_table.symbols[ins->symbol_table.nsymbols].address += ((ins->code.offset / 2) - module->overlay_begin_address); | ||
168 | ins->symbol_table.symbols[ins->symbol_table.nsymbols].module = module; | ||
169 | ins->symbol_table.symbols[ins->symbol_table.nsymbols].deleted = 0; | ||
170 | |||
171 | if (ins->symbol_table.nsymbols > ins->symbol_table.highest_frag_index) | ||
172 | ins->symbol_table.highest_frag_index = ins->symbol_table.nsymbols; | ||
173 | |||
174 | ins->symbol_table.nsymbols++; | ||
175 | } else { | ||
176 | /* if (0) printk ("dsp_spos: symbol <%s> duplicated, probably nothing wrong with that (Cirrus?)\n", | ||
177 | module->symbol_table.symbols[i].symbol_name); */ | ||
178 | } | ||
179 | } | ||
180 | |||
181 | return 0; | ||
182 | } | ||
183 | |||
184 | static symbol_entry_t * add_symbol (cs46xx_t * chip, char * symbol_name, u32 address, int type) | ||
185 | { | ||
186 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
187 | symbol_entry_t * symbol = NULL; | ||
188 | int index; | ||
189 | |||
190 | if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) { | ||
191 | snd_printk(KERN_ERR "dsp_spos: symbol table is full\n"); | ||
192 | return NULL; | ||
193 | } | ||
194 | |||
195 | if (cs46xx_dsp_lookup_symbol(chip, | ||
196 | symbol_name, | ||
197 | type) != NULL) { | ||
198 | snd_printk(KERN_ERR "dsp_spos: symbol <%s> duplicated\n", symbol_name); | ||
199 | return NULL; | ||
200 | } | ||
201 | |||
202 | index = find_free_symbol_index (ins); | ||
203 | |||
204 | strcpy (ins->symbol_table.symbols[index].symbol_name, symbol_name); | ||
205 | ins->symbol_table.symbols[index].address = address; | ||
206 | ins->symbol_table.symbols[index].symbol_type = type; | ||
207 | ins->symbol_table.symbols[index].module = NULL; | ||
208 | ins->symbol_table.symbols[index].deleted = 0; | ||
209 | symbol = (ins->symbol_table.symbols + index); | ||
210 | |||
211 | if (index > ins->symbol_table.highest_frag_index) | ||
212 | ins->symbol_table.highest_frag_index = index; | ||
213 | |||
214 | if (index == ins->symbol_table.nsymbols) | ||
215 | ins->symbol_table.nsymbols++; /* no frag. in list */ | ||
216 | |||
217 | return symbol; | ||
218 | } | ||
219 | |||
220 | dsp_spos_instance_t * cs46xx_dsp_spos_create (cs46xx_t * chip) | ||
221 | { | ||
222 | dsp_spos_instance_t * ins = kmalloc(sizeof(dsp_spos_instance_t), GFP_KERNEL); | ||
223 | |||
224 | if (ins == NULL) | ||
225 | return NULL; | ||
226 | memset(ins, 0, sizeof(*ins)); | ||
227 | |||
228 | /* better to use vmalloc for this big table */ | ||
229 | ins->symbol_table.nsymbols = 0; | ||
230 | ins->symbol_table.symbols = vmalloc(sizeof(symbol_entry_t) * DSP_MAX_SYMBOLS); | ||
231 | ins->symbol_table.highest_frag_index = 0; | ||
232 | |||
233 | if (ins->symbol_table.symbols == NULL) { | ||
234 | cs46xx_dsp_spos_destroy(chip); | ||
235 | return NULL; | ||
236 | } | ||
237 | |||
238 | ins->code.offset = 0; | ||
239 | ins->code.size = 0; | ||
240 | ins->code.data = kmalloc(DSP_CODE_BYTE_SIZE, GFP_KERNEL); | ||
241 | |||
242 | if (ins->code.data == NULL) { | ||
243 | cs46xx_dsp_spos_destroy(chip); | ||
244 | return NULL; | ||
245 | } | ||
246 | |||
247 | ins->nscb = 0; | ||
248 | ins->ntask = 0; | ||
249 | |||
250 | ins->nmodules = 0; | ||
251 | ins->modules = kmalloc(sizeof(dsp_module_desc_t) * DSP_MAX_MODULES, GFP_KERNEL); | ||
252 | |||
253 | if (ins->modules == NULL) { | ||
254 | cs46xx_dsp_spos_destroy(chip); | ||
255 | return NULL; | ||
256 | } | ||
257 | |||
258 | /* default SPDIF input sample rate | ||
259 | to 48000 khz */ | ||
260 | ins->spdif_in_sample_rate = 48000; | ||
261 | |||
262 | /* maximize volume */ | ||
263 | ins->dac_volume_right = 0x8000; | ||
264 | ins->dac_volume_left = 0x8000; | ||
265 | ins->spdif_input_volume_right = 0x8000; | ||
266 | ins->spdif_input_volume_left = 0x8000; | ||
267 | |||
268 | /* set left and right validity bits and | ||
269 | default channel status */ | ||
270 | ins->spdif_csuv_default = | ||
271 | ins->spdif_csuv_stream = | ||
272 | /* byte 0 */ ((unsigned int)_wrap_all_bits( (SNDRV_PCM_DEFAULT_CON_SPDIF & 0xff)) << 24) | | ||
273 | /* byte 1 */ ((unsigned int)_wrap_all_bits( ((SNDRV_PCM_DEFAULT_CON_SPDIF >> 8) & 0xff)) << 16) | | ||
274 | /* byte 3 */ (unsigned int)_wrap_all_bits( (SNDRV_PCM_DEFAULT_CON_SPDIF >> 24) & 0xff) | | ||
275 | /* left and right validity bits */ (1 << 13) | (1 << 12); | ||
276 | |||
277 | return ins; | ||
278 | } | ||
279 | |||
280 | void cs46xx_dsp_spos_destroy (cs46xx_t * chip) | ||
281 | { | ||
282 | int i; | ||
283 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
284 | |||
285 | snd_assert(ins != NULL, return); | ||
286 | |||
287 | down(&chip->spos_mutex); | ||
288 | for (i = 0; i < ins->nscb; ++i) { | ||
289 | if (ins->scbs[i].deleted) continue; | ||
290 | |||
291 | cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) ); | ||
292 | } | ||
293 | |||
294 | kfree(ins->code.data); | ||
295 | vfree(ins->symbol_table.symbols); | ||
296 | kfree(ins->modules); | ||
297 | kfree(ins); | ||
298 | up(&chip->spos_mutex); | ||
299 | } | ||
300 | |||
301 | int cs46xx_dsp_load_module (cs46xx_t * chip, dsp_module_desc_t * module) | ||
302 | { | ||
303 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
304 | segment_desc_t * code = get_segment_desc (module,SEGTYPE_SP_PROGRAM); | ||
305 | segment_desc_t * parameter = get_segment_desc (module,SEGTYPE_SP_PARAMETER); | ||
306 | segment_desc_t * sample = get_segment_desc (module,SEGTYPE_SP_SAMPLE); | ||
307 | u32 doffset, dsize; | ||
308 | |||
309 | if (ins->nmodules == DSP_MAX_MODULES - 1) { | ||
310 | snd_printk(KERN_ERR "dsp_spos: to many modules loaded into DSP\n"); | ||
311 | return -ENOMEM; | ||
312 | } | ||
313 | |||
314 | snd_printdd("dsp_spos: loading module %s into DSP\n", module->module_name); | ||
315 | |||
316 | if (ins->nmodules == 0) { | ||
317 | snd_printdd("dsp_spos: clearing parameter area\n"); | ||
318 | snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET, DSP_PARAMETER_BYTE_SIZE); | ||
319 | } | ||
320 | |||
321 | if (parameter == NULL) { | ||
322 | snd_printdd("dsp_spos: module got no parameter segment\n"); | ||
323 | } else { | ||
324 | if (ins->nmodules > 0) { | ||
325 | snd_printk(KERN_WARNING "dsp_spos: WARNING current parameter data may be overwriten!\n"); | ||
326 | } | ||
327 | |||
328 | doffset = (parameter->offset * 4 + DSP_PARAMETER_BYTE_OFFSET); | ||
329 | dsize = parameter->size * 4; | ||
330 | |||
331 | snd_printdd("dsp_spos: downloading parameter data to chip (%08x-%08x)\n", | ||
332 | doffset,doffset + dsize); | ||
333 | |||
334 | if (snd_cs46xx_download (chip, parameter->data, doffset, dsize)) { | ||
335 | snd_printk(KERN_ERR "dsp_spos: failed to download parameter data to DSP\n"); | ||
336 | return -EINVAL; | ||
337 | } | ||
338 | } | ||
339 | |||
340 | if (ins->nmodules == 0) { | ||
341 | snd_printdd("dsp_spos: clearing sample area\n"); | ||
342 | snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET, DSP_SAMPLE_BYTE_SIZE); | ||
343 | } | ||
344 | |||
345 | if (sample == NULL) { | ||
346 | snd_printdd("dsp_spos: module got no sample segment\n"); | ||
347 | } else { | ||
348 | if (ins->nmodules > 0) { | ||
349 | snd_printk(KERN_WARNING "dsp_spos: WARNING current sample data may be overwriten\n"); | ||
350 | } | ||
351 | |||
352 | doffset = (sample->offset * 4 + DSP_SAMPLE_BYTE_OFFSET); | ||
353 | dsize = sample->size * 4; | ||
354 | |||
355 | snd_printdd("dsp_spos: downloading sample data to chip (%08x-%08x)\n", | ||
356 | doffset,doffset + dsize); | ||
357 | |||
358 | if (snd_cs46xx_download (chip,sample->data,doffset,dsize)) { | ||
359 | snd_printk(KERN_ERR "dsp_spos: failed to sample data to DSP\n"); | ||
360 | return -EINVAL; | ||
361 | } | ||
362 | } | ||
363 | |||
364 | |||
365 | if (ins->nmodules == 0) { | ||
366 | snd_printdd("dsp_spos: clearing code area\n"); | ||
367 | snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE); | ||
368 | } | ||
369 | |||
370 | if (code == NULL) { | ||
371 | snd_printdd("dsp_spos: module got no code segment\n"); | ||
372 | } else { | ||
373 | if (ins->code.offset + code->size > DSP_CODE_BYTE_SIZE) { | ||
374 | snd_printk(KERN_ERR "dsp_spos: no space available in DSP\n"); | ||
375 | return -ENOMEM; | ||
376 | } | ||
377 | |||
378 | module->load_address = ins->code.offset; | ||
379 | module->overlay_begin_address = 0x000; | ||
380 | |||
381 | /* if module has a code segment it must have | ||
382 | symbol table */ | ||
383 | snd_assert(module->symbol_table.symbols != NULL ,return -ENOMEM); | ||
384 | if (add_symbols(chip,module)) { | ||
385 | snd_printk(KERN_ERR "dsp_spos: failed to load symbol table\n"); | ||
386 | return -ENOMEM; | ||
387 | } | ||
388 | |||
389 | doffset = (code->offset * 4 + ins->code.offset * 4 + DSP_CODE_BYTE_OFFSET); | ||
390 | dsize = code->size * 4; | ||
391 | snd_printdd("dsp_spos: downloading code to chip (%08x-%08x)\n", | ||
392 | doffset,doffset + dsize); | ||
393 | |||
394 | module->nfixups = shadow_and_reallocate_code(chip,code->data,code->size,module->overlay_begin_address); | ||
395 | |||
396 | if (snd_cs46xx_download (chip,(ins->code.data + ins->code.offset),doffset,dsize)) { | ||
397 | snd_printk(KERN_ERR "dsp_spos: failed to download code to DSP\n"); | ||
398 | return -EINVAL; | ||
399 | } | ||
400 | |||
401 | ins->code.offset += code->size; | ||
402 | } | ||
403 | |||
404 | /* NOTE: module segments and symbol table must be | ||
405 | statically allocated. Case that module data is | ||
406 | not generated by the ospparser */ | ||
407 | ins->modules[ins->nmodules] = *module; | ||
408 | ins->nmodules++; | ||
409 | |||
410 | return 0; | ||
411 | } | ||
412 | |||
413 | symbol_entry_t * cs46xx_dsp_lookup_symbol (cs46xx_t * chip, char * symbol_name, int symbol_type) | ||
414 | { | ||
415 | int i; | ||
416 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
417 | |||
418 | for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) { | ||
419 | |||
420 | if (ins->symbol_table.symbols[i].deleted) | ||
421 | continue; | ||
422 | |||
423 | if (!strcmp(ins->symbol_table.symbols[i].symbol_name,symbol_name) && | ||
424 | ins->symbol_table.symbols[i].symbol_type == symbol_type) { | ||
425 | return (ins->symbol_table.symbols + i); | ||
426 | } | ||
427 | } | ||
428 | |||
429 | #if 0 | ||
430 | printk ("dsp_spos: symbol <%s> type %02x not found\n", | ||
431 | symbol_name,symbol_type); | ||
432 | #endif | ||
433 | |||
434 | return NULL; | ||
435 | } | ||
436 | |||
437 | |||
438 | static symbol_entry_t * cs46xx_dsp_lookup_symbol_addr (cs46xx_t * chip, u32 address, int symbol_type) | ||
439 | { | ||
440 | int i; | ||
441 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
442 | |||
443 | for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) { | ||
444 | |||
445 | if (ins->symbol_table.symbols[i].deleted) | ||
446 | continue; | ||
447 | |||
448 | if (ins->symbol_table.symbols[i].address == address && | ||
449 | ins->symbol_table.symbols[i].symbol_type == symbol_type) { | ||
450 | return (ins->symbol_table.symbols + i); | ||
451 | } | ||
452 | } | ||
453 | |||
454 | |||
455 | return NULL; | ||
456 | } | ||
457 | |||
458 | |||
459 | static void cs46xx_dsp_proc_symbol_table_read (snd_info_entry_t *entry, snd_info_buffer_t * buffer) | ||
460 | { | ||
461 | cs46xx_t *chip = entry->private_data; | ||
462 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
463 | int i; | ||
464 | |||
465 | snd_iprintf(buffer, "SYMBOLS:\n"); | ||
466 | for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) { | ||
467 | char *module_str = "system"; | ||
468 | |||
469 | if (ins->symbol_table.symbols[i].deleted) | ||
470 | continue; | ||
471 | |||
472 | if (ins->symbol_table.symbols[i].module != NULL) { | ||
473 | module_str = ins->symbol_table.symbols[i].module->module_name; | ||
474 | } | ||
475 | |||
476 | |||
477 | snd_iprintf(buffer, "%04X <%02X> %s [%s]\n", | ||
478 | ins->symbol_table.symbols[i].address, | ||
479 | ins->symbol_table.symbols[i].symbol_type, | ||
480 | ins->symbol_table.symbols[i].symbol_name, | ||
481 | module_str); | ||
482 | } | ||
483 | } | ||
484 | |||
485 | |||
486 | static void cs46xx_dsp_proc_modules_read (snd_info_entry_t *entry, snd_info_buffer_t * buffer) | ||
487 | { | ||
488 | cs46xx_t *chip = entry->private_data; | ||
489 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
490 | int i,j; | ||
491 | |||
492 | down(&chip->spos_mutex); | ||
493 | snd_iprintf(buffer, "MODULES:\n"); | ||
494 | for ( i = 0; i < ins->nmodules; ++i ) { | ||
495 | snd_iprintf(buffer, "\n%s:\n", ins->modules[i].module_name); | ||
496 | snd_iprintf(buffer, " %d symbols\n", ins->modules[i].symbol_table.nsymbols); | ||
497 | snd_iprintf(buffer, " %d fixups\n", ins->modules[i].nfixups); | ||
498 | |||
499 | for (j = 0; j < ins->modules[i].nsegments; ++ j) { | ||
500 | segment_desc_t * desc = (ins->modules[i].segments + j); | ||
501 | snd_iprintf(buffer, " segment %02x offset %08x size %08x\n", | ||
502 | desc->segment_type,desc->offset, desc->size); | ||
503 | } | ||
504 | } | ||
505 | up(&chip->spos_mutex); | ||
506 | } | ||
507 | |||
508 | static void cs46xx_dsp_proc_task_tree_read (snd_info_entry_t *entry, snd_info_buffer_t * buffer) | ||
509 | { | ||
510 | cs46xx_t *chip = entry->private_data; | ||
511 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
512 | int i,j,col; | ||
513 | void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET; | ||
514 | |||
515 | down(&chip->spos_mutex); | ||
516 | snd_iprintf(buffer, "TASK TREES:\n"); | ||
517 | for ( i = 0; i < ins->ntask; ++i) { | ||
518 | snd_iprintf(buffer,"\n%04x %s:\n",ins->tasks[i].address,ins->tasks[i].task_name); | ||
519 | |||
520 | for (col = 0,j = 0;j < ins->tasks[i].size; j++,col++) { | ||
521 | u32 val; | ||
522 | if (col == 4) { | ||
523 | snd_iprintf(buffer,"\n"); | ||
524 | col = 0; | ||
525 | } | ||
526 | val = readl(dst + (ins->tasks[i].address + j) * sizeof(u32)); | ||
527 | snd_iprintf(buffer,"%08x ",val); | ||
528 | } | ||
529 | } | ||
530 | |||
531 | snd_iprintf(buffer,"\n"); | ||
532 | up(&chip->spos_mutex); | ||
533 | } | ||
534 | |||
535 | static void cs46xx_dsp_proc_scb_read (snd_info_entry_t *entry, snd_info_buffer_t * buffer) | ||
536 | { | ||
537 | cs46xx_t *chip = entry->private_data; | ||
538 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
539 | int i; | ||
540 | |||
541 | down(&chip->spos_mutex); | ||
542 | snd_iprintf(buffer, "SCB's:\n"); | ||
543 | for ( i = 0; i < ins->nscb; ++i) { | ||
544 | if (ins->scbs[i].deleted) | ||
545 | continue; | ||
546 | snd_iprintf(buffer,"\n%04x %s:\n\n",ins->scbs[i].address,ins->scbs[i].scb_name); | ||
547 | |||
548 | if (ins->scbs[i].parent_scb_ptr != NULL) { | ||
549 | snd_iprintf(buffer,"parent [%s:%04x] ", | ||
550 | ins->scbs[i].parent_scb_ptr->scb_name, | ||
551 | ins->scbs[i].parent_scb_ptr->address); | ||
552 | } else snd_iprintf(buffer,"parent [none] "); | ||
553 | |||
554 | snd_iprintf(buffer,"sub_list_ptr [%s:%04x]\nnext_scb_ptr [%s:%04x] task_entry [%s:%04x]\n", | ||
555 | ins->scbs[i].sub_list_ptr->scb_name, | ||
556 | ins->scbs[i].sub_list_ptr->address, | ||
557 | ins->scbs[i].next_scb_ptr->scb_name, | ||
558 | ins->scbs[i].next_scb_ptr->address, | ||
559 | ins->scbs[i].task_entry->symbol_name, | ||
560 | ins->scbs[i].task_entry->address); | ||
561 | } | ||
562 | |||
563 | snd_iprintf(buffer,"\n"); | ||
564 | up(&chip->spos_mutex); | ||
565 | } | ||
566 | |||
567 | static void cs46xx_dsp_proc_parameter_dump_read (snd_info_entry_t *entry, snd_info_buffer_t * buffer) | ||
568 | { | ||
569 | cs46xx_t *chip = entry->private_data; | ||
570 | /*dsp_spos_instance_t * ins = chip->dsp_spos_instance; */ | ||
571 | unsigned int i,col = 0; | ||
572 | void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET; | ||
573 | symbol_entry_t * symbol; | ||
574 | |||
575 | for (i = 0;i < DSP_PARAMETER_BYTE_SIZE; i += sizeof(u32),col ++) { | ||
576 | if (col == 4) { | ||
577 | snd_iprintf(buffer,"\n"); | ||
578 | col = 0; | ||
579 | } | ||
580 | |||
581 | if ( (symbol = cs46xx_dsp_lookup_symbol_addr (chip,i / sizeof(u32), SYMBOL_PARAMETER)) != NULL) { | ||
582 | col = 0; | ||
583 | snd_iprintf (buffer,"\n%s:\n",symbol->symbol_name); | ||
584 | } | ||
585 | |||
586 | if (col == 0) { | ||
587 | snd_iprintf(buffer, "%04X ", i / (unsigned int)sizeof(u32)); | ||
588 | } | ||
589 | |||
590 | snd_iprintf(buffer,"%08X ",readl(dst + i)); | ||
591 | } | ||
592 | } | ||
593 | |||
594 | static void cs46xx_dsp_proc_sample_dump_read (snd_info_entry_t *entry, snd_info_buffer_t * buffer) | ||
595 | { | ||
596 | cs46xx_t *chip = entry->private_data; | ||
597 | int i,col = 0; | ||
598 | void __iomem *dst = chip->region.idx[2].remap_addr; | ||
599 | |||
600 | snd_iprintf(buffer,"PCMREADER:\n"); | ||
601 | for (i = PCM_READER_BUF1;i < PCM_READER_BUF1 + 0x30; i += sizeof(u32),col ++) { | ||
602 | if (col == 4) { | ||
603 | snd_iprintf(buffer,"\n"); | ||
604 | col = 0; | ||
605 | } | ||
606 | |||
607 | if (col == 0) { | ||
608 | snd_iprintf(buffer, "%04X ",i); | ||
609 | } | ||
610 | |||
611 | snd_iprintf(buffer,"%08X ",readl(dst + i)); | ||
612 | } | ||
613 | |||
614 | snd_iprintf(buffer,"\nMIX_SAMPLE_BUF1:\n"); | ||
615 | |||
616 | col = 0; | ||
617 | for (i = MIX_SAMPLE_BUF1;i < MIX_SAMPLE_BUF1 + 0x40; i += sizeof(u32),col ++) { | ||
618 | if (col == 4) { | ||
619 | snd_iprintf(buffer,"\n"); | ||
620 | col = 0; | ||
621 | } | ||
622 | |||
623 | if (col == 0) { | ||
624 | snd_iprintf(buffer, "%04X ",i); | ||
625 | } | ||
626 | |||
627 | snd_iprintf(buffer,"%08X ",readl(dst + i)); | ||
628 | } | ||
629 | |||
630 | snd_iprintf(buffer,"\nSRC_TASK_SCB1:\n"); | ||
631 | col = 0; | ||
632 | for (i = 0x2480 ; i < 0x2480 + 0x40 ; i += sizeof(u32),col ++) { | ||
633 | if (col == 4) { | ||
634 | snd_iprintf(buffer,"\n"); | ||
635 | col = 0; | ||
636 | } | ||
637 | |||
638 | if (col == 0) { | ||
639 | snd_iprintf(buffer, "%04X ",i); | ||
640 | } | ||
641 | |||
642 | snd_iprintf(buffer,"%08X ",readl(dst + i)); | ||
643 | } | ||
644 | |||
645 | |||
646 | snd_iprintf(buffer,"\nSPDIFO_BUFFER:\n"); | ||
647 | col = 0; | ||
648 | for (i = SPDIFO_IP_OUTPUT_BUFFER1;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x30; i += sizeof(u32),col ++) { | ||
649 | if (col == 4) { | ||
650 | snd_iprintf(buffer,"\n"); | ||
651 | col = 0; | ||
652 | } | ||
653 | |||
654 | if (col == 0) { | ||
655 | snd_iprintf(buffer, "%04X ",i); | ||
656 | } | ||
657 | |||
658 | snd_iprintf(buffer,"%08X ",readl(dst + i)); | ||
659 | } | ||
660 | |||
661 | snd_iprintf(buffer,"\n...\n"); | ||
662 | col = 0; | ||
663 | |||
664 | for (i = SPDIFO_IP_OUTPUT_BUFFER1+0xD0;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x110; i += sizeof(u32),col ++) { | ||
665 | if (col == 4) { | ||
666 | snd_iprintf(buffer,"\n"); | ||
667 | col = 0; | ||
668 | } | ||
669 | |||
670 | if (col == 0) { | ||
671 | snd_iprintf(buffer, "%04X ",i); | ||
672 | } | ||
673 | |||
674 | snd_iprintf(buffer,"%08X ",readl(dst + i)); | ||
675 | } | ||
676 | |||
677 | |||
678 | snd_iprintf(buffer,"\nOUTPUT_SNOOP:\n"); | ||
679 | col = 0; | ||
680 | for (i = OUTPUT_SNOOP_BUFFER;i < OUTPUT_SNOOP_BUFFER + 0x40; i += sizeof(u32),col ++) { | ||
681 | if (col == 4) { | ||
682 | snd_iprintf(buffer,"\n"); | ||
683 | col = 0; | ||
684 | } | ||
685 | |||
686 | if (col == 0) { | ||
687 | snd_iprintf(buffer, "%04X ",i); | ||
688 | } | ||
689 | |||
690 | snd_iprintf(buffer,"%08X ",readl(dst + i)); | ||
691 | } | ||
692 | |||
693 | snd_iprintf(buffer,"\nCODEC_INPUT_BUF1: \n"); | ||
694 | col = 0; | ||
695 | for (i = CODEC_INPUT_BUF1;i < CODEC_INPUT_BUF1 + 0x40; i += sizeof(u32),col ++) { | ||
696 | if (col == 4) { | ||
697 | snd_iprintf(buffer,"\n"); | ||
698 | col = 0; | ||
699 | } | ||
700 | |||
701 | if (col == 0) { | ||
702 | snd_iprintf(buffer, "%04X ",i); | ||
703 | } | ||
704 | |||
705 | snd_iprintf(buffer,"%08X ",readl(dst + i)); | ||
706 | } | ||
707 | #if 0 | ||
708 | snd_iprintf(buffer,"\nWRITE_BACK_BUF1: \n"); | ||
709 | col = 0; | ||
710 | for (i = WRITE_BACK_BUF1;i < WRITE_BACK_BUF1 + 0x40; i += sizeof(u32),col ++) { | ||
711 | if (col == 4) { | ||
712 | snd_iprintf(buffer,"\n"); | ||
713 | col = 0; | ||
714 | } | ||
715 | |||
716 | if (col == 0) { | ||
717 | snd_iprintf(buffer, "%04X ",i); | ||
718 | } | ||
719 | |||
720 | snd_iprintf(buffer,"%08X ",readl(dst + i)); | ||
721 | } | ||
722 | #endif | ||
723 | |||
724 | snd_iprintf(buffer,"\nSPDIFI_IP_OUTPUT_BUFFER1: \n"); | ||
725 | col = 0; | ||
726 | for (i = SPDIFI_IP_OUTPUT_BUFFER1;i < SPDIFI_IP_OUTPUT_BUFFER1 + 0x80; i += sizeof(u32),col ++) { | ||
727 | if (col == 4) { | ||
728 | snd_iprintf(buffer,"\n"); | ||
729 | col = 0; | ||
730 | } | ||
731 | |||
732 | if (col == 0) { | ||
733 | snd_iprintf(buffer, "%04X ",i); | ||
734 | } | ||
735 | |||
736 | snd_iprintf(buffer,"%08X ",readl(dst + i)); | ||
737 | } | ||
738 | snd_iprintf(buffer,"\n"); | ||
739 | } | ||
740 | |||
741 | int cs46xx_dsp_proc_init (snd_card_t * card, cs46xx_t *chip) | ||
742 | { | ||
743 | snd_info_entry_t *entry; | ||
744 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
745 | int i; | ||
746 | |||
747 | ins->snd_card = card; | ||
748 | |||
749 | if ((entry = snd_info_create_card_entry(card, "dsp", card->proc_root)) != NULL) { | ||
750 | entry->content = SNDRV_INFO_CONTENT_TEXT; | ||
751 | entry->mode = S_IFDIR | S_IRUGO | S_IXUGO; | ||
752 | entry->c.text.read_size = 512; | ||
753 | |||
754 | if (snd_info_register(entry) < 0) { | ||
755 | snd_info_free_entry(entry); | ||
756 | entry = NULL; | ||
757 | } | ||
758 | } | ||
759 | |||
760 | ins->proc_dsp_dir = entry; | ||
761 | |||
762 | if (!ins->proc_dsp_dir) | ||
763 | return -ENOMEM; | ||
764 | |||
765 | if ((entry = snd_info_create_card_entry(card, "spos_symbols", ins->proc_dsp_dir)) != NULL) { | ||
766 | entry->content = SNDRV_INFO_CONTENT_TEXT; | ||
767 | entry->private_data = chip; | ||
768 | entry->mode = S_IFREG | S_IRUGO | S_IWUSR; | ||
769 | entry->c.text.read_size = 512; | ||
770 | entry->c.text.read = cs46xx_dsp_proc_symbol_table_read; | ||
771 | if (snd_info_register(entry) < 0) { | ||
772 | snd_info_free_entry(entry); | ||
773 | entry = NULL; | ||
774 | } | ||
775 | } | ||
776 | ins->proc_sym_info_entry = entry; | ||
777 | |||
778 | if ((entry = snd_info_create_card_entry(card, "spos_modules", ins->proc_dsp_dir)) != NULL) { | ||
779 | entry->content = SNDRV_INFO_CONTENT_TEXT; | ||
780 | entry->private_data = chip; | ||
781 | entry->mode = S_IFREG | S_IRUGO | S_IWUSR; | ||
782 | entry->c.text.read_size = 512; | ||
783 | entry->c.text.read = cs46xx_dsp_proc_modules_read; | ||
784 | if (snd_info_register(entry) < 0) { | ||
785 | snd_info_free_entry(entry); | ||
786 | entry = NULL; | ||
787 | } | ||
788 | } | ||
789 | ins->proc_modules_info_entry = entry; | ||
790 | |||
791 | if ((entry = snd_info_create_card_entry(card, "parameter", ins->proc_dsp_dir)) != NULL) { | ||
792 | entry->content = SNDRV_INFO_CONTENT_TEXT; | ||
793 | entry->private_data = chip; | ||
794 | entry->mode = S_IFREG | S_IRUGO | S_IWUSR; | ||
795 | entry->c.text.read_size = 512; | ||
796 | entry->c.text.read = cs46xx_dsp_proc_parameter_dump_read; | ||
797 | if (snd_info_register(entry) < 0) { | ||
798 | snd_info_free_entry(entry); | ||
799 | entry = NULL; | ||
800 | } | ||
801 | } | ||
802 | ins->proc_parameter_dump_info_entry = entry; | ||
803 | |||
804 | if ((entry = snd_info_create_card_entry(card, "sample", ins->proc_dsp_dir)) != NULL) { | ||
805 | entry->content = SNDRV_INFO_CONTENT_TEXT; | ||
806 | entry->private_data = chip; | ||
807 | entry->mode = S_IFREG | S_IRUGO | S_IWUSR; | ||
808 | entry->c.text.read_size = 512; | ||
809 | entry->c.text.read = cs46xx_dsp_proc_sample_dump_read; | ||
810 | if (snd_info_register(entry) < 0) { | ||
811 | snd_info_free_entry(entry); | ||
812 | entry = NULL; | ||
813 | } | ||
814 | } | ||
815 | ins->proc_sample_dump_info_entry = entry; | ||
816 | |||
817 | if ((entry = snd_info_create_card_entry(card, "task_tree", ins->proc_dsp_dir)) != NULL) { | ||
818 | entry->content = SNDRV_INFO_CONTENT_TEXT; | ||
819 | entry->private_data = chip; | ||
820 | entry->mode = S_IFREG | S_IRUGO | S_IWUSR; | ||
821 | entry->c.text.read_size = 512; | ||
822 | entry->c.text.read = cs46xx_dsp_proc_task_tree_read; | ||
823 | if (snd_info_register(entry) < 0) { | ||
824 | snd_info_free_entry(entry); | ||
825 | entry = NULL; | ||
826 | } | ||
827 | } | ||
828 | ins->proc_task_info_entry = entry; | ||
829 | |||
830 | if ((entry = snd_info_create_card_entry(card, "scb_info", ins->proc_dsp_dir)) != NULL) { | ||
831 | entry->content = SNDRV_INFO_CONTENT_TEXT; | ||
832 | entry->private_data = chip; | ||
833 | entry->mode = S_IFREG | S_IRUGO | S_IWUSR; | ||
834 | entry->c.text.read_size = 1024; | ||
835 | entry->c.text.read = cs46xx_dsp_proc_scb_read; | ||
836 | if (snd_info_register(entry) < 0) { | ||
837 | snd_info_free_entry(entry); | ||
838 | entry = NULL; | ||
839 | } | ||
840 | } | ||
841 | ins->proc_scb_info_entry = entry; | ||
842 | |||
843 | down(&chip->spos_mutex); | ||
844 | /* register/update SCB's entries on proc */ | ||
845 | for (i = 0; i < ins->nscb; ++i) { | ||
846 | if (ins->scbs[i].deleted) continue; | ||
847 | |||
848 | cs46xx_dsp_proc_register_scb_desc (chip, (ins->scbs + i)); | ||
849 | } | ||
850 | up(&chip->spos_mutex); | ||
851 | |||
852 | return 0; | ||
853 | } | ||
854 | |||
855 | int cs46xx_dsp_proc_done (cs46xx_t *chip) | ||
856 | { | ||
857 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
858 | int i; | ||
859 | |||
860 | if (ins->proc_sym_info_entry) { | ||
861 | snd_info_unregister(ins->proc_sym_info_entry); | ||
862 | ins->proc_sym_info_entry = NULL; | ||
863 | } | ||
864 | |||
865 | if (ins->proc_modules_info_entry) { | ||
866 | snd_info_unregister(ins->proc_modules_info_entry); | ||
867 | ins->proc_modules_info_entry = NULL; | ||
868 | } | ||
869 | |||
870 | if (ins->proc_parameter_dump_info_entry) { | ||
871 | snd_info_unregister(ins->proc_parameter_dump_info_entry); | ||
872 | ins->proc_parameter_dump_info_entry = NULL; | ||
873 | } | ||
874 | |||
875 | if (ins->proc_sample_dump_info_entry) { | ||
876 | snd_info_unregister(ins->proc_sample_dump_info_entry); | ||
877 | ins->proc_sample_dump_info_entry = NULL; | ||
878 | } | ||
879 | |||
880 | if (ins->proc_scb_info_entry) { | ||
881 | snd_info_unregister(ins->proc_scb_info_entry); | ||
882 | ins->proc_scb_info_entry = NULL; | ||
883 | } | ||
884 | |||
885 | if (ins->proc_task_info_entry) { | ||
886 | snd_info_unregister(ins->proc_task_info_entry); | ||
887 | ins->proc_task_info_entry = NULL; | ||
888 | } | ||
889 | |||
890 | down(&chip->spos_mutex); | ||
891 | for (i = 0; i < ins->nscb; ++i) { | ||
892 | if (ins->scbs[i].deleted) continue; | ||
893 | cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) ); | ||
894 | } | ||
895 | up(&chip->spos_mutex); | ||
896 | |||
897 | if (ins->proc_dsp_dir) { | ||
898 | snd_info_unregister (ins->proc_dsp_dir); | ||
899 | ins->proc_dsp_dir = NULL; | ||
900 | } | ||
901 | |||
902 | return 0; | ||
903 | } | ||
904 | |||
905 | static int debug_tree; | ||
906 | static void _dsp_create_task_tree (cs46xx_t *chip,u32 * task_data, u32 dest, int size) | ||
907 | { | ||
908 | void __iomem *spdst = chip->region.idx[1].remap_addr + | ||
909 | DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32); | ||
910 | int i; | ||
911 | |||
912 | for (i = 0; i < size; ++i) { | ||
913 | if (debug_tree) printk ("addr %p, val %08x\n",spdst,task_data[i]); | ||
914 | writel(task_data[i],spdst); | ||
915 | spdst += sizeof(u32); | ||
916 | } | ||
917 | } | ||
918 | |||
919 | static int debug_scb; | ||
920 | static void _dsp_create_scb (cs46xx_t *chip,u32 * scb_data, u32 dest) | ||
921 | { | ||
922 | void __iomem *spdst = chip->region.idx[1].remap_addr + | ||
923 | DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32); | ||
924 | int i; | ||
925 | |||
926 | for (i = 0; i < 0x10; ++i) { | ||
927 | if (debug_scb) printk ("addr %p, val %08x\n",spdst,scb_data[i]); | ||
928 | writel(scb_data[i],spdst); | ||
929 | spdst += sizeof(u32); | ||
930 | } | ||
931 | } | ||
932 | |||
933 | static int find_free_scb_index (dsp_spos_instance_t * ins) | ||
934 | { | ||
935 | int index = ins->nscb, i; | ||
936 | |||
937 | for (i = ins->scb_highest_frag_index; i < ins->nscb; ++i) { | ||
938 | if (ins->scbs[i].deleted) { | ||
939 | index = i; | ||
940 | break; | ||
941 | } | ||
942 | } | ||
943 | |||
944 | return index; | ||
945 | } | ||
946 | |||
947 | static dsp_scb_descriptor_t * _map_scb (cs46xx_t *chip,char * name,u32 dest) | ||
948 | { | ||
949 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
950 | dsp_scb_descriptor_t * desc = NULL; | ||
951 | int index; | ||
952 | |||
953 | if (ins->nscb == DSP_MAX_SCB_DESC - 1) { | ||
954 | snd_printk(KERN_ERR "dsp_spos: got no place for other SCB\n"); | ||
955 | return NULL; | ||
956 | } | ||
957 | |||
958 | index = find_free_scb_index (ins); | ||
959 | |||
960 | strcpy(ins->scbs[index].scb_name, name); | ||
961 | ins->scbs[index].address = dest; | ||
962 | ins->scbs[index].index = index; | ||
963 | ins->scbs[index].proc_info = NULL; | ||
964 | ins->scbs[index].ref_count = 1; | ||
965 | ins->scbs[index].deleted = 0; | ||
966 | spin_lock_init(&ins->scbs[index].lock); | ||
967 | |||
968 | desc = (ins->scbs + index); | ||
969 | ins->scbs[index].scb_symbol = add_symbol (chip, name, dest, SYMBOL_PARAMETER); | ||
970 | |||
971 | if (index > ins->scb_highest_frag_index) | ||
972 | ins->scb_highest_frag_index = index; | ||
973 | |||
974 | if (index == ins->nscb) | ||
975 | ins->nscb++; | ||
976 | |||
977 | return desc; | ||
978 | } | ||
979 | |||
980 | static dsp_task_descriptor_t * _map_task_tree (cs46xx_t *chip,char * name,u32 dest,u32 size) | ||
981 | { | ||
982 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
983 | dsp_task_descriptor_t * desc = NULL; | ||
984 | |||
985 | if (ins->ntask == DSP_MAX_TASK_DESC - 1) { | ||
986 | snd_printk(KERN_ERR "dsp_spos: got no place for other TASK\n"); | ||
987 | return NULL; | ||
988 | } | ||
989 | |||
990 | strcpy(ins->tasks[ins->ntask].task_name,name); | ||
991 | ins->tasks[ins->ntask].address = dest; | ||
992 | ins->tasks[ins->ntask].size = size; | ||
993 | |||
994 | /* quick find in list */ | ||
995 | ins->tasks[ins->ntask].index = ins->ntask; | ||
996 | desc = (ins->tasks + ins->ntask); | ||
997 | ins->ntask++; | ||
998 | |||
999 | add_symbol (chip,name,dest,SYMBOL_PARAMETER); | ||
1000 | return desc; | ||
1001 | } | ||
1002 | |||
1003 | dsp_scb_descriptor_t * cs46xx_dsp_create_scb (cs46xx_t *chip,char * name, u32 * scb_data,u32 dest) | ||
1004 | { | ||
1005 | dsp_scb_descriptor_t * desc; | ||
1006 | |||
1007 | desc = _map_scb (chip,name,dest); | ||
1008 | if (desc) { | ||
1009 | _dsp_create_scb(chip,scb_data,dest); | ||
1010 | } else { | ||
1011 | snd_printk(KERN_ERR "dsp_spos: failed to map SCB\n"); | ||
1012 | } | ||
1013 | |||
1014 | return desc; | ||
1015 | } | ||
1016 | |||
1017 | |||
1018 | static dsp_task_descriptor_t * cs46xx_dsp_create_task_tree (cs46xx_t *chip,char * name, u32 * task_data,u32 dest,int size) | ||
1019 | { | ||
1020 | dsp_task_descriptor_t * desc; | ||
1021 | |||
1022 | desc = _map_task_tree (chip,name,dest,size); | ||
1023 | if (desc) { | ||
1024 | _dsp_create_task_tree(chip,task_data,dest,size); | ||
1025 | } else { | ||
1026 | snd_printk(KERN_ERR "dsp_spos: failed to map TASK\n"); | ||
1027 | } | ||
1028 | |||
1029 | return desc; | ||
1030 | } | ||
1031 | |||
1032 | int cs46xx_dsp_scb_and_task_init (cs46xx_t *chip) | ||
1033 | { | ||
1034 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
1035 | symbol_entry_t * fg_task_tree_header_code; | ||
1036 | symbol_entry_t * task_tree_header_code; | ||
1037 | symbol_entry_t * task_tree_thread; | ||
1038 | symbol_entry_t * null_algorithm; | ||
1039 | symbol_entry_t * magic_snoop_task; | ||
1040 | |||
1041 | dsp_scb_descriptor_t * timing_master_scb; | ||
1042 | dsp_scb_descriptor_t * codec_out_scb; | ||
1043 | dsp_scb_descriptor_t * codec_in_scb; | ||
1044 | dsp_scb_descriptor_t * src_task_scb; | ||
1045 | dsp_scb_descriptor_t * master_mix_scb; | ||
1046 | dsp_scb_descriptor_t * rear_mix_scb; | ||
1047 | dsp_scb_descriptor_t * record_mix_scb; | ||
1048 | dsp_scb_descriptor_t * write_back_scb; | ||
1049 | dsp_scb_descriptor_t * vari_decimate_scb; | ||
1050 | dsp_scb_descriptor_t * rear_codec_out_scb; | ||
1051 | dsp_scb_descriptor_t * clfe_codec_out_scb; | ||
1052 | dsp_scb_descriptor_t * magic_snoop_scb; | ||
1053 | |||
1054 | int fifo_addr,fifo_span,valid_slots; | ||
1055 | |||
1056 | static spos_control_block_t sposcb = { | ||
1057 | /* 0 */ HFG_TREE_SCB,HFG_STACK, | ||
1058 | /* 1 */ SPOSCB_ADDR,BG_TREE_SCB_ADDR, | ||
1059 | /* 2 */ DSP_SPOS_DC,0, | ||
1060 | /* 3 */ DSP_SPOS_DC,DSP_SPOS_DC, | ||
1061 | /* 4 */ 0,0, | ||
1062 | /* 5 */ DSP_SPOS_UU,0, | ||
1063 | /* 6 */ FG_TASK_HEADER_ADDR,0, | ||
1064 | /* 7 */ 0,0, | ||
1065 | /* 8 */ DSP_SPOS_UU,DSP_SPOS_DC, | ||
1066 | /* 9 */ 0, | ||
1067 | /* A */ 0,HFG_FIRST_EXECUTE_MODE, | ||
1068 | /* B */ DSP_SPOS_UU,DSP_SPOS_UU, | ||
1069 | /* C */ DSP_SPOS_DC_DC, | ||
1070 | /* D */ DSP_SPOS_DC_DC, | ||
1071 | /* E */ DSP_SPOS_DC_DC, | ||
1072 | /* F */ DSP_SPOS_DC_DC | ||
1073 | }; | ||
1074 | |||
1075 | cs46xx_dsp_create_task_tree(chip, "sposCB", (u32 *)&sposcb, SPOSCB_ADDR, 0x10); | ||
1076 | |||
1077 | null_algorithm = cs46xx_dsp_lookup_symbol(chip, "NULLALGORITHM", SYMBOL_CODE); | ||
1078 | if (null_algorithm == NULL) { | ||
1079 | snd_printk(KERN_ERR "dsp_spos: symbol NULLALGORITHM not found\n"); | ||
1080 | return -EIO; | ||
1081 | } | ||
1082 | |||
1083 | fg_task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "FGTASKTREEHEADERCODE", SYMBOL_CODE); | ||
1084 | if (fg_task_tree_header_code == NULL) { | ||
1085 | snd_printk(KERN_ERR "dsp_spos: symbol FGTASKTREEHEADERCODE not found\n"); | ||
1086 | return -EIO; | ||
1087 | } | ||
1088 | |||
1089 | task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "TASKTREEHEADERCODE", SYMBOL_CODE); | ||
1090 | if (task_tree_header_code == NULL) { | ||
1091 | snd_printk(KERN_ERR "dsp_spos: symbol TASKTREEHEADERCODE not found\n"); | ||
1092 | return -EIO; | ||
1093 | } | ||
1094 | |||
1095 | task_tree_thread = cs46xx_dsp_lookup_symbol(chip, "TASKTREETHREAD", SYMBOL_CODE); | ||
1096 | if (task_tree_thread == NULL) { | ||
1097 | snd_printk(KERN_ERR "dsp_spos: symbol TASKTREETHREAD not found\n"); | ||
1098 | return -EIO; | ||
1099 | } | ||
1100 | |||
1101 | magic_snoop_task = cs46xx_dsp_lookup_symbol(chip, "MAGICSNOOPTASK", SYMBOL_CODE); | ||
1102 | if (magic_snoop_task == NULL) { | ||
1103 | snd_printk(KERN_ERR "dsp_spos: symbol MAGICSNOOPTASK not found\n"); | ||
1104 | return -EIO; | ||
1105 | } | ||
1106 | |||
1107 | { | ||
1108 | /* create the null SCB */ | ||
1109 | static generic_scb_t null_scb = { | ||
1110 | { 0, 0, 0, 0 }, | ||
1111 | { 0, 0, 0, 0, 0 }, | ||
1112 | NULL_SCB_ADDR, NULL_SCB_ADDR, | ||
1113 | 0, 0, 0, 0, 0, | ||
1114 | { | ||
1115 | 0,0, | ||
1116 | 0,0, | ||
1117 | } | ||
1118 | }; | ||
1119 | |||
1120 | null_scb.entry_point = null_algorithm->address; | ||
1121 | ins->the_null_scb = cs46xx_dsp_create_scb(chip, "nullSCB", (u32 *)&null_scb, NULL_SCB_ADDR); | ||
1122 | ins->the_null_scb->task_entry = null_algorithm; | ||
1123 | ins->the_null_scb->sub_list_ptr = ins->the_null_scb; | ||
1124 | ins->the_null_scb->next_scb_ptr = ins->the_null_scb; | ||
1125 | ins->the_null_scb->parent_scb_ptr = NULL; | ||
1126 | cs46xx_dsp_proc_register_scb_desc (chip,ins->the_null_scb); | ||
1127 | } | ||
1128 | |||
1129 | { | ||
1130 | /* setup foreground task tree */ | ||
1131 | static task_tree_control_block_t fg_task_tree_hdr = { | ||
1132 | { FG_TASK_HEADER_ADDR | (DSP_SPOS_DC << 0x10), | ||
1133 | DSP_SPOS_DC_DC, | ||
1134 | DSP_SPOS_DC_DC, | ||
1135 | 0x0000,DSP_SPOS_DC, | ||
1136 | DSP_SPOS_DC, DSP_SPOS_DC, | ||
1137 | DSP_SPOS_DC_DC, | ||
1138 | DSP_SPOS_DC_DC, | ||
1139 | DSP_SPOS_DC_DC, | ||
1140 | DSP_SPOS_DC,DSP_SPOS_DC }, | ||
1141 | |||
1142 | { | ||
1143 | BG_TREE_SCB_ADDR,TIMINGMASTER_SCB_ADDR, | ||
1144 | 0, | ||
1145 | FG_TASK_HEADER_ADDR + TCBData, | ||
1146 | }, | ||
1147 | |||
1148 | { | ||
1149 | 4,0, | ||
1150 | 1,0, | ||
1151 | 2,SPOSCB_ADDR + HFGFlags, | ||
1152 | 0,0, | ||
1153 | FG_TASK_HEADER_ADDR + TCBContextBlk,FG_STACK | ||
1154 | }, | ||
1155 | |||
1156 | { | ||
1157 | DSP_SPOS_DC,0, | ||
1158 | DSP_SPOS_DC,DSP_SPOS_DC, | ||
1159 | DSP_SPOS_DC,DSP_SPOS_DC, | ||
1160 | DSP_SPOS_DC,DSP_SPOS_DC, | ||
1161 | DSP_SPOS_DC,DSP_SPOS_DC, | ||
1162 | DSP_SPOS_DCDC, | ||
1163 | DSP_SPOS_UU,1, | ||
1164 | DSP_SPOS_DCDC, | ||
1165 | DSP_SPOS_DCDC, | ||
1166 | DSP_SPOS_DCDC, | ||
1167 | DSP_SPOS_DCDC, | ||
1168 | DSP_SPOS_DCDC, | ||
1169 | DSP_SPOS_DCDC, | ||
1170 | DSP_SPOS_DCDC, | ||
1171 | DSP_SPOS_DCDC, | ||
1172 | DSP_SPOS_DCDC, | ||
1173 | DSP_SPOS_DCDC, | ||
1174 | DSP_SPOS_DCDC, | ||
1175 | DSP_SPOS_DCDC, | ||
1176 | DSP_SPOS_DCDC, | ||
1177 | DSP_SPOS_DCDC, | ||
1178 | DSP_SPOS_DCDC, | ||
1179 | DSP_SPOS_DCDC, | ||
1180 | DSP_SPOS_DCDC, | ||
1181 | DSP_SPOS_DCDC, | ||
1182 | DSP_SPOS_DCDC, | ||
1183 | DSP_SPOS_DCDC, | ||
1184 | DSP_SPOS_DCDC, | ||
1185 | DSP_SPOS_DCDC, | ||
1186 | DSP_SPOS_DCDC, | ||
1187 | DSP_SPOS_DCDC, | ||
1188 | DSP_SPOS_DCDC, | ||
1189 | DSP_SPOS_DCDC, | ||
1190 | DSP_SPOS_DCDC, | ||
1191 | DSP_SPOS_DCDC | ||
1192 | }, | ||
1193 | { | ||
1194 | FG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU, | ||
1195 | 0,0 | ||
1196 | } | ||
1197 | }; | ||
1198 | |||
1199 | fg_task_tree_hdr.links.entry_point = fg_task_tree_header_code->address; | ||
1200 | fg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address; | ||
1201 | cs46xx_dsp_create_task_tree(chip,"FGtaskTreeHdr",(u32 *)&fg_task_tree_hdr,FG_TASK_HEADER_ADDR,0x35); | ||
1202 | } | ||
1203 | |||
1204 | |||
1205 | { | ||
1206 | /* setup foreground task tree */ | ||
1207 | static task_tree_control_block_t bg_task_tree_hdr = { | ||
1208 | { DSP_SPOS_DC_DC, | ||
1209 | DSP_SPOS_DC_DC, | ||
1210 | DSP_SPOS_DC_DC, | ||
1211 | DSP_SPOS_DC, DSP_SPOS_DC, | ||
1212 | DSP_SPOS_DC, DSP_SPOS_DC, | ||
1213 | DSP_SPOS_DC_DC, | ||
1214 | DSP_SPOS_DC_DC, | ||
1215 | DSP_SPOS_DC_DC, | ||
1216 | DSP_SPOS_DC,DSP_SPOS_DC }, | ||
1217 | |||
1218 | { | ||
1219 | NULL_SCB_ADDR,NULL_SCB_ADDR, /* Set up the background to do nothing */ | ||
1220 | 0, | ||
1221 | BG_TREE_SCB_ADDR + TCBData, | ||
1222 | }, | ||
1223 | |||
1224 | { | ||
1225 | 9999,0, | ||
1226 | 0,1, | ||
1227 | 0,SPOSCB_ADDR + HFGFlags, | ||
1228 | 0,0, | ||
1229 | BG_TREE_SCB_ADDR + TCBContextBlk,BG_STACK | ||
1230 | }, | ||
1231 | |||
1232 | { | ||
1233 | DSP_SPOS_DC,0, | ||
1234 | DSP_SPOS_DC,DSP_SPOS_DC, | ||
1235 | DSP_SPOS_DC,DSP_SPOS_DC, | ||
1236 | DSP_SPOS_DC,DSP_SPOS_DC, | ||
1237 | DSP_SPOS_DC,DSP_SPOS_DC, | ||
1238 | DSP_SPOS_DCDC, | ||
1239 | DSP_SPOS_UU,1, | ||
1240 | DSP_SPOS_DCDC, | ||
1241 | DSP_SPOS_DCDC, | ||
1242 | DSP_SPOS_DCDC, | ||
1243 | DSP_SPOS_DCDC, | ||
1244 | DSP_SPOS_DCDC, | ||
1245 | DSP_SPOS_DCDC, | ||
1246 | DSP_SPOS_DCDC, | ||
1247 | DSP_SPOS_DCDC, | ||
1248 | DSP_SPOS_DCDC, | ||
1249 | DSP_SPOS_DCDC, | ||
1250 | DSP_SPOS_DCDC, | ||
1251 | DSP_SPOS_DCDC, | ||
1252 | DSP_SPOS_DCDC, | ||
1253 | DSP_SPOS_DCDC, | ||
1254 | DSP_SPOS_DCDC, | ||
1255 | DSP_SPOS_DCDC, | ||
1256 | DSP_SPOS_DCDC, | ||
1257 | DSP_SPOS_DCDC, | ||
1258 | DSP_SPOS_DCDC, | ||
1259 | DSP_SPOS_DCDC, | ||
1260 | DSP_SPOS_DCDC, | ||
1261 | DSP_SPOS_DCDC, | ||
1262 | DSP_SPOS_DCDC, | ||
1263 | DSP_SPOS_DCDC, | ||
1264 | DSP_SPOS_DCDC, | ||
1265 | DSP_SPOS_DCDC, | ||
1266 | DSP_SPOS_DCDC, | ||
1267 | DSP_SPOS_DCDC | ||
1268 | }, | ||
1269 | { | ||
1270 | BG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU, | ||
1271 | 0,0 | ||
1272 | } | ||
1273 | }; | ||
1274 | |||
1275 | bg_task_tree_hdr.links.entry_point = task_tree_header_code->address; | ||
1276 | bg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address; | ||
1277 | cs46xx_dsp_create_task_tree(chip,"BGtaskTreeHdr",(u32 *)&bg_task_tree_hdr,BG_TREE_SCB_ADDR,0x35); | ||
1278 | } | ||
1279 | |||
1280 | /* create timing master SCB */ | ||
1281 | timing_master_scb = cs46xx_dsp_create_timing_master_scb(chip); | ||
1282 | |||
1283 | /* create the CODEC output task */ | ||
1284 | codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_I",0x0010,0x0000, | ||
1285 | MASTERMIX_SCB_ADDR, | ||
1286 | CODECOUT_SCB_ADDR,timing_master_scb, | ||
1287 | SCB_ON_PARENT_SUBLIST_SCB); | ||
1288 | |||
1289 | if (!codec_out_scb) goto _fail_end; | ||
1290 | /* create the master mix SCB */ | ||
1291 | master_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"MasterMixSCB", | ||
1292 | MIX_SAMPLE_BUF1,MASTERMIX_SCB_ADDR, | ||
1293 | codec_out_scb, | ||
1294 | SCB_ON_PARENT_SUBLIST_SCB); | ||
1295 | ins->master_mix_scb = master_mix_scb; | ||
1296 | |||
1297 | if (!master_mix_scb) goto _fail_end; | ||
1298 | |||
1299 | /* create codec in */ | ||
1300 | codec_in_scb = cs46xx_dsp_create_codec_in_scb(chip,"CodecInSCB",0x0010,0x00A0, | ||
1301 | CODEC_INPUT_BUF1, | ||
1302 | CODECIN_SCB_ADDR,codec_out_scb, | ||
1303 | SCB_ON_PARENT_NEXT_SCB); | ||
1304 | if (!codec_in_scb) goto _fail_end; | ||
1305 | ins->codec_in_scb = codec_in_scb; | ||
1306 | |||
1307 | /* create write back scb */ | ||
1308 | write_back_scb = cs46xx_dsp_create_mix_to_ostream_scb(chip,"WriteBackSCB", | ||
1309 | WRITE_BACK_BUF1,WRITE_BACK_SPB, | ||
1310 | WRITEBACK_SCB_ADDR, | ||
1311 | timing_master_scb, | ||
1312 | SCB_ON_PARENT_NEXT_SCB); | ||
1313 | if (!write_back_scb) goto _fail_end; | ||
1314 | |||
1315 | { | ||
1316 | static mix2_ostream_spb_t mix2_ostream_spb = { | ||
1317 | 0x00020000, | ||
1318 | 0x0000ffff | ||
1319 | }; | ||
1320 | |||
1321 | /* dirty hack ... */ | ||
1322 | _dsp_create_task_tree (chip,(u32 *)&mix2_ostream_spb,WRITE_BACK_SPB,2); | ||
1323 | } | ||
1324 | |||
1325 | /* input sample converter */ | ||
1326 | vari_decimate_scb = cs46xx_dsp_create_vari_decimate_scb(chip,"VariDecimateSCB", | ||
1327 | VARI_DECIMATE_BUF0, | ||
1328 | VARI_DECIMATE_BUF1, | ||
1329 | VARIDECIMATE_SCB_ADDR, | ||
1330 | write_back_scb, | ||
1331 | SCB_ON_PARENT_SUBLIST_SCB); | ||
1332 | if (!vari_decimate_scb) goto _fail_end; | ||
1333 | |||
1334 | /* create the record mixer SCB */ | ||
1335 | record_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RecordMixerSCB", | ||
1336 | MIX_SAMPLE_BUF2, | ||
1337 | RECORD_MIXER_SCB_ADDR, | ||
1338 | vari_decimate_scb, | ||
1339 | SCB_ON_PARENT_SUBLIST_SCB); | ||
1340 | ins->record_mixer_scb = record_mix_scb; | ||
1341 | |||
1342 | if (!record_mix_scb) goto _fail_end; | ||
1343 | |||
1344 | valid_slots = snd_cs46xx_peekBA0(chip, BA0_ACOSV); | ||
1345 | |||
1346 | snd_assert (chip->nr_ac97_codecs == 1 || chip->nr_ac97_codecs == 2); | ||
1347 | |||
1348 | if (chip->nr_ac97_codecs == 1) { | ||
1349 | /* output on slot 5 and 11 | ||
1350 | on primary CODEC */ | ||
1351 | fifo_addr = 0x20; | ||
1352 | fifo_span = 0x60; | ||
1353 | |||
1354 | /* enable slot 5 and 11 */ | ||
1355 | valid_slots |= ACOSV_SLV5 | ACOSV_SLV11; | ||
1356 | } else { | ||
1357 | /* output on slot 7 and 8 | ||
1358 | on secondary CODEC */ | ||
1359 | fifo_addr = 0x40; | ||
1360 | fifo_span = 0x10; | ||
1361 | |||
1362 | /* enable slot 7 and 8 */ | ||
1363 | valid_slots |= ACOSV_SLV7 | ACOSV_SLV8; | ||
1364 | } | ||
1365 | /* create CODEC tasklet for rear speakers output*/ | ||
1366 | rear_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_Rear",fifo_span,fifo_addr, | ||
1367 | REAR_MIXER_SCB_ADDR, | ||
1368 | REAR_CODECOUT_SCB_ADDR,codec_in_scb, | ||
1369 | SCB_ON_PARENT_NEXT_SCB); | ||
1370 | if (!rear_codec_out_scb) goto _fail_end; | ||
1371 | |||
1372 | |||
1373 | /* create the rear PCM channel mixer SCB */ | ||
1374 | rear_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RearMixerSCB", | ||
1375 | MIX_SAMPLE_BUF3, | ||
1376 | REAR_MIXER_SCB_ADDR, | ||
1377 | rear_codec_out_scb, | ||
1378 | SCB_ON_PARENT_SUBLIST_SCB); | ||
1379 | ins->rear_mix_scb = rear_mix_scb; | ||
1380 | if (!rear_mix_scb) goto _fail_end; | ||
1381 | |||
1382 | if (chip->nr_ac97_codecs == 2) { | ||
1383 | /* create CODEC tasklet for rear Center/LFE output | ||
1384 | slot 6 and 9 on seconadry CODEC */ | ||
1385 | clfe_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_CLFE",0x0030,0x0030, | ||
1386 | CLFE_MIXER_SCB_ADDR, | ||
1387 | CLFE_CODEC_SCB_ADDR, | ||
1388 | rear_codec_out_scb, | ||
1389 | SCB_ON_PARENT_NEXT_SCB); | ||
1390 | if (!clfe_codec_out_scb) goto _fail_end; | ||
1391 | |||
1392 | |||
1393 | /* create the rear PCM channel mixer SCB */ | ||
1394 | ins->center_lfe_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"CLFEMixerSCB", | ||
1395 | MIX_SAMPLE_BUF4, | ||
1396 | CLFE_MIXER_SCB_ADDR, | ||
1397 | clfe_codec_out_scb, | ||
1398 | SCB_ON_PARENT_SUBLIST_SCB); | ||
1399 | if (!ins->center_lfe_mix_scb) goto _fail_end; | ||
1400 | |||
1401 | /* enable slot 6 and 9 */ | ||
1402 | valid_slots |= ACOSV_SLV6 | ACOSV_SLV9; | ||
1403 | } else { | ||
1404 | clfe_codec_out_scb = rear_codec_out_scb; | ||
1405 | ins->center_lfe_mix_scb = rear_mix_scb; | ||
1406 | } | ||
1407 | |||
1408 | /* enable slots depending on CODEC configuration */ | ||
1409 | snd_cs46xx_pokeBA0(chip, BA0_ACOSV, valid_slots); | ||
1410 | |||
1411 | /* the magic snooper */ | ||
1412 | magic_snoop_scb = cs46xx_dsp_create_magic_snoop_scb (chip,"MagicSnoopSCB_I",OUTPUTSNOOP_SCB_ADDR, | ||
1413 | OUTPUT_SNOOP_BUFFER, | ||
1414 | codec_out_scb, | ||
1415 | clfe_codec_out_scb, | ||
1416 | SCB_ON_PARENT_NEXT_SCB); | ||
1417 | |||
1418 | |||
1419 | if (!magic_snoop_scb) goto _fail_end; | ||
1420 | ins->ref_snoop_scb = magic_snoop_scb; | ||
1421 | |||
1422 | /* SP IO access */ | ||
1423 | if (!cs46xx_dsp_create_spio_write_scb(chip,"SPIOWriteSCB",SPIOWRITE_SCB_ADDR, | ||
1424 | magic_snoop_scb, | ||
1425 | SCB_ON_PARENT_NEXT_SCB)) | ||
1426 | goto _fail_end; | ||
1427 | |||
1428 | /* SPDIF input sampel rate converter */ | ||
1429 | src_task_scb = cs46xx_dsp_create_src_task_scb(chip,"SrcTaskSCB_SPDIFI", | ||
1430 | ins->spdif_in_sample_rate, | ||
1431 | SRC_OUTPUT_BUF1, | ||
1432 | SRC_DELAY_BUF1,SRCTASK_SCB_ADDR, | ||
1433 | master_mix_scb, | ||
1434 | SCB_ON_PARENT_SUBLIST_SCB,1); | ||
1435 | |||
1436 | if (!src_task_scb) goto _fail_end; | ||
1437 | cs46xx_src_unlink(chip,src_task_scb); | ||
1438 | |||
1439 | /* NOTE: when we now how to detect the SPDIF input | ||
1440 | sample rate we will use this SRC to adjust it */ | ||
1441 | ins->spdif_in_src = src_task_scb; | ||
1442 | |||
1443 | cs46xx_dsp_async_init(chip,timing_master_scb); | ||
1444 | return 0; | ||
1445 | |||
1446 | _fail_end: | ||
1447 | snd_printk(KERN_ERR "dsp_spos: failed to setup SCB's in DSP\n"); | ||
1448 | return -EINVAL; | ||
1449 | } | ||
1450 | |||
1451 | static int cs46xx_dsp_async_init (cs46xx_t *chip, dsp_scb_descriptor_t * fg_entry) | ||
1452 | { | ||
1453 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
1454 | symbol_entry_t * s16_async_codec_input_task; | ||
1455 | symbol_entry_t * spdifo_task; | ||
1456 | symbol_entry_t * spdifi_task; | ||
1457 | dsp_scb_descriptor_t * spdifi_scb_desc,* spdifo_scb_desc,* async_codec_scb_desc; | ||
1458 | |||
1459 | s16_async_codec_input_task = cs46xx_dsp_lookup_symbol(chip, "S16_ASYNCCODECINPUTTASK", SYMBOL_CODE); | ||
1460 | if (s16_async_codec_input_task == NULL) { | ||
1461 | snd_printk(KERN_ERR "dsp_spos: symbol S16_ASYNCCODECINPUTTASK not found\n"); | ||
1462 | return -EIO; | ||
1463 | } | ||
1464 | spdifo_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFOTASK", SYMBOL_CODE); | ||
1465 | if (spdifo_task == NULL) { | ||
1466 | snd_printk(KERN_ERR "dsp_spos: symbol SPDIFOTASK not found\n"); | ||
1467 | return -EIO; | ||
1468 | } | ||
1469 | |||
1470 | spdifi_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFITASK", SYMBOL_CODE); | ||
1471 | if (spdifi_task == NULL) { | ||
1472 | snd_printk(KERN_ERR "dsp_spos: symbol SPDIFITASK not found\n"); | ||
1473 | return -EIO; | ||
1474 | } | ||
1475 | |||
1476 | { | ||
1477 | /* 0xBC0 */ | ||
1478 | spdifoscb_t spdifo_scb = { | ||
1479 | /* 0 */ DSP_SPOS_UUUU, | ||
1480 | { | ||
1481 | /* 1 */ 0xb0, | ||
1482 | /* 2 */ 0, | ||
1483 | /* 3 */ 0, | ||
1484 | /* 4 */ 0, | ||
1485 | }, | ||
1486 | /* NOTE: the SPDIF output task read samples in mono | ||
1487 | format, the AsynchFGTxSCB task writes to buffer | ||
1488 | in stereo format | ||
1489 | */ | ||
1490 | /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_256, | ||
1491 | /* 6 */ ( SPDIFO_IP_OUTPUT_BUFFER1 << 0x10 ) | 0xFFFC, | ||
1492 | /* 7 */ 0,0, | ||
1493 | /* 8 */ 0, | ||
1494 | /* 9 */ FG_TASK_HEADER_ADDR, NULL_SCB_ADDR, | ||
1495 | /* A */ spdifo_task->address, | ||
1496 | SPDIFO_SCB_INST + SPDIFOFIFOPointer, | ||
1497 | { | ||
1498 | /* B */ 0x0040, /*DSP_SPOS_UUUU,*/ | ||
1499 | /* C */ 0x20ff, /*DSP_SPOS_UUUU,*/ | ||
1500 | }, | ||
1501 | /* D */ 0x804c,0, /* SPDIFOFIFOPointer:SPDIFOStatRegAddr; */ | ||
1502 | /* E */ 0x0108,0x0001, /* SPDIFOStMoFormat:SPDIFOFIFOBaseAddr; */ | ||
1503 | /* F */ DSP_SPOS_UUUU /* SPDIFOFree; */ | ||
1504 | }; | ||
1505 | |||
1506 | /* 0xBB0 */ | ||
1507 | spdifiscb_t spdifi_scb = { | ||
1508 | /* 0 */ DSP_SPOS_UULO,DSP_SPOS_UUHI, | ||
1509 | /* 1 */ 0, | ||
1510 | /* 2 */ 0, | ||
1511 | /* 3 */ 1,4000, /* SPDIFICountLimit SPDIFICount */ | ||
1512 | /* 4 */ DSP_SPOS_UUUU, /* SPDIFIStatusData */ | ||
1513 | /* 5 */ 0,DSP_SPOS_UUHI, /* StatusData, Free4 */ | ||
1514 | /* 6 */ DSP_SPOS_UUUU, /* Free3 */ | ||
1515 | /* 7 */ DSP_SPOS_UU,DSP_SPOS_DC, /* Free2 BitCount*/ | ||
1516 | /* 8 */ DSP_SPOS_UUUU, /* TempStatus */ | ||
1517 | /* 9 */ SPDIFO_SCB_INST, NULL_SCB_ADDR, | ||
1518 | /* A */ spdifi_task->address, | ||
1519 | SPDIFI_SCB_INST + SPDIFIFIFOPointer, | ||
1520 | /* NOTE: The SPDIF input task write the sample in mono | ||
1521 | format from the HW FIFO, the AsynchFGRxSCB task reads | ||
1522 | them in stereo | ||
1523 | */ | ||
1524 | /* B */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_128, | ||
1525 | /* C */ (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC, | ||
1526 | /* D */ 0x8048,0, | ||
1527 | /* E */ 0x01f0,0x0001, | ||
1528 | /* F */ DSP_SPOS_UUUU /* SPDIN_STATUS monitor */ | ||
1529 | }; | ||
1530 | |||
1531 | /* 0xBA0 */ | ||
1532 | async_codec_input_scb_t async_codec_input_scb = { | ||
1533 | /* 0 */ DSP_SPOS_UUUU, | ||
1534 | /* 1 */ 0, | ||
1535 | /* 2 */ 0, | ||
1536 | /* 3 */ 1,4000, | ||
1537 | /* 4 */ 0x0118,0x0001, | ||
1538 | /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_64, | ||
1539 | /* 6 */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC, | ||
1540 | /* 7 */ DSP_SPOS_UU,0x3, | ||
1541 | /* 8 */ DSP_SPOS_UUUU, | ||
1542 | /* 9 */ SPDIFI_SCB_INST,NULL_SCB_ADDR, | ||
1543 | /* A */ s16_async_codec_input_task->address, | ||
1544 | HFG_TREE_SCB + AsyncCIOFIFOPointer, | ||
1545 | |||
1546 | /* B */ RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_64, | ||
1547 | /* C */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10), /*(ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,*/ | ||
1548 | |||
1549 | #ifdef UseASER1Input | ||
1550 | /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr; | ||
1551 | Init. 0000:8042: for ASER1 | ||
1552 | 0000:8044: for ASER2 */ | ||
1553 | /* D */ 0x8042,0, | ||
1554 | |||
1555 | /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr; | ||
1556 | Init 1 stero:8050 ASER1 | ||
1557 | Init 0 mono:8070 ASER2 | ||
1558 | Init 1 Stereo : 0100 ASER1 (Set by script) */ | ||
1559 | /* E */ 0x0100,0x0001, | ||
1560 | |||
1561 | #endif | ||
1562 | |||
1563 | #ifdef UseASER2Input | ||
1564 | /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr; | ||
1565 | Init. 0000:8042: for ASER1 | ||
1566 | 0000:8044: for ASER2 */ | ||
1567 | /* D */ 0x8044,0, | ||
1568 | |||
1569 | /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr; | ||
1570 | Init 1 stero:8050 ASER1 | ||
1571 | Init 0 mono:8070 ASER2 | ||
1572 | Init 1 Stereo : 0100 ASER1 (Set by script) */ | ||
1573 | /* E */ 0x0110,0x0001, | ||
1574 | |||
1575 | #endif | ||
1576 | |||
1577 | /* short AsyncCIOutputBufModulo:AsyncCIFree; | ||
1578 | AsyncCIOutputBufModulo: The modulo size for | ||
1579 | the output buffer of this task */ | ||
1580 | /* F */ 0, /* DSP_SPOS_UUUU */ | ||
1581 | }; | ||
1582 | |||
1583 | spdifo_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFOSCB",(u32 *)&spdifo_scb,SPDIFO_SCB_INST); | ||
1584 | |||
1585 | snd_assert(spdifo_scb_desc, return -EIO); | ||
1586 | spdifi_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFISCB",(u32 *)&spdifi_scb,SPDIFI_SCB_INST); | ||
1587 | snd_assert(spdifi_scb_desc, return -EIO); | ||
1588 | async_codec_scb_desc = cs46xx_dsp_create_scb(chip,"AsynCodecInputSCB",(u32 *)&async_codec_input_scb, HFG_TREE_SCB); | ||
1589 | snd_assert(async_codec_scb_desc, return -EIO); | ||
1590 | |||
1591 | async_codec_scb_desc->parent_scb_ptr = NULL; | ||
1592 | async_codec_scb_desc->next_scb_ptr = spdifi_scb_desc; | ||
1593 | async_codec_scb_desc->sub_list_ptr = ins->the_null_scb; | ||
1594 | async_codec_scb_desc->task_entry = s16_async_codec_input_task; | ||
1595 | |||
1596 | spdifi_scb_desc->parent_scb_ptr = async_codec_scb_desc; | ||
1597 | spdifi_scb_desc->next_scb_ptr = spdifo_scb_desc; | ||
1598 | spdifi_scb_desc->sub_list_ptr = ins->the_null_scb; | ||
1599 | spdifi_scb_desc->task_entry = spdifi_task; | ||
1600 | |||
1601 | spdifo_scb_desc->parent_scb_ptr = spdifi_scb_desc; | ||
1602 | spdifo_scb_desc->next_scb_ptr = fg_entry; | ||
1603 | spdifo_scb_desc->sub_list_ptr = ins->the_null_scb; | ||
1604 | spdifo_scb_desc->task_entry = spdifo_task; | ||
1605 | |||
1606 | /* this one is faked, as the parnet of SPDIFO task | ||
1607 | is the FG task tree */ | ||
1608 | fg_entry->parent_scb_ptr = spdifo_scb_desc; | ||
1609 | |||
1610 | /* for proc fs */ | ||
1611 | cs46xx_dsp_proc_register_scb_desc (chip,spdifo_scb_desc); | ||
1612 | cs46xx_dsp_proc_register_scb_desc (chip,spdifi_scb_desc); | ||
1613 | cs46xx_dsp_proc_register_scb_desc (chip,async_codec_scb_desc); | ||
1614 | |||
1615 | /* Async MASTER ENABLE, affects both SPDIF input and output */ | ||
1616 | snd_cs46xx_pokeBA0(chip, BA0_ASER_MASTER, 0x1 ); | ||
1617 | } | ||
1618 | |||
1619 | return 0; | ||
1620 | } | ||
1621 | |||
1622 | |||
1623 | static void cs46xx_dsp_disable_spdif_hw (cs46xx_t *chip) | ||
1624 | { | ||
1625 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
1626 | |||
1627 | /* set SPDIF output FIFO slot */ | ||
1628 | snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, 0); | ||
1629 | |||
1630 | /* SPDIF output MASTER ENABLE */ | ||
1631 | cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0); | ||
1632 | |||
1633 | /* right and left validate bit */ | ||
1634 | /*cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);*/ | ||
1635 | cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, 0x0); | ||
1636 | |||
1637 | /* clear fifo pointer */ | ||
1638 | cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0); | ||
1639 | |||
1640 | /* monitor state */ | ||
1641 | ins->spdif_status_out &= ~DSP_SPDIF_STATUS_HW_ENABLED; | ||
1642 | } | ||
1643 | |||
1644 | int cs46xx_dsp_enable_spdif_hw (cs46xx_t *chip) | ||
1645 | { | ||
1646 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
1647 | |||
1648 | /* if hw-ctrl already enabled, turn off to reset logic ... */ | ||
1649 | cs46xx_dsp_disable_spdif_hw (chip); | ||
1650 | udelay(50); | ||
1651 | |||
1652 | /* set SPDIF output FIFO slot */ | ||
1653 | snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, ( 0x8000 | ((SP_SPDOUT_FIFO >> 4) << 4) )); | ||
1654 | |||
1655 | /* SPDIF output MASTER ENABLE */ | ||
1656 | cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0x80000000); | ||
1657 | |||
1658 | /* right and left validate bit */ | ||
1659 | cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default); | ||
1660 | |||
1661 | /* monitor state */ | ||
1662 | ins->spdif_status_out |= DSP_SPDIF_STATUS_HW_ENABLED; | ||
1663 | |||
1664 | return 0; | ||
1665 | } | ||
1666 | |||
1667 | int cs46xx_dsp_enable_spdif_in (cs46xx_t *chip) | ||
1668 | { | ||
1669 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
1670 | |||
1671 | /* turn on amplifier */ | ||
1672 | chip->active_ctrl(chip, 1); | ||
1673 | chip->amplifier_ctrl(chip, 1); | ||
1674 | |||
1675 | snd_assert (ins->asynch_rx_scb == NULL,return -EINVAL); | ||
1676 | snd_assert (ins->spdif_in_src != NULL,return -EINVAL); | ||
1677 | |||
1678 | down(&chip->spos_mutex); | ||
1679 | |||
1680 | if ( ! (ins->spdif_status_out & DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED) ) { | ||
1681 | /* time countdown enable */ | ||
1682 | cs46xx_poke_via_dsp (chip,SP_ASER_COUNTDOWN, 0x80000005); | ||
1683 | /* NOTE: 80000005 value is just magic. With all values | ||
1684 | that I've tested this one seem to give the best result. | ||
1685 | Got no explication why. (Benny) */ | ||
1686 | |||
1687 | /* SPDIF input MASTER ENABLE */ | ||
1688 | cs46xx_poke_via_dsp (chip,SP_SPDIN_CONTROL, 0x800003ff); | ||
1689 | |||
1690 | ins->spdif_status_out |= DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED; | ||
1691 | } | ||
1692 | |||
1693 | /* create and start the asynchronous receiver SCB */ | ||
1694 | ins->asynch_rx_scb = cs46xx_dsp_create_asynch_fg_rx_scb(chip,"AsynchFGRxSCB", | ||
1695 | ASYNCRX_SCB_ADDR, | ||
1696 | SPDIFI_SCB_INST, | ||
1697 | SPDIFI_IP_OUTPUT_BUFFER1, | ||
1698 | ins->spdif_in_src, | ||
1699 | SCB_ON_PARENT_SUBLIST_SCB); | ||
1700 | |||
1701 | spin_lock_irq(&chip->reg_lock); | ||
1702 | |||
1703 | /* reset SPDIF input sample buffer pointer */ | ||
1704 | /*snd_cs46xx_poke (chip, (SPDIFI_SCB_INST + 0x0c) << 2, | ||
1705 | (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC);*/ | ||
1706 | |||
1707 | /* reset FIFO ptr */ | ||
1708 | /*cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);*/ | ||
1709 | cs46xx_src_link(chip,ins->spdif_in_src); | ||
1710 | |||
1711 | /* unmute SRC volume */ | ||
1712 | cs46xx_dsp_scb_set_volume (chip,ins->spdif_in_src,0x7fff,0x7fff); | ||
1713 | |||
1714 | spin_unlock_irq(&chip->reg_lock); | ||
1715 | |||
1716 | /* set SPDIF input sample rate and unmute | ||
1717 | NOTE: only 48khz support for SPDIF input this time */ | ||
1718 | /* cs46xx_dsp_set_src_sample_rate(chip,ins->spdif_in_src,48000); */ | ||
1719 | |||
1720 | /* monitor state */ | ||
1721 | ins->spdif_status_in = 1; | ||
1722 | up(&chip->spos_mutex); | ||
1723 | |||
1724 | return 0; | ||
1725 | } | ||
1726 | |||
1727 | int cs46xx_dsp_disable_spdif_in (cs46xx_t *chip) | ||
1728 | { | ||
1729 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
1730 | |||
1731 | snd_assert (ins->asynch_rx_scb != NULL, return -EINVAL); | ||
1732 | snd_assert (ins->spdif_in_src != NULL,return -EINVAL); | ||
1733 | |||
1734 | down(&chip->spos_mutex); | ||
1735 | |||
1736 | /* Remove the asynchronous receiver SCB */ | ||
1737 | cs46xx_dsp_remove_scb (chip,ins->asynch_rx_scb); | ||
1738 | ins->asynch_rx_scb = NULL; | ||
1739 | |||
1740 | cs46xx_src_unlink(chip,ins->spdif_in_src); | ||
1741 | |||
1742 | /* monitor state */ | ||
1743 | ins->spdif_status_in = 0; | ||
1744 | up(&chip->spos_mutex); | ||
1745 | |||
1746 | /* restore amplifier */ | ||
1747 | chip->active_ctrl(chip, -1); | ||
1748 | chip->amplifier_ctrl(chip, -1); | ||
1749 | |||
1750 | return 0; | ||
1751 | } | ||
1752 | |||
1753 | int cs46xx_dsp_enable_pcm_capture (cs46xx_t *chip) | ||
1754 | { | ||
1755 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
1756 | |||
1757 | snd_assert (ins->pcm_input == NULL,return -EINVAL); | ||
1758 | snd_assert (ins->ref_snoop_scb != NULL,return -EINVAL); | ||
1759 | |||
1760 | down(&chip->spos_mutex); | ||
1761 | ins->pcm_input = cs46xx_add_record_source(chip,ins->ref_snoop_scb,PCMSERIALIN_PCM_SCB_ADDR, | ||
1762 | "PCMSerialInput_Wave"); | ||
1763 | up(&chip->spos_mutex); | ||
1764 | |||
1765 | return 0; | ||
1766 | } | ||
1767 | |||
1768 | int cs46xx_dsp_disable_pcm_capture (cs46xx_t *chip) | ||
1769 | { | ||
1770 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
1771 | |||
1772 | snd_assert (ins->pcm_input != NULL,return -EINVAL); | ||
1773 | |||
1774 | down(&chip->spos_mutex); | ||
1775 | cs46xx_dsp_remove_scb (chip,ins->pcm_input); | ||
1776 | ins->pcm_input = NULL; | ||
1777 | up(&chip->spos_mutex); | ||
1778 | |||
1779 | return 0; | ||
1780 | } | ||
1781 | |||
1782 | int cs46xx_dsp_enable_adc_capture (cs46xx_t *chip) | ||
1783 | { | ||
1784 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
1785 | |||
1786 | snd_assert (ins->adc_input == NULL,return -EINVAL); | ||
1787 | snd_assert (ins->codec_in_scb != NULL,return -EINVAL); | ||
1788 | |||
1789 | down(&chip->spos_mutex); | ||
1790 | ins->adc_input = cs46xx_add_record_source(chip,ins->codec_in_scb,PCMSERIALIN_SCB_ADDR, | ||
1791 | "PCMSerialInput_ADC"); | ||
1792 | up(&chip->spos_mutex); | ||
1793 | |||
1794 | return 0; | ||
1795 | } | ||
1796 | |||
1797 | int cs46xx_dsp_disable_adc_capture (cs46xx_t *chip) | ||
1798 | { | ||
1799 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
1800 | |||
1801 | snd_assert (ins->adc_input != NULL,return -EINVAL); | ||
1802 | |||
1803 | down(&chip->spos_mutex); | ||
1804 | cs46xx_dsp_remove_scb (chip,ins->adc_input); | ||
1805 | ins->adc_input = NULL; | ||
1806 | up(&chip->spos_mutex); | ||
1807 | |||
1808 | return 0; | ||
1809 | } | ||
1810 | |||
1811 | int cs46xx_poke_via_dsp (cs46xx_t *chip,u32 address,u32 data) | ||
1812 | { | ||
1813 | u32 temp; | ||
1814 | int i; | ||
1815 | |||
1816 | /* santiy check the parameters. (These numbers are not 100% correct. They are | ||
1817 | a rough guess from looking at the controller spec.) */ | ||
1818 | if (address < 0x8000 || address >= 0x9000) | ||
1819 | return -EINVAL; | ||
1820 | |||
1821 | /* initialize the SP_IO_WRITE SCB with the data. */ | ||
1822 | temp = ( address << 16 ) | ( address & 0x0000FFFF); /* offset 0 <-- address2 : address1 */ | ||
1823 | |||
1824 | snd_cs46xx_poke(chip,( SPIOWRITE_SCB_ADDR << 2), temp); | ||
1825 | snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 1) << 2), data); /* offset 1 <-- data1 */ | ||
1826 | snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 2) << 2), data); /* offset 1 <-- data2 */ | ||
1827 | |||
1828 | /* Poke this location to tell the task to start */ | ||
1829 | snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 6) << 2), SPIOWRITE_SCB_ADDR << 0x10); | ||
1830 | |||
1831 | /* Verify that the task ran */ | ||
1832 | for (i=0; i<25; i++) { | ||
1833 | udelay(125); | ||
1834 | |||
1835 | temp = snd_cs46xx_peek(chip,((SPIOWRITE_SCB_ADDR + 6) << 2)); | ||
1836 | if (temp == 0x00000000) | ||
1837 | break; | ||
1838 | } | ||
1839 | |||
1840 | if (i == 25) { | ||
1841 | snd_printk(KERN_ERR "dsp_spos: SPIOWriteTask not responding\n"); | ||
1842 | return -EBUSY; | ||
1843 | } | ||
1844 | |||
1845 | return 0; | ||
1846 | } | ||
1847 | |||
1848 | int cs46xx_dsp_set_dac_volume (cs46xx_t * chip,u16 left,u16 right) | ||
1849 | { | ||
1850 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
1851 | dsp_scb_descriptor_t * scb; | ||
1852 | |||
1853 | down(&chip->spos_mutex); | ||
1854 | |||
1855 | /* main output */ | ||
1856 | scb = ins->master_mix_scb->sub_list_ptr; | ||
1857 | while (scb != ins->the_null_scb) { | ||
1858 | cs46xx_dsp_scb_set_volume (chip,scb,left,right); | ||
1859 | scb = scb->next_scb_ptr; | ||
1860 | } | ||
1861 | |||
1862 | /* rear output */ | ||
1863 | scb = ins->rear_mix_scb->sub_list_ptr; | ||
1864 | while (scb != ins->the_null_scb) { | ||
1865 | cs46xx_dsp_scb_set_volume (chip,scb,left,right); | ||
1866 | scb = scb->next_scb_ptr; | ||
1867 | } | ||
1868 | |||
1869 | ins->dac_volume_left = left; | ||
1870 | ins->dac_volume_right = right; | ||
1871 | |||
1872 | up(&chip->spos_mutex); | ||
1873 | |||
1874 | return 0; | ||
1875 | } | ||
1876 | |||
1877 | int cs46xx_dsp_set_iec958_volume (cs46xx_t * chip,u16 left,u16 right) { | ||
1878 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
1879 | |||
1880 | down(&chip->spos_mutex); | ||
1881 | |||
1882 | if (ins->asynch_rx_scb != NULL) | ||
1883 | cs46xx_dsp_scb_set_volume (chip,ins->asynch_rx_scb, | ||
1884 | left,right); | ||
1885 | |||
1886 | ins->spdif_input_volume_left = left; | ||
1887 | ins->spdif_input_volume_right = right; | ||
1888 | |||
1889 | up(&chip->spos_mutex); | ||
1890 | |||
1891 | return 0; | ||
1892 | } | ||
diff --git a/sound/pci/cs46xx/dsp_spos.h b/sound/pci/cs46xx/dsp_spos.h new file mode 100644 index 000000000000..90871bf9762f --- /dev/null +++ b/sound/pci/cs46xx/dsp_spos.h | |||
@@ -0,0 +1,225 @@ | |||
1 | /* | ||
2 | * The driver for the Cirrus Logic's Sound Fusion CS46XX based soundcards | ||
3 | * Copyright (c) by Jaroslav Kysela <perex@suse.cz> | ||
4 | * | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | * | ||
20 | */ | ||
21 | |||
22 | /* | ||
23 | * 2002-07 Benny Sjostrand benny@hostmobility.com | ||
24 | */ | ||
25 | |||
26 | #ifdef CONFIG_SND_CS46XX_NEW_DSP /* hack ... */ | ||
27 | #ifndef __DSP_SPOS_H__ | ||
28 | #define __DSP_SPOS_H__ | ||
29 | |||
30 | #define DSP_MAX_SYMBOLS 1024 | ||
31 | #define DSP_MAX_MODULES 64 | ||
32 | |||
33 | #define DSP_CODE_BYTE_SIZE 0x00007000UL | ||
34 | #define DSP_PARAMETER_BYTE_SIZE 0x00003000UL | ||
35 | #define DSP_SAMPLE_BYTE_SIZE 0x00003800UL | ||
36 | #define DSP_PARAMETER_BYTE_OFFSET 0x00000000UL | ||
37 | #define DSP_SAMPLE_BYTE_OFFSET 0x00010000UL | ||
38 | #define DSP_CODE_BYTE_OFFSET 0x00020000UL | ||
39 | |||
40 | #define WIDE_INSTR_MASK 0x0040 | ||
41 | #define WIDE_LADD_INSTR_MASK 0x0380 | ||
42 | |||
43 | /* this instruction types | ||
44 | needs to be reallocated when load | ||
45 | code into DSP */ | ||
46 | typedef enum { | ||
47 | WIDE_FOR_BEGIN_LOOP = 0x20, | ||
48 | WIDE_FOR_BEGIN_LOOP2, | ||
49 | |||
50 | WIDE_COND_GOTO_ADDR = 0x30, | ||
51 | WIDE_COND_GOTO_CALL, | ||
52 | |||
53 | WIDE_TBEQ_COND_GOTO_ADDR = 0x70, | ||
54 | WIDE_TBEQ_COND_CALL_ADDR, | ||
55 | WIDE_TBEQ_NCOND_GOTO_ADDR, | ||
56 | WIDE_TBEQ_NCOND_CALL_ADDR, | ||
57 | WIDE_TBEQ_COND_GOTO1_ADDR, | ||
58 | WIDE_TBEQ_COND_CALL1_ADDR, | ||
59 | WIDE_TBEQ_NCOND_GOTOI_ADDR, | ||
60 | WIDE_TBEQ_NCOND_CALL1_ADDR, | ||
61 | } wide_opcode_t; | ||
62 | |||
63 | /* SAMPLE segment */ | ||
64 | #define VARI_DECIMATE_BUF1 0x0000 | ||
65 | #define WRITE_BACK_BUF1 0x0400 | ||
66 | #define CODEC_INPUT_BUF1 0x0500 | ||
67 | #define PCM_READER_BUF1 0x0600 | ||
68 | #define SRC_DELAY_BUF1 0x0680 | ||
69 | #define VARI_DECIMATE_BUF0 0x0780 | ||
70 | #define SRC_OUTPUT_BUF1 0x07A0 | ||
71 | #define ASYNC_IP_OUTPUT_BUFFER1 0x0A00 | ||
72 | #define OUTPUT_SNOOP_BUFFER 0x0B00 | ||
73 | #define SPDIFI_IP_OUTPUT_BUFFER1 0x0E00 | ||
74 | #define SPDIFO_IP_OUTPUT_BUFFER1 0x1000 | ||
75 | #define MIX_SAMPLE_BUF1 0x1400 | ||
76 | #define MIX_SAMPLE_BUF2 0x2E80 | ||
77 | #define MIX_SAMPLE_BUF3 0x2F00 | ||
78 | #define MIX_SAMPLE_BUF4 0x2F80 | ||
79 | #define MIX_SAMPLE_BUF5 0x3000 | ||
80 | |||
81 | /* Task stack address */ | ||
82 | #define HFG_STACK 0x066A | ||
83 | #define FG_STACK 0x066E | ||
84 | #define BG_STACK 0x068E | ||
85 | |||
86 | /* SCB's addresses */ | ||
87 | #define SPOSCB_ADDR 0x070 | ||
88 | #define BG_TREE_SCB_ADDR 0x635 | ||
89 | #define NULL_SCB_ADDR 0x000 | ||
90 | #define TIMINGMASTER_SCB_ADDR 0x010 | ||
91 | #define CODECOUT_SCB_ADDR 0x020 | ||
92 | #define PCMREADER_SCB_ADDR 0x030 | ||
93 | #define WRITEBACK_SCB_ADDR 0x040 | ||
94 | #define CODECIN_SCB_ADDR 0x080 | ||
95 | #define MASTERMIX_SCB_ADDR 0x090 | ||
96 | #define SRCTASK_SCB_ADDR 0x0A0 | ||
97 | #define VARIDECIMATE_SCB_ADDR 0x0B0 | ||
98 | #define PCMSERIALIN_SCB_ADDR 0x0C0 | ||
99 | #define FG_TASK_HEADER_ADDR 0x600 | ||
100 | #define ASYNCTX_SCB_ADDR 0x0E0 | ||
101 | #define ASYNCRX_SCB_ADDR 0x0F0 | ||
102 | #define SRCTASKII_SCB_ADDR 0x100 | ||
103 | #define OUTPUTSNOOP_SCB_ADDR 0x110 | ||
104 | #define PCMSERIALINII_SCB_ADDR 0x120 | ||
105 | #define SPIOWRITE_SCB_ADDR 0x130 | ||
106 | #define REAR_CODECOUT_SCB_ADDR 0x140 | ||
107 | #define OUTPUTSNOOPII_SCB_ADDR 0x150 | ||
108 | #define PCMSERIALIN_PCM_SCB_ADDR 0x160 | ||
109 | #define RECORD_MIXER_SCB_ADDR 0x170 | ||
110 | #define REAR_MIXER_SCB_ADDR 0x180 | ||
111 | #define CLFE_MIXER_SCB_ADDR 0x190 | ||
112 | #define CLFE_CODEC_SCB_ADDR 0x1A0 | ||
113 | |||
114 | /* hyperforground SCB's*/ | ||
115 | #define HFG_TREE_SCB 0xBA0 | ||
116 | #define SPDIFI_SCB_INST 0xBB0 | ||
117 | #define SPDIFO_SCB_INST 0xBC0 | ||
118 | #define WRITE_BACK_SPB 0x0D0 | ||
119 | |||
120 | /* offsets */ | ||
121 | #define AsyncCIOFIFOPointer 0xd | ||
122 | #define SPDIFOFIFOPointer 0xd | ||
123 | #define SPDIFIFIFOPointer 0xd | ||
124 | #define TCBData 0xb | ||
125 | #define HFGFlags 0xa | ||
126 | #define TCBContextBlk 0x10 | ||
127 | #define AFGTxAccumPhi 0x4 | ||
128 | #define SCBsubListPtr 0x9 | ||
129 | #define SCBfuncEntryPtr 0xA | ||
130 | #define SRCCorPerGof 0x2 | ||
131 | #define SRCPhiIncr6Int26Frac 0xd | ||
132 | #define SCBVolumeCtrl 0xe | ||
133 | |||
134 | /* conf */ | ||
135 | #define UseASER1Input 1 | ||
136 | |||
137 | |||
138 | |||
139 | /* | ||
140 | * The following defines are for the flags in the rsConfig01/23 registers of | ||
141 | * the SP. | ||
142 | */ | ||
143 | |||
144 | #define RSCONFIG_MODULO_SIZE_MASK 0x0000000FL | ||
145 | #define RSCONFIG_MODULO_16 0x00000001L | ||
146 | #define RSCONFIG_MODULO_32 0x00000002L | ||
147 | #define RSCONFIG_MODULO_64 0x00000003L | ||
148 | #define RSCONFIG_MODULO_128 0x00000004L | ||
149 | #define RSCONFIG_MODULO_256 0x00000005L | ||
150 | #define RSCONFIG_MODULO_512 0x00000006L | ||
151 | #define RSCONFIG_MODULO_1024 0x00000007L | ||
152 | #define RSCONFIG_MODULO_4 0x00000008L | ||
153 | #define RSCONFIG_MODULO_8 0x00000009L | ||
154 | #define RSCONFIG_SAMPLE_SIZE_MASK 0x000000C0L | ||
155 | #define RSCONFIG_SAMPLE_8MONO 0x00000000L | ||
156 | #define RSCONFIG_SAMPLE_8STEREO 0x00000040L | ||
157 | #define RSCONFIG_SAMPLE_16MONO 0x00000080L | ||
158 | #define RSCONFIG_SAMPLE_16STEREO 0x000000C0L | ||
159 | #define RSCONFIG_UNDERRUN_ZERO 0x00004000L | ||
160 | #define RSCONFIG_DMA_TO_HOST 0x00008000L | ||
161 | #define RSCONFIG_STREAM_NUM_MASK 0x00FF0000L | ||
162 | #define RSCONFIG_MAX_DMA_SIZE_MASK 0x1F000000L | ||
163 | #define RSCONFIG_DMA_ENABLE 0x20000000L | ||
164 | #define RSCONFIG_PRIORITY_MASK 0xC0000000L | ||
165 | #define RSCONFIG_PRIORITY_HIGH 0x00000000L | ||
166 | #define RSCONFIG_PRIORITY_MEDIUM_HIGH 0x40000000L | ||
167 | #define RSCONFIG_PRIORITY_MEDIUM_LOW 0x80000000L | ||
168 | #define RSCONFIG_PRIORITY_LOW 0xC0000000L | ||
169 | #define RSCONFIG_STREAM_NUM_SHIFT 16L | ||
170 | #define RSCONFIG_MAX_DMA_SIZE_SHIFT 24L | ||
171 | |||
172 | /* SP constants */ | ||
173 | #define FG_INTERVAL_TIMER_PERIOD 0x0051 | ||
174 | #define BG_INTERVAL_TIMER_PERIOD 0x0100 | ||
175 | |||
176 | |||
177 | /* Only SP accessible registers */ | ||
178 | #define SP_ASER_COUNTDOWN 0x8040 | ||
179 | #define SP_SPDOUT_FIFO 0x0108 | ||
180 | #define SP_SPDIN_MI_FIFO 0x01E0 | ||
181 | #define SP_SPDIN_D_FIFO 0x01F0 | ||
182 | #define SP_SPDIN_STATUS 0x8048 | ||
183 | #define SP_SPDIN_CONTROL 0x8049 | ||
184 | #define SP_SPDIN_FIFOPTR 0x804A | ||
185 | #define SP_SPDOUT_STATUS 0x804C | ||
186 | #define SP_SPDOUT_CONTROL 0x804D | ||
187 | #define SP_SPDOUT_CSUV 0x808E | ||
188 | |||
189 | static inline u8 _wrap_all_bits (u8 val) { | ||
190 | u8 wrapped; | ||
191 | |||
192 | /* wrap all 8 bits */ | ||
193 | wrapped = | ||
194 | ((val & 0x1 ) << 7) | | ||
195 | ((val & 0x2 ) << 5) | | ||
196 | ((val & 0x4 ) << 3) | | ||
197 | ((val & 0x8 ) << 1) | | ||
198 | ((val & 0x10) >> 1) | | ||
199 | ((val & 0x20) >> 3) | | ||
200 | ((val & 0x40) >> 5) | | ||
201 | ((val & 0x80) >> 7); | ||
202 | |||
203 | return wrapped; | ||
204 | |||
205 | } | ||
206 | |||
207 | |||
208 | static inline void cs46xx_dsp_spos_update_scb (cs46xx_t * chip,dsp_scb_descriptor_t * scb) | ||
209 | { | ||
210 | /* update nextSCB and subListPtr in SCB */ | ||
211 | snd_cs46xx_poke(chip, | ||
212 | (scb->address + SCBsubListPtr) << 2, | ||
213 | (scb->sub_list_ptr->address << 0x10) | | ||
214 | (scb->next_scb_ptr->address)); | ||
215 | } | ||
216 | |||
217 | static inline void cs46xx_dsp_scb_set_volume (cs46xx_t * chip,dsp_scb_descriptor_t * scb, | ||
218 | u16 left,u16 right) { | ||
219 | unsigned int val = ((0xffff - left) << 16 | (0xffff - right)); | ||
220 | |||
221 | snd_cs46xx_poke(chip, (scb->address + SCBVolumeCtrl) << 2, val); | ||
222 | snd_cs46xx_poke(chip, (scb->address + SCBVolumeCtrl + 1) << 2, val); | ||
223 | } | ||
224 | #endif /* __DSP_SPOS_H__ */ | ||
225 | #endif /* CONFIG_SND_CS46XX_NEW_DSP */ | ||
diff --git a/sound/pci/cs46xx/dsp_spos_scb_lib.c b/sound/pci/cs46xx/dsp_spos_scb_lib.c new file mode 100644 index 000000000000..92849e1340bb --- /dev/null +++ b/sound/pci/cs46xx/dsp_spos_scb_lib.c | |||
@@ -0,0 +1,1750 @@ | |||
1 | /* | ||
2 | * | ||
3 | * This program is free software; you can redistribute it and/or modify | ||
4 | * it under the terms of the GNU General Public License as published by | ||
5 | * the Free Software Foundation; either version 2 of the License, or | ||
6 | * (at your option) any later version. | ||
7 | * | ||
8 | * This program is distributed in the hope that it will be useful, | ||
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
11 | * GNU General Public License for more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License | ||
14 | * along with this program; if not, write to the Free Software | ||
15 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
16 | * | ||
17 | */ | ||
18 | |||
19 | /* | ||
20 | * 2002-07 Benny Sjostrand benny@hostmobility.com | ||
21 | */ | ||
22 | |||
23 | |||
24 | #include <sound/driver.h> | ||
25 | #include <asm/io.h> | ||
26 | #include <linux/delay.h> | ||
27 | #include <linux/pci.h> | ||
28 | #include <linux/pm.h> | ||
29 | #include <linux/init.h> | ||
30 | #include <linux/slab.h> | ||
31 | #include <sound/core.h> | ||
32 | #include <sound/control.h> | ||
33 | #include <sound/info.h> | ||
34 | #include <sound/cs46xx.h> | ||
35 | |||
36 | #include "cs46xx_lib.h" | ||
37 | #include "dsp_spos.h" | ||
38 | |||
39 | typedef struct _proc_scb_info_t { | ||
40 | dsp_scb_descriptor_t * scb_desc; | ||
41 | cs46xx_t *chip; | ||
42 | } proc_scb_info_t; | ||
43 | |||
44 | static void remove_symbol (cs46xx_t * chip,symbol_entry_t * symbol) | ||
45 | { | ||
46 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
47 | int symbol_index = (int)(symbol - ins->symbol_table.symbols); | ||
48 | |||
49 | snd_assert(ins->symbol_table.nsymbols > 0,return); | ||
50 | snd_assert(symbol_index >= 0 && symbol_index < ins->symbol_table.nsymbols, return); | ||
51 | |||
52 | ins->symbol_table.symbols[symbol_index].deleted = 1; | ||
53 | |||
54 | if (symbol_index < ins->symbol_table.highest_frag_index) { | ||
55 | ins->symbol_table.highest_frag_index = symbol_index; | ||
56 | } | ||
57 | |||
58 | if (symbol_index == ins->symbol_table.nsymbols - 1) | ||
59 | ins->symbol_table.nsymbols --; | ||
60 | |||
61 | if (ins->symbol_table.highest_frag_index > ins->symbol_table.nsymbols) { | ||
62 | ins->symbol_table.highest_frag_index = ins->symbol_table.nsymbols; | ||
63 | } | ||
64 | |||
65 | } | ||
66 | |||
67 | static void cs46xx_dsp_proc_scb_info_read (snd_info_entry_t *entry, snd_info_buffer_t * buffer) | ||
68 | { | ||
69 | proc_scb_info_t * scb_info = (proc_scb_info_t *)entry->private_data; | ||
70 | dsp_scb_descriptor_t * scb = scb_info->scb_desc; | ||
71 | dsp_spos_instance_t * ins; | ||
72 | cs46xx_t *chip = scb_info->chip; | ||
73 | int j,col; | ||
74 | void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET; | ||
75 | |||
76 | ins = chip->dsp_spos_instance; | ||
77 | |||
78 | down(&chip->spos_mutex); | ||
79 | snd_iprintf(buffer,"%04x %s:\n",scb->address,scb->scb_name); | ||
80 | |||
81 | for (col = 0,j = 0;j < 0x10; j++,col++) { | ||
82 | if (col == 4) { | ||
83 | snd_iprintf(buffer,"\n"); | ||
84 | col = 0; | ||
85 | } | ||
86 | snd_iprintf(buffer,"%08x ",readl(dst + (scb->address + j) * sizeof(u32))); | ||
87 | } | ||
88 | |||
89 | snd_iprintf(buffer,"\n"); | ||
90 | |||
91 | if (scb->parent_scb_ptr != NULL) { | ||
92 | snd_iprintf(buffer,"parent [%s:%04x] ", | ||
93 | scb->parent_scb_ptr->scb_name, | ||
94 | scb->parent_scb_ptr->address); | ||
95 | } else snd_iprintf(buffer,"parent [none] "); | ||
96 | |||
97 | snd_iprintf(buffer,"sub_list_ptr [%s:%04x]\nnext_scb_ptr [%s:%04x] task_entry [%s:%04x]\n", | ||
98 | scb->sub_list_ptr->scb_name, | ||
99 | scb->sub_list_ptr->address, | ||
100 | scb->next_scb_ptr->scb_name, | ||
101 | scb->next_scb_ptr->address, | ||
102 | scb->task_entry->symbol_name, | ||
103 | scb->task_entry->address); | ||
104 | |||
105 | snd_iprintf(buffer,"index [%d] ref_count [%d]\n",scb->index,scb->ref_count); | ||
106 | up(&chip->spos_mutex); | ||
107 | } | ||
108 | |||
109 | static void _dsp_unlink_scb (cs46xx_t *chip,dsp_scb_descriptor_t * scb) | ||
110 | { | ||
111 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
112 | unsigned long flags; | ||
113 | |||
114 | if ( scb->parent_scb_ptr ) { | ||
115 | /* unlink parent SCB */ | ||
116 | snd_assert ((scb->parent_scb_ptr->sub_list_ptr == scb || | ||
117 | scb->parent_scb_ptr->next_scb_ptr == scb),return); | ||
118 | |||
119 | if (scb->parent_scb_ptr->sub_list_ptr == scb) { | ||
120 | |||
121 | if (scb->next_scb_ptr == ins->the_null_scb) { | ||
122 | /* last and only node in parent sublist */ | ||
123 | scb->parent_scb_ptr->sub_list_ptr = scb->sub_list_ptr; | ||
124 | |||
125 | if (scb->sub_list_ptr != ins->the_null_scb) { | ||
126 | scb->sub_list_ptr->parent_scb_ptr = scb->parent_scb_ptr; | ||
127 | } | ||
128 | scb->sub_list_ptr = ins->the_null_scb; | ||
129 | } else { | ||
130 | /* first node in parent sublist */ | ||
131 | scb->parent_scb_ptr->sub_list_ptr = scb->next_scb_ptr; | ||
132 | |||
133 | if (scb->next_scb_ptr != ins->the_null_scb) { | ||
134 | /* update next node parent ptr. */ | ||
135 | scb->next_scb_ptr->parent_scb_ptr = scb->parent_scb_ptr; | ||
136 | } | ||
137 | scb->next_scb_ptr = ins->the_null_scb; | ||
138 | } | ||
139 | } else { | ||
140 | /* snd_assert ( (scb->sub_list_ptr == ins->the_null_scb), return); */ | ||
141 | scb->parent_scb_ptr->next_scb_ptr = scb->next_scb_ptr; | ||
142 | |||
143 | if (scb->next_scb_ptr != ins->the_null_scb) { | ||
144 | /* update next node parent ptr. */ | ||
145 | scb->next_scb_ptr->parent_scb_ptr = scb->parent_scb_ptr; | ||
146 | } | ||
147 | scb->next_scb_ptr = ins->the_null_scb; | ||
148 | } | ||
149 | |||
150 | spin_lock_irqsave(&chip->reg_lock, flags); | ||
151 | |||
152 | /* update parent first entry in DSP RAM */ | ||
153 | cs46xx_dsp_spos_update_scb(chip,scb->parent_scb_ptr); | ||
154 | |||
155 | /* then update entry in DSP RAM */ | ||
156 | cs46xx_dsp_spos_update_scb(chip,scb); | ||
157 | |||
158 | scb->parent_scb_ptr = NULL; | ||
159 | spin_unlock_irqrestore(&chip->reg_lock, flags); | ||
160 | } | ||
161 | } | ||
162 | |||
163 | static void _dsp_clear_sample_buffer (cs46xx_t *chip, u32 sample_buffer_addr, int dword_count) | ||
164 | { | ||
165 | void __iomem *dst = chip->region.idx[2].remap_addr + sample_buffer_addr; | ||
166 | int i; | ||
167 | |||
168 | for (i = 0; i < dword_count ; ++i ) { | ||
169 | writel(0, dst); | ||
170 | dst += 4; | ||
171 | } | ||
172 | } | ||
173 | |||
174 | void cs46xx_dsp_remove_scb (cs46xx_t *chip, dsp_scb_descriptor_t * scb) | ||
175 | { | ||
176 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
177 | |||
178 | /* check integrety */ | ||
179 | snd_assert ( (scb->index >= 0 && | ||
180 | scb->index < ins->nscb && | ||
181 | (ins->scbs + scb->index) == scb), return ); | ||
182 | |||
183 | #if 0 | ||
184 | /* can't remove a SCB with childs before | ||
185 | removing childs first */ | ||
186 | snd_assert ( (scb->sub_list_ptr == ins->the_null_scb && | ||
187 | scb->next_scb_ptr == ins->the_null_scb), | ||
188 | goto _end); | ||
189 | #endif | ||
190 | |||
191 | spin_lock(&scb->lock); | ||
192 | _dsp_unlink_scb (chip,scb); | ||
193 | spin_unlock(&scb->lock); | ||
194 | |||
195 | cs46xx_dsp_proc_free_scb_desc(scb); | ||
196 | snd_assert (scb->scb_symbol != NULL, return ); | ||
197 | remove_symbol (chip,scb->scb_symbol); | ||
198 | |||
199 | ins->scbs[scb->index].deleted = 1; | ||
200 | |||
201 | if (scb->index < ins->scb_highest_frag_index) | ||
202 | ins->scb_highest_frag_index = scb->index; | ||
203 | |||
204 | if (scb->index == ins->nscb - 1) { | ||
205 | ins->nscb --; | ||
206 | } | ||
207 | |||
208 | if (ins->scb_highest_frag_index > ins->nscb) { | ||
209 | ins->scb_highest_frag_index = ins->nscb; | ||
210 | } | ||
211 | |||
212 | #if 0 | ||
213 | /* !!!! THIS IS A PIECE OF SHIT MADE BY ME !!! */ | ||
214 | for(i = scb->index + 1;i < ins->nscb; ++i) { | ||
215 | ins->scbs[i - 1].index = i - 1; | ||
216 | } | ||
217 | #endif | ||
218 | } | ||
219 | |||
220 | |||
221 | void cs46xx_dsp_proc_free_scb_desc (dsp_scb_descriptor_t * scb) | ||
222 | { | ||
223 | if (scb->proc_info) { | ||
224 | proc_scb_info_t * scb_info = (proc_scb_info_t *)scb->proc_info->private_data; | ||
225 | |||
226 | snd_printdd("cs46xx_dsp_proc_free_scb_desc: freeing %s\n",scb->scb_name); | ||
227 | |||
228 | snd_info_unregister(scb->proc_info); | ||
229 | scb->proc_info = NULL; | ||
230 | |||
231 | snd_assert (scb_info != NULL, return); | ||
232 | kfree (scb_info); | ||
233 | } | ||
234 | } | ||
235 | |||
236 | void cs46xx_dsp_proc_register_scb_desc (cs46xx_t *chip,dsp_scb_descriptor_t * scb) | ||
237 | { | ||
238 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
239 | snd_info_entry_t * entry; | ||
240 | proc_scb_info_t * scb_info; | ||
241 | |||
242 | /* register to proc */ | ||
243 | if (ins->snd_card != NULL && ins->proc_dsp_dir != NULL && | ||
244 | scb->proc_info == NULL) { | ||
245 | |||
246 | if ((entry = snd_info_create_card_entry(ins->snd_card, scb->scb_name, | ||
247 | ins->proc_dsp_dir)) != NULL) { | ||
248 | scb_info = kmalloc(sizeof(proc_scb_info_t), GFP_KERNEL); | ||
249 | if (!scb_info) { | ||
250 | snd_info_free_entry(entry); | ||
251 | entry = NULL; | ||
252 | goto out; | ||
253 | } | ||
254 | |||
255 | scb_info->chip = chip; | ||
256 | scb_info->scb_desc = scb; | ||
257 | |||
258 | entry->content = SNDRV_INFO_CONTENT_TEXT; | ||
259 | entry->private_data = scb_info; | ||
260 | entry->mode = S_IFREG | S_IRUGO | S_IWUSR; | ||
261 | |||
262 | entry->c.text.read_size = 512; | ||
263 | entry->c.text.read = cs46xx_dsp_proc_scb_info_read; | ||
264 | |||
265 | if (snd_info_register(entry) < 0) { | ||
266 | snd_info_free_entry(entry); | ||
267 | kfree (scb_info); | ||
268 | entry = NULL; | ||
269 | } | ||
270 | } | ||
271 | out: | ||
272 | scb->proc_info = entry; | ||
273 | } | ||
274 | } | ||
275 | |||
276 | static dsp_scb_descriptor_t * | ||
277 | _dsp_create_generic_scb (cs46xx_t *chip,char * name, u32 * scb_data,u32 dest, | ||
278 | symbol_entry_t * task_entry, | ||
279 | dsp_scb_descriptor_t * parent_scb, | ||
280 | int scb_child_type) | ||
281 | { | ||
282 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
283 | dsp_scb_descriptor_t * scb; | ||
284 | |||
285 | unsigned long flags; | ||
286 | |||
287 | snd_assert (ins->the_null_scb != NULL,return NULL); | ||
288 | |||
289 | /* fill the data that will be wroten to DSP */ | ||
290 | scb_data[SCBsubListPtr] = | ||
291 | (ins->the_null_scb->address << 0x10) | ins->the_null_scb->address; | ||
292 | |||
293 | scb_data[SCBfuncEntryPtr] &= 0xFFFF0000; | ||
294 | scb_data[SCBfuncEntryPtr] |= task_entry->address; | ||
295 | |||
296 | snd_printdd("dsp_spos: creating SCB <%s>\n",name); | ||
297 | |||
298 | scb = cs46xx_dsp_create_scb(chip,name,scb_data,dest); | ||
299 | |||
300 | |||
301 | scb->sub_list_ptr = ins->the_null_scb; | ||
302 | scb->next_scb_ptr = ins->the_null_scb; | ||
303 | |||
304 | scb->parent_scb_ptr = parent_scb; | ||
305 | scb->task_entry = task_entry; | ||
306 | |||
307 | |||
308 | /* update parent SCB */ | ||
309 | if (scb->parent_scb_ptr) { | ||
310 | #if 0 | ||
311 | printk ("scb->parent_scb_ptr = %s\n",scb->parent_scb_ptr->scb_name); | ||
312 | printk ("scb->parent_scb_ptr->next_scb_ptr = %s\n",scb->parent_scb_ptr->next_scb_ptr->scb_name); | ||
313 | printk ("scb->parent_scb_ptr->sub_list_ptr = %s\n",scb->parent_scb_ptr->sub_list_ptr->scb_name); | ||
314 | #endif | ||
315 | /* link to parent SCB */ | ||
316 | if (scb_child_type == SCB_ON_PARENT_NEXT_SCB) { | ||
317 | snd_assert ( (scb->parent_scb_ptr->next_scb_ptr == ins->the_null_scb), | ||
318 | return NULL); | ||
319 | |||
320 | scb->parent_scb_ptr->next_scb_ptr = scb; | ||
321 | |||
322 | } else if (scb_child_type == SCB_ON_PARENT_SUBLIST_SCB) { | ||
323 | snd_assert ( (scb->parent_scb_ptr->sub_list_ptr == ins->the_null_scb), | ||
324 | return NULL); | ||
325 | |||
326 | scb->parent_scb_ptr->sub_list_ptr = scb; | ||
327 | } else { | ||
328 | snd_assert (0,return NULL); | ||
329 | } | ||
330 | |||
331 | spin_lock_irqsave(&chip->reg_lock, flags); | ||
332 | |||
333 | /* update entry in DSP RAM */ | ||
334 | cs46xx_dsp_spos_update_scb(chip,scb->parent_scb_ptr); | ||
335 | |||
336 | spin_unlock_irqrestore(&chip->reg_lock, flags); | ||
337 | } | ||
338 | |||
339 | |||
340 | cs46xx_dsp_proc_register_scb_desc (chip,scb); | ||
341 | |||
342 | return scb; | ||
343 | } | ||
344 | |||
345 | static dsp_scb_descriptor_t * | ||
346 | cs46xx_dsp_create_generic_scb (cs46xx_t *chip,char * name, u32 * scb_data,u32 dest, | ||
347 | char * task_entry_name, | ||
348 | dsp_scb_descriptor_t * parent_scb, | ||
349 | int scb_child_type) | ||
350 | { | ||
351 | symbol_entry_t * task_entry; | ||
352 | |||
353 | task_entry = cs46xx_dsp_lookup_symbol (chip,task_entry_name, | ||
354 | SYMBOL_CODE); | ||
355 | |||
356 | if (task_entry == NULL) { | ||
357 | snd_printk (KERN_ERR "dsp_spos: symbol %s not found\n",task_entry_name); | ||
358 | return NULL; | ||
359 | } | ||
360 | |||
361 | return _dsp_create_generic_scb (chip,name,scb_data,dest,task_entry, | ||
362 | parent_scb,scb_child_type); | ||
363 | } | ||
364 | |||
365 | dsp_scb_descriptor_t * | ||
366 | cs46xx_dsp_create_timing_master_scb (cs46xx_t *chip) | ||
367 | { | ||
368 | dsp_scb_descriptor_t * scb; | ||
369 | |||
370 | timing_master_scb_t timing_master_scb = { | ||
371 | { 0, | ||
372 | 0, | ||
373 | 0, | ||
374 | 0 | ||
375 | }, | ||
376 | { 0, | ||
377 | 0, | ||
378 | 0, | ||
379 | 0, | ||
380 | 0 | ||
381 | }, | ||
382 | 0,0, | ||
383 | 0,NULL_SCB_ADDR, | ||
384 | 0,0, /* extraSampleAccum:TMreserved */ | ||
385 | 0,0, /* codecFIFOptr:codecFIFOsyncd */ | ||
386 | 0x0001,0x8000, /* fracSampAccumQm1:TMfrmsLeftInGroup */ | ||
387 | 0x0001,0x0000, /* fracSampCorrectionQm1:TMfrmGroupLength */ | ||
388 | 0x00060000 /* nSampPerFrmQ15 */ | ||
389 | }; | ||
390 | |||
391 | scb = cs46xx_dsp_create_generic_scb(chip,"TimingMasterSCBInst",(u32 *)&timing_master_scb, | ||
392 | TIMINGMASTER_SCB_ADDR, | ||
393 | "TIMINGMASTER",NULL,SCB_NO_PARENT); | ||
394 | |||
395 | return scb; | ||
396 | } | ||
397 | |||
398 | |||
399 | dsp_scb_descriptor_t * | ||
400 | cs46xx_dsp_create_codec_out_scb(cs46xx_t * chip,char * codec_name, | ||
401 | u16 channel_disp,u16 fifo_addr, | ||
402 | u16 child_scb_addr, | ||
403 | u32 dest,dsp_scb_descriptor_t * parent_scb, | ||
404 | int scb_child_type) | ||
405 | { | ||
406 | dsp_scb_descriptor_t * scb; | ||
407 | |||
408 | codec_output_scb_t codec_out_scb = { | ||
409 | { 0, | ||
410 | 0, | ||
411 | 0, | ||
412 | 0 | ||
413 | }, | ||
414 | { | ||
415 | 0, | ||
416 | 0, | ||
417 | 0, | ||
418 | 0, | ||
419 | 0 | ||
420 | }, | ||
421 | 0,0, | ||
422 | 0,NULL_SCB_ADDR, | ||
423 | 0, /* COstrmRsConfig */ | ||
424 | 0, /* COstrmBufPtr */ | ||
425 | channel_disp,fifo_addr, /* leftChanBaseIOaddr:rightChanIOdisp */ | ||
426 | 0x0000,0x0080, /* (!AC97!) COexpVolChangeRate:COscaleShiftCount */ | ||
427 | 0,child_scb_addr /* COreserved - need child scb to work with rom code */ | ||
428 | }; | ||
429 | |||
430 | |||
431 | scb = cs46xx_dsp_create_generic_scb(chip,codec_name,(u32 *)&codec_out_scb, | ||
432 | dest,"S16_CODECOUTPUTTASK",parent_scb, | ||
433 | scb_child_type); | ||
434 | |||
435 | return scb; | ||
436 | } | ||
437 | |||
438 | dsp_scb_descriptor_t * | ||
439 | cs46xx_dsp_create_codec_in_scb(cs46xx_t * chip,char * codec_name, | ||
440 | u16 channel_disp,u16 fifo_addr, | ||
441 | u16 sample_buffer_addr, | ||
442 | u32 dest,dsp_scb_descriptor_t * parent_scb, | ||
443 | int scb_child_type) | ||
444 | { | ||
445 | |||
446 | dsp_scb_descriptor_t * scb; | ||
447 | codec_input_scb_t codec_input_scb = { | ||
448 | { 0, | ||
449 | 0, | ||
450 | 0, | ||
451 | 0 | ||
452 | }, | ||
453 | { | ||
454 | 0, | ||
455 | 0, | ||
456 | 0, | ||
457 | 0, | ||
458 | 0 | ||
459 | }, | ||
460 | |||
461 | #if 0 /* cs4620 */ | ||
462 | SyncIOSCB,NULL_SCB_ADDR | ||
463 | #else | ||
464 | 0 , 0, | ||
465 | #endif | ||
466 | 0,0, | ||
467 | |||
468 | RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_64, /* strmRsConfig */ | ||
469 | sample_buffer_addr << 0x10, /* strmBufPtr; defined as a dword ptr, used as a byte ptr */ | ||
470 | channel_disp,fifo_addr, /* (!AC97!) leftChanBaseINaddr=AC97primary | ||
471 | link input slot 3 :rightChanINdisp=""slot 4 */ | ||
472 | 0x0000,0x0000, /* (!AC97!) ????:scaleShiftCount; no shift needed | ||
473 | because AC97 is already 20 bits */ | ||
474 | 0x80008000 /* ??clw cwcgame.scb has 0 */ | ||
475 | }; | ||
476 | |||
477 | scb = cs46xx_dsp_create_generic_scb(chip,codec_name,(u32 *)&codec_input_scb, | ||
478 | dest,"S16_CODECINPUTTASK",parent_scb, | ||
479 | scb_child_type); | ||
480 | return scb; | ||
481 | } | ||
482 | |||
483 | |||
484 | static dsp_scb_descriptor_t * | ||
485 | cs46xx_dsp_create_pcm_reader_scb(cs46xx_t * chip,char * scb_name, | ||
486 | u16 sample_buffer_addr,u32 dest, | ||
487 | int virtual_channel, u32 playback_hw_addr, | ||
488 | dsp_scb_descriptor_t * parent_scb, | ||
489 | int scb_child_type) | ||
490 | { | ||
491 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
492 | dsp_scb_descriptor_t * scb; | ||
493 | |||
494 | generic_scb_t pcm_reader_scb = { | ||
495 | |||
496 | /* | ||
497 | Play DMA Task xfers data from host buffer to SP buffer | ||
498 | init/runtime variables: | ||
499 | PlayAC: Play Audio Data Conversion - SCB loc: 2nd dword, mask: 0x0000F000L | ||
500 | DATA_FMT_16BIT_ST_LTLEND(0x00000000L) from 16-bit stereo, little-endian | ||
501 | DATA_FMT_8_BIT_ST_SIGNED(0x00001000L) from 8-bit stereo, signed | ||
502 | DATA_FMT_16BIT_MN_LTLEND(0x00002000L) from 16-bit mono, little-endian | ||
503 | DATA_FMT_8_BIT_MN_SIGNED(0x00003000L) from 8-bit mono, signed | ||
504 | DATA_FMT_16BIT_ST_BIGEND(0x00004000L) from 16-bit stereo, big-endian | ||
505 | DATA_FMT_16BIT_MN_BIGEND(0x00006000L) from 16-bit mono, big-endian | ||
506 | DATA_FMT_8_BIT_ST_UNSIGNED(0x00009000L) from 8-bit stereo, unsigned | ||
507 | DATA_FMT_8_BIT_MN_UNSIGNED(0x0000b000L) from 8-bit mono, unsigned | ||
508 | ? Other combinations possible from: | ||
509 | DMA_RQ_C2_AUDIO_CONVERT_MASK 0x0000F000L | ||
510 | DMA_RQ_C2_AC_NONE 0x00000000L | ||
511 | DMA_RQ_C2_AC_8_TO_16_BIT 0x00001000L | ||
512 | DMA_RQ_C2_AC_MONO_TO_STEREO 0x00002000L | ||
513 | DMA_RQ_C2_AC_ENDIAN_CONVERT 0x00004000L | ||
514 | DMA_RQ_C2_AC_SIGNED_CONVERT 0x00008000L | ||
515 | |||
516 | HostBuffAddr: Host Buffer Physical Byte Address - SCB loc:3rd dword, Mask: 0xFFFFFFFFL | ||
517 | aligned to dword boundary | ||
518 | */ | ||
519 | /* Basic (non scatter/gather) DMA requestor (4 ints) */ | ||
520 | { DMA_RQ_C1_SOURCE_ON_HOST + /* source buffer is on the host */ | ||
521 | DMA_RQ_C1_SOURCE_MOD1024 + /* source buffer is 1024 dwords (4096 bytes) */ | ||
522 | DMA_RQ_C1_DEST_MOD32 + /* dest buffer(PCMreaderBuf) is 32 dwords*/ | ||
523 | DMA_RQ_C1_WRITEBACK_SRC_FLAG + /* ?? */ | ||
524 | DMA_RQ_C1_WRITEBACK_DEST_FLAG + /* ?? */ | ||
525 | 15, /* DwordCount-1: picked 16 for DwordCount because Jim */ | ||
526 | /* Barnette said that is what we should use since */ | ||
527 | /* we are not running in optimized mode? */ | ||
528 | DMA_RQ_C2_AC_NONE + | ||
529 | DMA_RQ_C2_SIGNAL_SOURCE_PINGPONG + /* set play interrupt (bit0) in HISR when source */ | ||
530 | /* buffer (on host) crosses half-way point */ | ||
531 | virtual_channel, /* Play DMA channel arbitrarily set to 0 */ | ||
532 | playback_hw_addr, /* HostBuffAddr (source) */ | ||
533 | DMA_RQ_SD_SP_SAMPLE_ADDR + /* destination buffer is in SP Sample Memory */ | ||
534 | sample_buffer_addr /* SP Buffer Address (destination) */ | ||
535 | }, | ||
536 | /* Scatter/gather DMA requestor extension (5 ints) */ | ||
537 | { | ||
538 | 0, | ||
539 | 0, | ||
540 | 0, | ||
541 | 0, | ||
542 | 0 | ||
543 | }, | ||
544 | /* Sublist pointer & next stream control block (SCB) link. */ | ||
545 | NULL_SCB_ADDR,NULL_SCB_ADDR, | ||
546 | /* Pointer to this tasks parameter block & stream function pointer */ | ||
547 | 0,NULL_SCB_ADDR, | ||
548 | /* rsConfig register for stream buffer (rsDMA reg. is loaded from basicReq.daw */ | ||
549 | /* for incoming streams, or basicReq.saw, for outgoing streams) */ | ||
550 | RSCONFIG_DMA_ENABLE + /* enable DMA */ | ||
551 | (19 << RSCONFIG_MAX_DMA_SIZE_SHIFT) + /* MAX_DMA_SIZE picked to be 19 since SPUD */ | ||
552 | /* uses it for some reason */ | ||
553 | ((dest >> 4) << RSCONFIG_STREAM_NUM_SHIFT) + /* stream number = SCBaddr/16 */ | ||
554 | RSCONFIG_SAMPLE_16STEREO + | ||
555 | RSCONFIG_MODULO_32, /* dest buffer(PCMreaderBuf) is 32 dwords (256 bytes) */ | ||
556 | /* Stream sample pointer & MAC-unit mode for this stream */ | ||
557 | (sample_buffer_addr << 0x10), | ||
558 | /* Fractional increment per output sample in the input sample buffer */ | ||
559 | 0, | ||
560 | { | ||
561 | /* Standard stereo volume control | ||
562 | default muted */ | ||
563 | 0xffff,0xffff, | ||
564 | 0xffff,0xffff | ||
565 | } | ||
566 | }; | ||
567 | |||
568 | if (ins->null_algorithm == NULL) { | ||
569 | ins->null_algorithm = cs46xx_dsp_lookup_symbol (chip,"NULLALGORITHM", | ||
570 | SYMBOL_CODE); | ||
571 | |||
572 | if (ins->null_algorithm == NULL) { | ||
573 | snd_printk (KERN_ERR "dsp_spos: symbol NULLALGORITHM not found\n"); | ||
574 | return NULL; | ||
575 | } | ||
576 | } | ||
577 | |||
578 | scb = _dsp_create_generic_scb(chip,scb_name,(u32 *)&pcm_reader_scb, | ||
579 | dest,ins->null_algorithm,parent_scb, | ||
580 | scb_child_type); | ||
581 | |||
582 | return scb; | ||
583 | } | ||
584 | |||
585 | #define GOF_PER_SEC 200 | ||
586 | |||
587 | dsp_scb_descriptor_t * | ||
588 | cs46xx_dsp_create_src_task_scb(cs46xx_t * chip,char * scb_name, | ||
589 | int rate, | ||
590 | u16 src_buffer_addr, | ||
591 | u16 src_delay_buffer_addr,u32 dest, | ||
592 | dsp_scb_descriptor_t * parent_scb, | ||
593 | int scb_child_type, | ||
594 | int pass_through) | ||
595 | { | ||
596 | |||
597 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
598 | dsp_scb_descriptor_t * scb; | ||
599 | unsigned int tmp1, tmp2; | ||
600 | unsigned int phiIncr; | ||
601 | unsigned int correctionPerGOF, correctionPerSec; | ||
602 | |||
603 | snd_printdd( "dsp_spos: setting %s rate to %u\n",scb_name,rate); | ||
604 | |||
605 | /* | ||
606 | * Compute the values used to drive the actual sample rate conversion. | ||
607 | * The following formulas are being computed, using inline assembly | ||
608 | * since we need to use 64 bit arithmetic to compute the values: | ||
609 | * | ||
610 | * phiIncr = floor((Fs,in * 2^26) / Fs,out) | ||
611 | * correctionPerGOF = floor((Fs,in * 2^26 - Fs,out * phiIncr) / | ||
612 | * GOF_PER_SEC) | ||
613 | * ulCorrectionPerSec = Fs,in * 2^26 - Fs,out * phiIncr -M | ||
614 | * GOF_PER_SEC * correctionPerGOF | ||
615 | * | ||
616 | * i.e. | ||
617 | * | ||
618 | * phiIncr:other = dividend:remainder((Fs,in * 2^26) / Fs,out) | ||
619 | * correctionPerGOF:correctionPerSec = | ||
620 | * dividend:remainder(ulOther / GOF_PER_SEC) | ||
621 | */ | ||
622 | tmp1 = rate << 16; | ||
623 | phiIncr = tmp1 / 48000; | ||
624 | tmp1 -= phiIncr * 48000; | ||
625 | tmp1 <<= 10; | ||
626 | phiIncr <<= 10; | ||
627 | tmp2 = tmp1 / 48000; | ||
628 | phiIncr += tmp2; | ||
629 | tmp1 -= tmp2 * 48000; | ||
630 | correctionPerGOF = tmp1 / GOF_PER_SEC; | ||
631 | tmp1 -= correctionPerGOF * GOF_PER_SEC; | ||
632 | correctionPerSec = tmp1; | ||
633 | |||
634 | { | ||
635 | src_task_scb_t src_task_scb = { | ||
636 | 0x0028,0x00c8, | ||
637 | 0x5555,0x0000, | ||
638 | 0x0000,0x0000, | ||
639 | src_buffer_addr,1, | ||
640 | correctionPerGOF,correctionPerSec, | ||
641 | RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_32, | ||
642 | 0x0000,src_delay_buffer_addr, | ||
643 | 0x0, | ||
644 | 0x080,(src_delay_buffer_addr + (24 * 4)), | ||
645 | 0,0, /* next_scb, sub_list_ptr */ | ||
646 | 0,0, /* entry, this_spb */ | ||
647 | RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_8, | ||
648 | src_buffer_addr << 0x10, | ||
649 | phiIncr, | ||
650 | { | ||
651 | 0xffff - ins->dac_volume_right,0xffff - ins->dac_volume_left, | ||
652 | 0xffff - ins->dac_volume_right,0xffff - ins->dac_volume_left | ||
653 | } | ||
654 | }; | ||
655 | |||
656 | if (ins->s16_up == NULL) { | ||
657 | ins->s16_up = cs46xx_dsp_lookup_symbol (chip,"S16_UPSRC", | ||
658 | SYMBOL_CODE); | ||
659 | |||
660 | if (ins->s16_up == NULL) { | ||
661 | snd_printk (KERN_ERR "dsp_spos: symbol S16_UPSRC not found\n"); | ||
662 | return NULL; | ||
663 | } | ||
664 | } | ||
665 | |||
666 | /* clear buffers */ | ||
667 | _dsp_clear_sample_buffer (chip,src_buffer_addr,8); | ||
668 | _dsp_clear_sample_buffer (chip,src_delay_buffer_addr,32); | ||
669 | |||
670 | if (pass_through) { | ||
671 | /* wont work with any other rate than | ||
672 | the native DSP rate */ | ||
673 | snd_assert (rate = 48000); | ||
674 | |||
675 | scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&src_task_scb, | ||
676 | dest,"DMAREADER",parent_scb, | ||
677 | scb_child_type); | ||
678 | } else { | ||
679 | scb = _dsp_create_generic_scb(chip,scb_name,(u32 *)&src_task_scb, | ||
680 | dest,ins->s16_up,parent_scb, | ||
681 | scb_child_type); | ||
682 | } | ||
683 | |||
684 | |||
685 | } | ||
686 | |||
687 | return scb; | ||
688 | } | ||
689 | |||
690 | #if 0 /* not used */ | ||
691 | dsp_scb_descriptor_t * | ||
692 | cs46xx_dsp_create_filter_scb(cs46xx_t * chip,char * scb_name, | ||
693 | u16 buffer_addr,u32 dest, | ||
694 | dsp_scb_descriptor_t * parent_scb, | ||
695 | int scb_child_type) { | ||
696 | dsp_scb_descriptor_t * scb; | ||
697 | |||
698 | filter_scb_t filter_scb = { | ||
699 | .a0_right = 0x41a9, | ||
700 | .a0_left = 0x41a9, | ||
701 | .a1_right = 0xb8e4, | ||
702 | .a1_left = 0xb8e4, | ||
703 | .a2_right = 0x3e55, | ||
704 | .a2_left = 0x3e55, | ||
705 | |||
706 | .filter_unused3 = 0x0000, | ||
707 | .filter_unused2 = 0x0000, | ||
708 | |||
709 | .output_buf_ptr = buffer_addr, | ||
710 | .init = 0x000, | ||
711 | |||
712 | .prev_sample_output1 = 0x00000000, | ||
713 | .prev_sample_output2 = 0x00000000, | ||
714 | |||
715 | .prev_sample_input1 = 0x00000000, | ||
716 | .prev_sample_input2 = 0x00000000, | ||
717 | |||
718 | .next_scb_ptr = 0x0000, | ||
719 | .sub_list_ptr = 0x0000, | ||
720 | |||
721 | .entry_point = 0x0000, | ||
722 | .spb_ptr = 0x0000, | ||
723 | |||
724 | .b0_right = 0x0e38, | ||
725 | .b0_left = 0x0e38, | ||
726 | .b1_right = 0x1c71, | ||
727 | .b1_left = 0x1c71, | ||
728 | .b2_right = 0x0e38, | ||
729 | .b2_left = 0x0e38, | ||
730 | }; | ||
731 | |||
732 | |||
733 | scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&filter_scb, | ||
734 | dest,"FILTERTASK",parent_scb, | ||
735 | scb_child_type); | ||
736 | |||
737 | return scb; | ||
738 | } | ||
739 | #endif /* not used */ | ||
740 | |||
741 | dsp_scb_descriptor_t * | ||
742 | cs46xx_dsp_create_mix_only_scb(cs46xx_t * chip,char * scb_name, | ||
743 | u16 mix_buffer_addr,u32 dest, | ||
744 | dsp_scb_descriptor_t * parent_scb, | ||
745 | int scb_child_type) | ||
746 | { | ||
747 | dsp_scb_descriptor_t * scb; | ||
748 | |||
749 | mix_only_scb_t master_mix_scb = { | ||
750 | /* 0 */ { 0, | ||
751 | /* 1 */ 0, | ||
752 | /* 2 */ mix_buffer_addr, | ||
753 | /* 3 */ 0 | ||
754 | /* */ }, | ||
755 | { | ||
756 | /* 4 */ 0, | ||
757 | /* 5 */ 0, | ||
758 | /* 6 */ 0, | ||
759 | /* 7 */ 0, | ||
760 | /* 8 */ 0x00000080 | ||
761 | }, | ||
762 | /* 9 */ 0,0, | ||
763 | /* A */ 0,0, | ||
764 | /* B */ RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_32, | ||
765 | /* C */ (mix_buffer_addr + (16 * 4)) << 0x10, | ||
766 | /* D */ 0, | ||
767 | { | ||
768 | /* E */ 0x8000,0x8000, | ||
769 | /* F */ 0x8000,0x8000 | ||
770 | } | ||
771 | }; | ||
772 | |||
773 | |||
774 | scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&master_mix_scb, | ||
775 | dest,"S16_MIX",parent_scb, | ||
776 | scb_child_type); | ||
777 | return scb; | ||
778 | } | ||
779 | |||
780 | |||
781 | dsp_scb_descriptor_t * | ||
782 | cs46xx_dsp_create_mix_to_ostream_scb(cs46xx_t * chip,char * scb_name, | ||
783 | u16 mix_buffer_addr,u16 writeback_spb,u32 dest, | ||
784 | dsp_scb_descriptor_t * parent_scb, | ||
785 | int scb_child_type) | ||
786 | { | ||
787 | dsp_scb_descriptor_t * scb; | ||
788 | |||
789 | mix2_ostream_scb_t mix2_ostream_scb = { | ||
790 | /* Basic (non scatter/gather) DMA requestor (4 ints) */ | ||
791 | { | ||
792 | DMA_RQ_C1_SOURCE_MOD64 + | ||
793 | DMA_RQ_C1_DEST_ON_HOST + | ||
794 | DMA_RQ_C1_DEST_MOD1024 + | ||
795 | DMA_RQ_C1_WRITEBACK_SRC_FLAG + | ||
796 | DMA_RQ_C1_WRITEBACK_DEST_FLAG + | ||
797 | 15, | ||
798 | |||
799 | DMA_RQ_C2_AC_NONE + | ||
800 | DMA_RQ_C2_SIGNAL_DEST_PINGPONG + | ||
801 | |||
802 | CS46XX_DSP_CAPTURE_CHANNEL, | ||
803 | DMA_RQ_SD_SP_SAMPLE_ADDR + | ||
804 | mix_buffer_addr, | ||
805 | 0x0 | ||
806 | }, | ||
807 | |||
808 | { 0, 0, 0, 0, 0, }, | ||
809 | 0,0, | ||
810 | 0,writeback_spb, | ||
811 | |||
812 | RSCONFIG_DMA_ENABLE + | ||
813 | (19 << RSCONFIG_MAX_DMA_SIZE_SHIFT) + | ||
814 | |||
815 | ((dest >> 4) << RSCONFIG_STREAM_NUM_SHIFT) + | ||
816 | RSCONFIG_DMA_TO_HOST + | ||
817 | RSCONFIG_SAMPLE_16STEREO + | ||
818 | RSCONFIG_MODULO_64, | ||
819 | (mix_buffer_addr + (32 * 4)) << 0x10, | ||
820 | 1,0, | ||
821 | 0x0001,0x0080, | ||
822 | 0xFFFF,0 | ||
823 | }; | ||
824 | |||
825 | |||
826 | scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&mix2_ostream_scb, | ||
827 | |||
828 | dest,"S16_MIX_TO_OSTREAM",parent_scb, | ||
829 | scb_child_type); | ||
830 | |||
831 | return scb; | ||
832 | } | ||
833 | |||
834 | |||
835 | dsp_scb_descriptor_t * | ||
836 | cs46xx_dsp_create_vari_decimate_scb(cs46xx_t * chip,char * scb_name, | ||
837 | u16 vari_buffer_addr0, | ||
838 | u16 vari_buffer_addr1, | ||
839 | u32 dest, | ||
840 | dsp_scb_descriptor_t * parent_scb, | ||
841 | int scb_child_type) | ||
842 | { | ||
843 | |||
844 | dsp_scb_descriptor_t * scb; | ||
845 | |||
846 | vari_decimate_scb_t vari_decimate_scb = { | ||
847 | 0x0028,0x00c8, | ||
848 | 0x5555,0x0000, | ||
849 | 0x0000,0x0000, | ||
850 | vari_buffer_addr0,vari_buffer_addr1, | ||
851 | |||
852 | 0x0028,0x00c8, | ||
853 | RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_256, | ||
854 | |||
855 | 0xFF800000, | ||
856 | 0, | ||
857 | 0x0080,vari_buffer_addr1 + (25 * 4), | ||
858 | |||
859 | 0,0, | ||
860 | 0,0, | ||
861 | |||
862 | RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_8, | ||
863 | vari_buffer_addr0 << 0x10, | ||
864 | 0x04000000, | ||
865 | { | ||
866 | 0x8000,0x8000, | ||
867 | 0xFFFF,0xFFFF | ||
868 | } | ||
869 | }; | ||
870 | |||
871 | scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&vari_decimate_scb, | ||
872 | dest,"VARIDECIMATE",parent_scb, | ||
873 | scb_child_type); | ||
874 | |||
875 | return scb; | ||
876 | } | ||
877 | |||
878 | |||
879 | static dsp_scb_descriptor_t * | ||
880 | cs46xx_dsp_create_pcm_serial_input_scb(cs46xx_t * chip,char * scb_name,u32 dest, | ||
881 | dsp_scb_descriptor_t * input_scb, | ||
882 | dsp_scb_descriptor_t * parent_scb, | ||
883 | int scb_child_type) | ||
884 | { | ||
885 | |||
886 | dsp_scb_descriptor_t * scb; | ||
887 | |||
888 | |||
889 | pcm_serial_input_scb_t pcm_serial_input_scb = { | ||
890 | { 0, | ||
891 | 0, | ||
892 | 0, | ||
893 | 0 | ||
894 | }, | ||
895 | { | ||
896 | 0, | ||
897 | 0, | ||
898 | 0, | ||
899 | 0, | ||
900 | 0 | ||
901 | }, | ||
902 | |||
903 | 0,0, | ||
904 | 0,0, | ||
905 | |||
906 | RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_16, | ||
907 | 0, | ||
908 | /* 0xD */ 0,input_scb->address, | ||
909 | { | ||
910 | /* 0xE */ 0x8000,0x8000, | ||
911 | /* 0xF */ 0x8000,0x8000 | ||
912 | } | ||
913 | }; | ||
914 | |||
915 | scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&pcm_serial_input_scb, | ||
916 | dest,"PCMSERIALINPUTTASK",parent_scb, | ||
917 | scb_child_type); | ||
918 | return scb; | ||
919 | } | ||
920 | |||
921 | |||
922 | static dsp_scb_descriptor_t * | ||
923 | cs46xx_dsp_create_asynch_fg_tx_scb(cs46xx_t * chip,char * scb_name,u32 dest, | ||
924 | u16 hfg_scb_address, | ||
925 | u16 asynch_buffer_address, | ||
926 | dsp_scb_descriptor_t * parent_scb, | ||
927 | int scb_child_type) | ||
928 | { | ||
929 | |||
930 | dsp_scb_descriptor_t * scb; | ||
931 | |||
932 | asynch_fg_tx_scb_t asynch_fg_tx_scb = { | ||
933 | 0xfc00,0x03ff, /* Prototype sample buffer size of 256 dwords */ | ||
934 | 0x0058,0x0028, /* Min Delta 7 dwords == 28 bytes */ | ||
935 | /* : Max delta 25 dwords == 100 bytes */ | ||
936 | 0,hfg_scb_address, /* Point to HFG task SCB */ | ||
937 | 0,0, /* Initialize current Delta and Consumer ptr adjustment count */ | ||
938 | 0, /* Initialize accumulated Phi to 0 */ | ||
939 | 0,0x2aab, /* Const 1/3 */ | ||
940 | |||
941 | { | ||
942 | 0, /* Define the unused elements */ | ||
943 | 0, | ||
944 | 0 | ||
945 | }, | ||
946 | |||
947 | 0,0, | ||
948 | 0,dest + AFGTxAccumPhi, | ||
949 | |||
950 | RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_256, /* Stereo, 256 dword */ | ||
951 | (asynch_buffer_address) << 0x10, /* This should be automagically synchronized | ||
952 | to the producer pointer */ | ||
953 | |||
954 | /* There is no correct initial value, it will depend upon the detected | ||
955 | rate etc */ | ||
956 | 0x18000000, /* Phi increment for approx 32k operation */ | ||
957 | 0x8000,0x8000, /* Volume controls are unused at this time */ | ||
958 | 0x8000,0x8000 | ||
959 | }; | ||
960 | |||
961 | scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&asynch_fg_tx_scb, | ||
962 | dest,"ASYNCHFGTXCODE",parent_scb, | ||
963 | scb_child_type); | ||
964 | |||
965 | return scb; | ||
966 | } | ||
967 | |||
968 | |||
969 | dsp_scb_descriptor_t * | ||
970 | cs46xx_dsp_create_asynch_fg_rx_scb(cs46xx_t * chip,char * scb_name,u32 dest, | ||
971 | u16 hfg_scb_address, | ||
972 | u16 asynch_buffer_address, | ||
973 | dsp_scb_descriptor_t * parent_scb, | ||
974 | int scb_child_type) | ||
975 | { | ||
976 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
977 | dsp_scb_descriptor_t * scb; | ||
978 | |||
979 | asynch_fg_rx_scb_t asynch_fg_rx_scb = { | ||
980 | 0xfe00,0x01ff, /* Prototype sample buffer size of 128 dwords */ | ||
981 | 0x0064,0x001c, /* Min Delta 7 dwords == 28 bytes */ | ||
982 | /* : Max delta 25 dwords == 100 bytes */ | ||
983 | 0,hfg_scb_address, /* Point to HFG task SCB */ | ||
984 | 0,0, /* Initialize current Delta and Consumer ptr adjustment count */ | ||
985 | { | ||
986 | 0, /* Define the unused elements */ | ||
987 | 0, | ||
988 | 0, | ||
989 | 0, | ||
990 | 0 | ||
991 | }, | ||
992 | |||
993 | 0,0, | ||
994 | 0,dest, | ||
995 | |||
996 | RSCONFIG_MODULO_128 | | ||
997 | RSCONFIG_SAMPLE_16STEREO, /* Stereo, 128 dword */ | ||
998 | ( (asynch_buffer_address + (16 * 4)) << 0x10), /* This should be automagically | ||
999 | synchrinized to the producer pointer */ | ||
1000 | |||
1001 | /* There is no correct initial value, it will depend upon the detected | ||
1002 | rate etc */ | ||
1003 | 0x18000000, | ||
1004 | |||
1005 | /* Set IEC958 input volume */ | ||
1006 | 0xffff - ins->spdif_input_volume_right,0xffff - ins->spdif_input_volume_left, | ||
1007 | 0xffff - ins->spdif_input_volume_right,0xffff - ins->spdif_input_volume_left, | ||
1008 | }; | ||
1009 | |||
1010 | scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&asynch_fg_rx_scb, | ||
1011 | dest,"ASYNCHFGRXCODE",parent_scb, | ||
1012 | scb_child_type); | ||
1013 | |||
1014 | return scb; | ||
1015 | } | ||
1016 | |||
1017 | |||
1018 | #if 0 /* not used */ | ||
1019 | dsp_scb_descriptor_t * | ||
1020 | cs46xx_dsp_create_output_snoop_scb(cs46xx_t * chip,char * scb_name,u32 dest, | ||
1021 | u16 snoop_buffer_address, | ||
1022 | dsp_scb_descriptor_t * snoop_scb, | ||
1023 | dsp_scb_descriptor_t * parent_scb, | ||
1024 | int scb_child_type) | ||
1025 | { | ||
1026 | |||
1027 | dsp_scb_descriptor_t * scb; | ||
1028 | |||
1029 | output_snoop_scb_t output_snoop_scb = { | ||
1030 | { 0, /* not used. Zero */ | ||
1031 | 0, | ||
1032 | 0, | ||
1033 | 0, | ||
1034 | }, | ||
1035 | { | ||
1036 | 0, /* not used. Zero */ | ||
1037 | 0, | ||
1038 | 0, | ||
1039 | 0, | ||
1040 | 0 | ||
1041 | }, | ||
1042 | |||
1043 | 0,0, | ||
1044 | 0,0, | ||
1045 | |||
1046 | RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_64, | ||
1047 | snoop_buffer_address << 0x10, | ||
1048 | 0,0, | ||
1049 | 0, | ||
1050 | 0,snoop_scb->address | ||
1051 | }; | ||
1052 | |||
1053 | scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&output_snoop_scb, | ||
1054 | dest,"OUTPUTSNOOP",parent_scb, | ||
1055 | scb_child_type); | ||
1056 | return scb; | ||
1057 | } | ||
1058 | #endif /* not used */ | ||
1059 | |||
1060 | |||
1061 | dsp_scb_descriptor_t * | ||
1062 | cs46xx_dsp_create_spio_write_scb(cs46xx_t * chip,char * scb_name,u32 dest, | ||
1063 | dsp_scb_descriptor_t * parent_scb, | ||
1064 | int scb_child_type) | ||
1065 | { | ||
1066 | dsp_scb_descriptor_t * scb; | ||
1067 | |||
1068 | spio_write_scb_t spio_write_scb = { | ||
1069 | 0,0, /* SPIOWAddress2:SPIOWAddress1; */ | ||
1070 | 0, /* SPIOWData1; */ | ||
1071 | 0, /* SPIOWData2; */ | ||
1072 | 0,0, /* SPIOWAddress4:SPIOWAddress3; */ | ||
1073 | 0, /* SPIOWData3; */ | ||
1074 | 0, /* SPIOWData4; */ | ||
1075 | 0,0, /* SPIOWDataPtr:Unused1; */ | ||
1076 | { 0,0 }, /* Unused2[2]; */ | ||
1077 | |||
1078 | 0,0, /* SPIOWChildPtr:SPIOWSiblingPtr; */ | ||
1079 | 0,0, /* SPIOWThisPtr:SPIOWEntryPoint; */ | ||
1080 | |||
1081 | { | ||
1082 | 0, | ||
1083 | 0, | ||
1084 | 0, | ||
1085 | 0, | ||
1086 | 0 /* Unused3[5]; */ | ||
1087 | } | ||
1088 | }; | ||
1089 | |||
1090 | scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&spio_write_scb, | ||
1091 | dest,"SPIOWRITE",parent_scb, | ||
1092 | scb_child_type); | ||
1093 | |||
1094 | return scb; | ||
1095 | } | ||
1096 | |||
1097 | dsp_scb_descriptor_t * cs46xx_dsp_create_magic_snoop_scb(cs46xx_t * chip,char * scb_name,u32 dest, | ||
1098 | u16 snoop_buffer_address, | ||
1099 | dsp_scb_descriptor_t * snoop_scb, | ||
1100 | dsp_scb_descriptor_t * parent_scb, | ||
1101 | int scb_child_type) | ||
1102 | { | ||
1103 | dsp_scb_descriptor_t * scb; | ||
1104 | |||
1105 | magic_snoop_task_t magic_snoop_scb = { | ||
1106 | /* 0 */ 0, /* i0 */ | ||
1107 | /* 1 */ 0, /* i1 */ | ||
1108 | /* 2 */ snoop_buffer_address << 0x10, | ||
1109 | /* 3 */ 0,snoop_scb->address, | ||
1110 | /* 4 */ 0, /* i3 */ | ||
1111 | /* 5 */ 0, /* i4 */ | ||
1112 | /* 6 */ 0, /* i5 */ | ||
1113 | /* 7 */ 0, /* i6 */ | ||
1114 | /* 8 */ 0, /* i7 */ | ||
1115 | /* 9 */ 0,0, /* next_scb, sub_list_ptr */ | ||
1116 | /* A */ 0,0, /* entry_point, this_ptr */ | ||
1117 | /* B */ RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_64, | ||
1118 | /* C */ snoop_buffer_address << 0x10, | ||
1119 | /* D */ 0, | ||
1120 | /* E */ { 0x8000,0x8000, | ||
1121 | /* F */ 0xffff,0xffff | ||
1122 | } | ||
1123 | }; | ||
1124 | |||
1125 | scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&magic_snoop_scb, | ||
1126 | dest,"MAGICSNOOPTASK",parent_scb, | ||
1127 | scb_child_type); | ||
1128 | |||
1129 | return scb; | ||
1130 | } | ||
1131 | |||
1132 | static dsp_scb_descriptor_t * find_next_free_scb (cs46xx_t * chip,dsp_scb_descriptor_t * from) | ||
1133 | { | ||
1134 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
1135 | dsp_scb_descriptor_t * scb = from; | ||
1136 | |||
1137 | while (scb->next_scb_ptr != ins->the_null_scb) { | ||
1138 | snd_assert (scb->next_scb_ptr != NULL, return NULL); | ||
1139 | |||
1140 | scb = scb->next_scb_ptr; | ||
1141 | } | ||
1142 | |||
1143 | return scb; | ||
1144 | } | ||
1145 | |||
1146 | static u32 pcm_reader_buffer_addr[DSP_MAX_PCM_CHANNELS] = { | ||
1147 | 0x0600, /* 1 */ | ||
1148 | 0x1500, /* 2 */ | ||
1149 | 0x1580, /* 3 */ | ||
1150 | 0x1600, /* 4 */ | ||
1151 | 0x1680, /* 5 */ | ||
1152 | 0x1700, /* 6 */ | ||
1153 | 0x1780, /* 7 */ | ||
1154 | 0x1800, /* 8 */ | ||
1155 | 0x1880, /* 9 */ | ||
1156 | 0x1900, /* 10 */ | ||
1157 | 0x1980, /* 11 */ | ||
1158 | 0x1A00, /* 12 */ | ||
1159 | 0x1A80, /* 13 */ | ||
1160 | 0x1B00, /* 14 */ | ||
1161 | 0x1B80, /* 15 */ | ||
1162 | 0x1C00, /* 16 */ | ||
1163 | 0x1C80, /* 17 */ | ||
1164 | 0x1D00, /* 18 */ | ||
1165 | 0x1D80, /* 19 */ | ||
1166 | 0x1E00, /* 20 */ | ||
1167 | 0x1E80, /* 21 */ | ||
1168 | 0x1F00, /* 22 */ | ||
1169 | 0x1F80, /* 23 */ | ||
1170 | 0x2000, /* 24 */ | ||
1171 | 0x2080, /* 25 */ | ||
1172 | 0x2100, /* 26 */ | ||
1173 | 0x2180, /* 27 */ | ||
1174 | 0x2200, /* 28 */ | ||
1175 | 0x2280, /* 29 */ | ||
1176 | 0x2300, /* 30 */ | ||
1177 | 0x2380, /* 31 */ | ||
1178 | 0x2400, /* 32 */ | ||
1179 | }; | ||
1180 | |||
1181 | static u32 src_output_buffer_addr[DSP_MAX_SRC_NR] = { | ||
1182 | 0x2B80, | ||
1183 | 0x2BA0, | ||
1184 | 0x2BC0, | ||
1185 | 0x2BE0, | ||
1186 | 0x2D00, | ||
1187 | 0x2D20, | ||
1188 | 0x2D40, | ||
1189 | 0x2D60, | ||
1190 | 0x2D80, | ||
1191 | 0x2DA0, | ||
1192 | 0x2DC0, | ||
1193 | 0x2DE0, | ||
1194 | 0x2E00, | ||
1195 | 0x2E20 | ||
1196 | }; | ||
1197 | |||
1198 | static u32 src_delay_buffer_addr[DSP_MAX_SRC_NR] = { | ||
1199 | 0x2480, | ||
1200 | 0x2500, | ||
1201 | 0x2580, | ||
1202 | 0x2600, | ||
1203 | 0x2680, | ||
1204 | 0x2700, | ||
1205 | 0x2780, | ||
1206 | 0x2800, | ||
1207 | 0x2880, | ||
1208 | 0x2900, | ||
1209 | 0x2980, | ||
1210 | 0x2A00, | ||
1211 | 0x2A80, | ||
1212 | 0x2B00 | ||
1213 | }; | ||
1214 | |||
1215 | pcm_channel_descriptor_t * cs46xx_dsp_create_pcm_channel (cs46xx_t * chip, | ||
1216 | u32 sample_rate, void * private_data, | ||
1217 | u32 hw_dma_addr, | ||
1218 | int pcm_channel_id) | ||
1219 | { | ||
1220 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
1221 | dsp_scb_descriptor_t * src_scb = NULL,* pcm_scb, * mixer_scb = NULL; | ||
1222 | dsp_scb_descriptor_t * src_parent_scb = NULL; | ||
1223 | |||
1224 | /* dsp_scb_descriptor_t * pcm_parent_scb; */ | ||
1225 | char scb_name[DSP_MAX_SCB_NAME]; | ||
1226 | int i,pcm_index = -1, insert_point, src_index = -1,pass_through = 0; | ||
1227 | unsigned long flags; | ||
1228 | |||
1229 | switch (pcm_channel_id) { | ||
1230 | case DSP_PCM_MAIN_CHANNEL: | ||
1231 | mixer_scb = ins->master_mix_scb; | ||
1232 | break; | ||
1233 | case DSP_PCM_REAR_CHANNEL: | ||
1234 | mixer_scb = ins->rear_mix_scb; | ||
1235 | break; | ||
1236 | case DSP_PCM_CENTER_LFE_CHANNEL: | ||
1237 | mixer_scb = ins->center_lfe_mix_scb; | ||
1238 | break; | ||
1239 | case DSP_PCM_S71_CHANNEL: | ||
1240 | /* TODO */ | ||
1241 | snd_assert(0); | ||
1242 | break; | ||
1243 | case DSP_IEC958_CHANNEL: | ||
1244 | snd_assert (ins->asynch_tx_scb != NULL, return NULL); | ||
1245 | mixer_scb = ins->asynch_tx_scb; | ||
1246 | |||
1247 | /* if sample rate is set to 48khz we pass | ||
1248 | the Sample Rate Converted (which could | ||
1249 | alter the raw data stream ...) */ | ||
1250 | if (sample_rate == 48000) { | ||
1251 | snd_printdd ("IEC958 pass through\n"); | ||
1252 | /* Hack to bypass creating a new SRC */ | ||
1253 | pass_through = 1; | ||
1254 | } | ||
1255 | break; | ||
1256 | default: | ||
1257 | snd_assert (0); | ||
1258 | return NULL; | ||
1259 | } | ||
1260 | /* default sample rate is 44100 */ | ||
1261 | if (!sample_rate) sample_rate = 44100; | ||
1262 | |||
1263 | /* search for a already created SRC SCB with the same sample rate */ | ||
1264 | for (i = 0; i < DSP_MAX_PCM_CHANNELS && | ||
1265 | (pcm_index == -1 || src_scb == NULL); ++i) { | ||
1266 | |||
1267 | /* virtual channel reserved | ||
1268 | for capture */ | ||
1269 | if (i == CS46XX_DSP_CAPTURE_CHANNEL) continue; | ||
1270 | |||
1271 | if (ins->pcm_channels[i].active) { | ||
1272 | if (!src_scb && | ||
1273 | ins->pcm_channels[i].sample_rate == sample_rate && | ||
1274 | ins->pcm_channels[i].mixer_scb == mixer_scb) { | ||
1275 | src_scb = ins->pcm_channels[i].src_scb; | ||
1276 | ins->pcm_channels[i].src_scb->ref_count ++; | ||
1277 | src_index = ins->pcm_channels[i].src_slot; | ||
1278 | } | ||
1279 | } else if (pcm_index == -1) { | ||
1280 | pcm_index = i; | ||
1281 | } | ||
1282 | } | ||
1283 | |||
1284 | if (pcm_index == -1) { | ||
1285 | snd_printk (KERN_ERR "dsp_spos: no free PCM channel\n"); | ||
1286 | return NULL; | ||
1287 | } | ||
1288 | |||
1289 | if (src_scb == NULL) { | ||
1290 | if (ins->nsrc_scb >= DSP_MAX_SRC_NR) { | ||
1291 | snd_printk(KERN_ERR "dsp_spos: to many SRC instances\n!"); | ||
1292 | return NULL; | ||
1293 | } | ||
1294 | |||
1295 | /* find a free slot */ | ||
1296 | for (i = 0; i < DSP_MAX_SRC_NR; ++i) { | ||
1297 | if (ins->src_scb_slots[i] == 0) { | ||
1298 | src_index = i; | ||
1299 | ins->src_scb_slots[i] = 1; | ||
1300 | break; | ||
1301 | } | ||
1302 | } | ||
1303 | snd_assert (src_index != -1,return NULL); | ||
1304 | |||
1305 | /* we need to create a new SRC SCB */ | ||
1306 | if (mixer_scb->sub_list_ptr == ins->the_null_scb) { | ||
1307 | src_parent_scb = mixer_scb; | ||
1308 | insert_point = SCB_ON_PARENT_SUBLIST_SCB; | ||
1309 | } else { | ||
1310 | src_parent_scb = find_next_free_scb(chip,mixer_scb->sub_list_ptr); | ||
1311 | insert_point = SCB_ON_PARENT_NEXT_SCB; | ||
1312 | } | ||
1313 | |||
1314 | snprintf (scb_name,DSP_MAX_SCB_NAME,"SrcTask_SCB%d",src_index); | ||
1315 | |||
1316 | snd_printdd( "dsp_spos: creating SRC \"%s\"\n",scb_name); | ||
1317 | src_scb = cs46xx_dsp_create_src_task_scb(chip,scb_name, | ||
1318 | sample_rate, | ||
1319 | src_output_buffer_addr[src_index], | ||
1320 | src_delay_buffer_addr[src_index], | ||
1321 | /* 0x400 - 0x600 source SCBs */ | ||
1322 | 0x400 + (src_index * 0x10) , | ||
1323 | src_parent_scb, | ||
1324 | insert_point, | ||
1325 | pass_through); | ||
1326 | |||
1327 | if (!src_scb) { | ||
1328 | snd_printk (KERN_ERR "dsp_spos: failed to create SRCtaskSCB\n"); | ||
1329 | return NULL; | ||
1330 | } | ||
1331 | |||
1332 | /* cs46xx_dsp_set_src_sample_rate(chip,src_scb,sample_rate); */ | ||
1333 | |||
1334 | ins->nsrc_scb ++; | ||
1335 | } | ||
1336 | |||
1337 | |||
1338 | snprintf (scb_name,DSP_MAX_SCB_NAME,"PCMReader_SCB%d",pcm_index); | ||
1339 | |||
1340 | snd_printdd( "dsp_spos: creating PCM \"%s\" (%d)\n",scb_name, | ||
1341 | pcm_channel_id); | ||
1342 | |||
1343 | pcm_scb = cs46xx_dsp_create_pcm_reader_scb(chip,scb_name, | ||
1344 | pcm_reader_buffer_addr[pcm_index], | ||
1345 | /* 0x200 - 400 PCMreader SCBs */ | ||
1346 | (pcm_index * 0x10) + 0x200, | ||
1347 | pcm_index, /* virtual channel 0-31 */ | ||
1348 | hw_dma_addr, /* pcm hw addr */ | ||
1349 | NULL, /* parent SCB ptr */ | ||
1350 | 0 /* insert point */ | ||
1351 | ); | ||
1352 | |||
1353 | if (!pcm_scb) { | ||
1354 | snd_printk (KERN_ERR "dsp_spos: failed to create PCMreaderSCB\n"); | ||
1355 | return NULL; | ||
1356 | } | ||
1357 | |||
1358 | spin_lock_irqsave(&chip->reg_lock, flags); | ||
1359 | ins->pcm_channels[pcm_index].sample_rate = sample_rate; | ||
1360 | ins->pcm_channels[pcm_index].pcm_reader_scb = pcm_scb; | ||
1361 | ins->pcm_channels[pcm_index].src_scb = src_scb; | ||
1362 | ins->pcm_channels[pcm_index].unlinked = 1; | ||
1363 | ins->pcm_channels[pcm_index].private_data = private_data; | ||
1364 | ins->pcm_channels[pcm_index].src_slot = src_index; | ||
1365 | ins->pcm_channels[pcm_index].active = 1; | ||
1366 | ins->pcm_channels[pcm_index].pcm_slot = pcm_index; | ||
1367 | ins->pcm_channels[pcm_index].mixer_scb = mixer_scb; | ||
1368 | ins->npcm_channels ++; | ||
1369 | spin_unlock_irqrestore(&chip->reg_lock, flags); | ||
1370 | |||
1371 | return (ins->pcm_channels + pcm_index); | ||
1372 | } | ||
1373 | |||
1374 | int cs46xx_dsp_pcm_channel_set_period (cs46xx_t * chip, | ||
1375 | pcm_channel_descriptor_t * pcm_channel, | ||
1376 | int period_size) | ||
1377 | { | ||
1378 | u32 temp = snd_cs46xx_peek (chip,pcm_channel->pcm_reader_scb->address << 2); | ||
1379 | temp &= ~DMA_RQ_C1_SOURCE_SIZE_MASK; | ||
1380 | |||
1381 | switch (period_size) { | ||
1382 | case 2048: | ||
1383 | temp |= DMA_RQ_C1_SOURCE_MOD1024; | ||
1384 | break; | ||
1385 | case 1024: | ||
1386 | temp |= DMA_RQ_C1_SOURCE_MOD512; | ||
1387 | break; | ||
1388 | case 512: | ||
1389 | temp |= DMA_RQ_C1_SOURCE_MOD256; | ||
1390 | break; | ||
1391 | case 256: | ||
1392 | temp |= DMA_RQ_C1_SOURCE_MOD128; | ||
1393 | break; | ||
1394 | case 128: | ||
1395 | temp |= DMA_RQ_C1_SOURCE_MOD64; | ||
1396 | break; | ||
1397 | case 64: | ||
1398 | temp |= DMA_RQ_C1_SOURCE_MOD32; | ||
1399 | break; | ||
1400 | case 32: | ||
1401 | temp |= DMA_RQ_C1_SOURCE_MOD16; | ||
1402 | break; | ||
1403 | default: | ||
1404 | snd_printdd ("period size (%d) not supported by HW\n", period_size); | ||
1405 | return -EINVAL; | ||
1406 | } | ||
1407 | |||
1408 | snd_cs46xx_poke (chip,pcm_channel->pcm_reader_scb->address << 2,temp); | ||
1409 | |||
1410 | return 0; | ||
1411 | } | ||
1412 | |||
1413 | int cs46xx_dsp_pcm_ostream_set_period (cs46xx_t * chip, | ||
1414 | int period_size) | ||
1415 | { | ||
1416 | u32 temp = snd_cs46xx_peek (chip,WRITEBACK_SCB_ADDR << 2); | ||
1417 | temp &= ~DMA_RQ_C1_DEST_SIZE_MASK; | ||
1418 | |||
1419 | switch (period_size) { | ||
1420 | case 2048: | ||
1421 | temp |= DMA_RQ_C1_DEST_MOD1024; | ||
1422 | break; | ||
1423 | case 1024: | ||
1424 | temp |= DMA_RQ_C1_DEST_MOD512; | ||
1425 | break; | ||
1426 | case 512: | ||
1427 | temp |= DMA_RQ_C1_DEST_MOD256; | ||
1428 | break; | ||
1429 | case 256: | ||
1430 | temp |= DMA_RQ_C1_DEST_MOD128; | ||
1431 | break; | ||
1432 | case 128: | ||
1433 | temp |= DMA_RQ_C1_DEST_MOD64; | ||
1434 | break; | ||
1435 | case 64: | ||
1436 | temp |= DMA_RQ_C1_DEST_MOD32; | ||
1437 | break; | ||
1438 | case 32: | ||
1439 | temp |= DMA_RQ_C1_DEST_MOD16; | ||
1440 | break; | ||
1441 | default: | ||
1442 | snd_printdd ("period size (%d) not supported by HW\n", period_size); | ||
1443 | return -EINVAL; | ||
1444 | } | ||
1445 | |||
1446 | snd_cs46xx_poke (chip,WRITEBACK_SCB_ADDR << 2,temp); | ||
1447 | |||
1448 | return 0; | ||
1449 | } | ||
1450 | |||
1451 | void cs46xx_dsp_destroy_pcm_channel (cs46xx_t * chip,pcm_channel_descriptor_t * pcm_channel) | ||
1452 | { | ||
1453 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
1454 | unsigned long flags; | ||
1455 | |||
1456 | snd_assert(pcm_channel->active, return ); | ||
1457 | snd_assert(ins->npcm_channels > 0, return ); | ||
1458 | snd_assert(pcm_channel->src_scb->ref_count > 0, return ); | ||
1459 | |||
1460 | spin_lock_irqsave(&chip->reg_lock, flags); | ||
1461 | pcm_channel->unlinked = 1; | ||
1462 | pcm_channel->active = 0; | ||
1463 | pcm_channel->private_data = NULL; | ||
1464 | pcm_channel->src_scb->ref_count --; | ||
1465 | ins->npcm_channels --; | ||
1466 | spin_unlock_irqrestore(&chip->reg_lock, flags); | ||
1467 | |||
1468 | cs46xx_dsp_remove_scb(chip,pcm_channel->pcm_reader_scb); | ||
1469 | |||
1470 | if (!pcm_channel->src_scb->ref_count) { | ||
1471 | cs46xx_dsp_remove_scb(chip,pcm_channel->src_scb); | ||
1472 | |||
1473 | snd_assert (pcm_channel->src_slot >= 0 && pcm_channel->src_slot <= DSP_MAX_SRC_NR, | ||
1474 | return ); | ||
1475 | |||
1476 | ins->src_scb_slots[pcm_channel->src_slot] = 0; | ||
1477 | ins->nsrc_scb --; | ||
1478 | } | ||
1479 | } | ||
1480 | |||
1481 | int cs46xx_dsp_pcm_unlink (cs46xx_t * chip,pcm_channel_descriptor_t * pcm_channel) | ||
1482 | { | ||
1483 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
1484 | unsigned long flags; | ||
1485 | |||
1486 | snd_assert(pcm_channel->active,return -EIO); | ||
1487 | snd_assert(ins->npcm_channels > 0,return -EIO); | ||
1488 | |||
1489 | spin_lock(&pcm_channel->src_scb->lock); | ||
1490 | |||
1491 | if (pcm_channel->unlinked) { | ||
1492 | spin_unlock(&pcm_channel->src_scb->lock); | ||
1493 | return -EIO; | ||
1494 | } | ||
1495 | |||
1496 | spin_lock_irqsave(&chip->reg_lock, flags); | ||
1497 | pcm_channel->unlinked = 1; | ||
1498 | spin_unlock_irqrestore(&chip->reg_lock, flags); | ||
1499 | |||
1500 | _dsp_unlink_scb (chip,pcm_channel->pcm_reader_scb); | ||
1501 | |||
1502 | spin_unlock(&pcm_channel->src_scb->lock); | ||
1503 | return 0; | ||
1504 | } | ||
1505 | |||
1506 | int cs46xx_dsp_pcm_link (cs46xx_t * chip,pcm_channel_descriptor_t * pcm_channel) | ||
1507 | { | ||
1508 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
1509 | dsp_scb_descriptor_t * parent_scb; | ||
1510 | dsp_scb_descriptor_t * src_scb = pcm_channel->src_scb; | ||
1511 | unsigned long flags; | ||
1512 | |||
1513 | spin_lock(&pcm_channel->src_scb->lock); | ||
1514 | |||
1515 | if (pcm_channel->unlinked == 0) { | ||
1516 | spin_unlock(&pcm_channel->src_scb->lock); | ||
1517 | return -EIO; | ||
1518 | } | ||
1519 | |||
1520 | parent_scb = src_scb; | ||
1521 | |||
1522 | if (src_scb->sub_list_ptr != ins->the_null_scb) { | ||
1523 | src_scb->sub_list_ptr->parent_scb_ptr = pcm_channel->pcm_reader_scb; | ||
1524 | pcm_channel->pcm_reader_scb->next_scb_ptr = src_scb->sub_list_ptr; | ||
1525 | } | ||
1526 | |||
1527 | src_scb->sub_list_ptr = pcm_channel->pcm_reader_scb; | ||
1528 | |||
1529 | snd_assert (pcm_channel->pcm_reader_scb->parent_scb_ptr == NULL, ; ); | ||
1530 | pcm_channel->pcm_reader_scb->parent_scb_ptr = parent_scb; | ||
1531 | |||
1532 | spin_lock_irqsave(&chip->reg_lock, flags); | ||
1533 | |||
1534 | /* update SCB entry in DSP RAM */ | ||
1535 | cs46xx_dsp_spos_update_scb(chip,pcm_channel->pcm_reader_scb); | ||
1536 | |||
1537 | /* update parent SCB entry */ | ||
1538 | cs46xx_dsp_spos_update_scb(chip,parent_scb); | ||
1539 | |||
1540 | pcm_channel->unlinked = 0; | ||
1541 | spin_unlock_irqrestore(&chip->reg_lock, flags); | ||
1542 | |||
1543 | spin_unlock(&pcm_channel->src_scb->lock); | ||
1544 | return 0; | ||
1545 | } | ||
1546 | |||
1547 | dsp_scb_descriptor_t * cs46xx_add_record_source (cs46xx_t *chip,dsp_scb_descriptor_t * source, | ||
1548 | u16 addr,char * scb_name) | ||
1549 | { | ||
1550 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
1551 | dsp_scb_descriptor_t * parent; | ||
1552 | dsp_scb_descriptor_t * pcm_input; | ||
1553 | int insert_point; | ||
1554 | |||
1555 | snd_assert (ins->record_mixer_scb != NULL,return NULL); | ||
1556 | |||
1557 | if (ins->record_mixer_scb->sub_list_ptr != ins->the_null_scb) { | ||
1558 | parent = find_next_free_scb (chip,ins->record_mixer_scb->sub_list_ptr); | ||
1559 | insert_point = SCB_ON_PARENT_NEXT_SCB; | ||
1560 | } else { | ||
1561 | parent = ins->record_mixer_scb; | ||
1562 | insert_point = SCB_ON_PARENT_SUBLIST_SCB; | ||
1563 | } | ||
1564 | |||
1565 | pcm_input = cs46xx_dsp_create_pcm_serial_input_scb(chip,scb_name,addr, | ||
1566 | source, parent, | ||
1567 | insert_point); | ||
1568 | |||
1569 | return pcm_input; | ||
1570 | } | ||
1571 | |||
1572 | int cs46xx_src_unlink(cs46xx_t *chip,dsp_scb_descriptor_t * src) | ||
1573 | { | ||
1574 | snd_assert (src->parent_scb_ptr != NULL, return -EINVAL ); | ||
1575 | |||
1576 | /* mute SCB */ | ||
1577 | cs46xx_dsp_scb_set_volume (chip,src,0,0); | ||
1578 | |||
1579 | _dsp_unlink_scb (chip,src); | ||
1580 | |||
1581 | return 0; | ||
1582 | } | ||
1583 | |||
1584 | int cs46xx_src_link(cs46xx_t *chip,dsp_scb_descriptor_t * src) | ||
1585 | { | ||
1586 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
1587 | dsp_scb_descriptor_t * parent_scb; | ||
1588 | |||
1589 | snd_assert (src->parent_scb_ptr == NULL, return -EINVAL ); | ||
1590 | snd_assert(ins->master_mix_scb !=NULL, return -EINVAL ); | ||
1591 | |||
1592 | if (ins->master_mix_scb->sub_list_ptr != ins->the_null_scb) { | ||
1593 | parent_scb = find_next_free_scb (chip,ins->master_mix_scb->sub_list_ptr); | ||
1594 | parent_scb->next_scb_ptr = src; | ||
1595 | } else { | ||
1596 | parent_scb = ins->master_mix_scb; | ||
1597 | parent_scb->sub_list_ptr = src; | ||
1598 | } | ||
1599 | |||
1600 | src->parent_scb_ptr = parent_scb; | ||
1601 | |||
1602 | /* update entry in DSP RAM */ | ||
1603 | cs46xx_dsp_spos_update_scb(chip,parent_scb); | ||
1604 | |||
1605 | return 0; | ||
1606 | } | ||
1607 | |||
1608 | int cs46xx_dsp_enable_spdif_out (cs46xx_t *chip) | ||
1609 | { | ||
1610 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
1611 | |||
1612 | if ( ! (ins->spdif_status_out & DSP_SPDIF_STATUS_HW_ENABLED) ) { | ||
1613 | cs46xx_dsp_enable_spdif_hw (chip); | ||
1614 | } | ||
1615 | |||
1616 | /* dont touch anything if SPDIF is open */ | ||
1617 | if ( ins->spdif_status_out & DSP_SPDIF_STATUS_PLAYBACK_OPEN) { | ||
1618 | /* when cs46xx_iec958_post_close(...) is called it | ||
1619 | will call this function if necessary depending on | ||
1620 | this bit */ | ||
1621 | ins->spdif_status_out |= DSP_SPDIF_STATUS_OUTPUT_ENABLED; | ||
1622 | |||
1623 | return -EBUSY; | ||
1624 | } | ||
1625 | |||
1626 | snd_assert (ins->asynch_tx_scb == NULL, return -EINVAL); | ||
1627 | snd_assert (ins->master_mix_scb->next_scb_ptr == ins->the_null_scb, return -EINVAL); | ||
1628 | |||
1629 | /* reset output snooper sample buffer pointer */ | ||
1630 | snd_cs46xx_poke (chip, (ins->ref_snoop_scb->address + 2) << 2, | ||
1631 | (OUTPUT_SNOOP_BUFFER + 0x10) << 0x10 ); | ||
1632 | |||
1633 | /* The asynch. transfer task */ | ||
1634 | ins->asynch_tx_scb = cs46xx_dsp_create_asynch_fg_tx_scb(chip,"AsynchFGTxSCB",ASYNCTX_SCB_ADDR, | ||
1635 | SPDIFO_SCB_INST, | ||
1636 | SPDIFO_IP_OUTPUT_BUFFER1, | ||
1637 | ins->master_mix_scb, | ||
1638 | SCB_ON_PARENT_NEXT_SCB); | ||
1639 | if (!ins->asynch_tx_scb) return -ENOMEM; | ||
1640 | |||
1641 | ins->spdif_pcm_input_scb = cs46xx_dsp_create_pcm_serial_input_scb(chip,"PCMSerialInput_II", | ||
1642 | PCMSERIALINII_SCB_ADDR, | ||
1643 | ins->ref_snoop_scb, | ||
1644 | ins->asynch_tx_scb, | ||
1645 | SCB_ON_PARENT_SUBLIST_SCB); | ||
1646 | |||
1647 | |||
1648 | if (!ins->spdif_pcm_input_scb) return -ENOMEM; | ||
1649 | |||
1650 | /* monitor state */ | ||
1651 | ins->spdif_status_out |= DSP_SPDIF_STATUS_OUTPUT_ENABLED; | ||
1652 | |||
1653 | return 0; | ||
1654 | } | ||
1655 | |||
1656 | int cs46xx_dsp_disable_spdif_out (cs46xx_t *chip) | ||
1657 | { | ||
1658 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
1659 | |||
1660 | /* dont touch anything if SPDIF is open */ | ||
1661 | if ( ins->spdif_status_out & DSP_SPDIF_STATUS_PLAYBACK_OPEN) { | ||
1662 | ins->spdif_status_out &= ~DSP_SPDIF_STATUS_OUTPUT_ENABLED; | ||
1663 | return -EBUSY; | ||
1664 | } | ||
1665 | |||
1666 | /* check integrety */ | ||
1667 | snd_assert (ins->asynch_tx_scb != NULL, return -EINVAL); | ||
1668 | snd_assert (ins->spdif_pcm_input_scb != NULL,return -EINVAL); | ||
1669 | snd_assert (ins->master_mix_scb->next_scb_ptr == ins->asynch_tx_scb, return -EINVAL); | ||
1670 | snd_assert (ins->asynch_tx_scb->parent_scb_ptr == ins->master_mix_scb, return -EINVAL); | ||
1671 | |||
1672 | cs46xx_dsp_remove_scb (chip,ins->spdif_pcm_input_scb); | ||
1673 | cs46xx_dsp_remove_scb (chip,ins->asynch_tx_scb); | ||
1674 | |||
1675 | ins->spdif_pcm_input_scb = NULL; | ||
1676 | ins->asynch_tx_scb = NULL; | ||
1677 | |||
1678 | /* clear buffer to prevent any undesired noise */ | ||
1679 | _dsp_clear_sample_buffer(chip,SPDIFO_IP_OUTPUT_BUFFER1,256); | ||
1680 | |||
1681 | /* monitor state */ | ||
1682 | ins->spdif_status_out &= ~DSP_SPDIF_STATUS_OUTPUT_ENABLED; | ||
1683 | |||
1684 | |||
1685 | return 0; | ||
1686 | } | ||
1687 | |||
1688 | int cs46xx_iec958_pre_open (cs46xx_t *chip) | ||
1689 | { | ||
1690 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
1691 | |||
1692 | if ( ins->spdif_status_out & DSP_SPDIF_STATUS_OUTPUT_ENABLED ) { | ||
1693 | /* remove AsynchFGTxSCB and and PCMSerialInput_II */ | ||
1694 | cs46xx_dsp_disable_spdif_out (chip); | ||
1695 | |||
1696 | /* save state */ | ||
1697 | ins->spdif_status_out |= DSP_SPDIF_STATUS_OUTPUT_ENABLED; | ||
1698 | } | ||
1699 | |||
1700 | /* if not enabled already */ | ||
1701 | if ( !(ins->spdif_status_out & DSP_SPDIF_STATUS_HW_ENABLED) ) { | ||
1702 | cs46xx_dsp_enable_spdif_hw (chip); | ||
1703 | } | ||
1704 | |||
1705 | /* Create the asynch. transfer task for playback */ | ||
1706 | ins->asynch_tx_scb = cs46xx_dsp_create_asynch_fg_tx_scb(chip,"AsynchFGTxSCB",ASYNCTX_SCB_ADDR, | ||
1707 | SPDIFO_SCB_INST, | ||
1708 | SPDIFO_IP_OUTPUT_BUFFER1, | ||
1709 | ins->master_mix_scb, | ||
1710 | SCB_ON_PARENT_NEXT_SCB); | ||
1711 | |||
1712 | |||
1713 | /* set spdif channel status value for streaming */ | ||
1714 | cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_stream); | ||
1715 | |||
1716 | ins->spdif_status_out |= DSP_SPDIF_STATUS_PLAYBACK_OPEN; | ||
1717 | |||
1718 | return 0; | ||
1719 | } | ||
1720 | |||
1721 | int cs46xx_iec958_post_close (cs46xx_t *chip) | ||
1722 | { | ||
1723 | dsp_spos_instance_t * ins = chip->dsp_spos_instance; | ||
1724 | |||
1725 | snd_assert (ins->asynch_tx_scb != NULL, return -EINVAL); | ||
1726 | |||
1727 | ins->spdif_status_out &= ~DSP_SPDIF_STATUS_PLAYBACK_OPEN; | ||
1728 | |||
1729 | /* restore settings */ | ||
1730 | cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default); | ||
1731 | |||
1732 | /* deallocate stuff */ | ||
1733 | if (ins->spdif_pcm_input_scb != NULL) { | ||
1734 | cs46xx_dsp_remove_scb (chip,ins->spdif_pcm_input_scb); | ||
1735 | ins->spdif_pcm_input_scb = NULL; | ||
1736 | } | ||
1737 | |||
1738 | cs46xx_dsp_remove_scb (chip,ins->asynch_tx_scb); | ||
1739 | ins->asynch_tx_scb = NULL; | ||
1740 | |||
1741 | /* clear buffer to prevent any undesired noise */ | ||
1742 | _dsp_clear_sample_buffer(chip,SPDIFO_IP_OUTPUT_BUFFER1,256); | ||
1743 | |||
1744 | /* restore state */ | ||
1745 | if ( ins->spdif_status_out & DSP_SPDIF_STATUS_OUTPUT_ENABLED ) { | ||
1746 | cs46xx_dsp_enable_spdif_out (chip); | ||
1747 | } | ||
1748 | |||
1749 | return 0; | ||
1750 | } | ||
diff --git a/sound/pci/cs46xx/imgs/cwc4630.h b/sound/pci/cs46xx/imgs/cwc4630.h new file mode 100644 index 000000000000..8bed07f9996e --- /dev/null +++ b/sound/pci/cs46xx/imgs/cwc4630.h | |||
@@ -0,0 +1,320 @@ | |||
1 | /* generated from cwc4630.osp DO NOT MODIFY */ | ||
2 | |||
3 | #ifndef __HEADER_cwc4630_H__ | ||
4 | #define __HEADER_cwc4630_H__ | ||
5 | |||
6 | static symbol_entry_t cwc4630_symbols[] = { | ||
7 | { 0x0000, "BEGINADDRESS",0x00 }, | ||
8 | { 0x8000, "EXECCHILD",0x03 }, | ||
9 | { 0x8001, "EXECCHILD_98",0x03 }, | ||
10 | { 0x8003, "EXECCHILD_PUSH1IND",0x03 }, | ||
11 | { 0x8008, "EXECSIBLING",0x03 }, | ||
12 | { 0x800a, "EXECSIBLING_298",0x03 }, | ||
13 | { 0x800b, "EXECSIBLING_2IND1",0x03 }, | ||
14 | { 0x8010, "TIMINGMASTER",0x03 }, | ||
15 | { 0x804f, "S16_CODECINPUTTASK",0x03 }, | ||
16 | { 0x805e, "PCMSERIALINPUTTASK",0x03 }, | ||
17 | { 0x806d, "S16_MIX_TO_OSTREAM",0x03 }, | ||
18 | { 0x809a, "S16_MIX",0x03 }, | ||
19 | { 0x80bb, "S16_UPSRC",0x03 }, | ||
20 | { 0x813b, "MIX3_EXP",0x03 }, | ||
21 | { 0x8164, "DECIMATEBYPOW2",0x03 }, | ||
22 | { 0x8197, "VARIDECIMATE",0x03 }, | ||
23 | { 0x81f2, "_3DINPUTTASK",0x03 }, | ||
24 | { 0x820a, "_3DPRLGCINPTASK",0x03 }, | ||
25 | { 0x8227, "_3DSTEREOINPUTTASK",0x03 }, | ||
26 | { 0x8242, "_3DOUTPUTTASK",0x03 }, | ||
27 | { 0x82c4, "HRTF_MORPH_TASK",0x03 }, | ||
28 | { 0x82c6, "WAIT4DATA",0x03 }, | ||
29 | { 0x82fa, "PROLOGIC",0x03 }, | ||
30 | { 0x8496, "DECORRELATOR",0x03 }, | ||
31 | { 0x84a4, "STEREO2MONO",0x03 }, | ||
32 | { 0x0070, "SPOSCB",0x02 }, | ||
33 | { 0x0107, "TASKTREETHREAD",0x03 }, | ||
34 | { 0x013c, "TASKTREEHEADERCODE",0x03 }, | ||
35 | { 0x0145, "FGTASKTREEHEADERCODE",0x03 }, | ||
36 | { 0x0169, "NULLALGORITHM",0x03 }, | ||
37 | { 0x016d, "HFGEXECCHILD",0x03 }, | ||
38 | { 0x016e, "HFGEXECCHILD_98",0x03 }, | ||
39 | { 0x0170, "HFGEXECCHILD_PUSH1IND",0x03 }, | ||
40 | { 0x0173, "HFGEXECSIBLING",0x03 }, | ||
41 | { 0x0175, "HFGEXECSIBLING_298",0x03 }, | ||
42 | { 0x0176, "HFGEXECSIBLING_2IND1",0x03 }, | ||
43 | { 0x0179, "S16_CODECOUTPUTTASK",0x03 }, | ||
44 | { 0x0194, "#CODE_END",0x00 }, | ||
45 | }; /* cwc4630 symbols */ | ||
46 | |||
47 | static u32 cwc4630_code[] = { | ||
48 | /* BEGINADDRESS */ | ||
49 | /* 0000 */ 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
50 | /* 0002 */ 0x00001705,0x00001400,0x000a411e,0x00001003, | ||
51 | /* 0004 */ 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
52 | /* 0006 */ 0x00009705,0x00001400,0x000a411e,0x00001003, | ||
53 | /* 0008 */ 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
54 | /* 000A */ 0x00011705,0x00001400,0x000a411e,0x00001003, | ||
55 | /* 000C */ 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
56 | /* 000E */ 0x00019705,0x00001400,0x000a411e,0x00001003, | ||
57 | /* 0010 */ 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
58 | /* 0012 */ 0x00021705,0x00001400,0x000a411e,0x00001003, | ||
59 | /* 0014 */ 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
60 | /* 0016 */ 0x00029705,0x00001400,0x000a411e,0x00001003, | ||
61 | /* 0018 */ 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
62 | /* 001A */ 0x00031705,0x00001400,0x000a411e,0x00001003, | ||
63 | /* 001C */ 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
64 | /* 001E */ 0x00039705,0x00001400,0x000a411e,0x00001003, | ||
65 | /* 0020 */ 0x000fe19e,0x00001003,0x0009c730,0x00001003, | ||
66 | /* 0022 */ 0x0008e19c,0x00001003,0x000083c1,0x00093040, | ||
67 | /* 0024 */ 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
68 | /* 0026 */ 0x00009705,0x00001400,0x000a211e,0x00001003, | ||
69 | /* 0028 */ 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
70 | /* 002A */ 0x00011705,0x00001400,0x000a211e,0x00001003, | ||
71 | /* 002C */ 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
72 | /* 002E */ 0x00019705,0x00001400,0x000a211e,0x00001003, | ||
73 | /* 0030 */ 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
74 | /* 0032 */ 0x00021705,0x00001400,0x000a211e,0x00001003, | ||
75 | /* 0034 */ 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
76 | /* 0036 */ 0x00029705,0x00001400,0x000a211e,0x00001003, | ||
77 | /* 0038 */ 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
78 | /* 003A */ 0x00031705,0x00001400,0x000a211e,0x00001003, | ||
79 | /* 003C */ 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
80 | /* 003E */ 0x00039705,0x00001400,0x000a211e,0x00001003, | ||
81 | /* 0040 */ 0x0001a730,0x00001008,0x000e2730,0x00001002, | ||
82 | /* 0042 */ 0x0000a731,0x00001002,0x0000a731,0x00001002, | ||
83 | /* 0044 */ 0x0000a731,0x00001002,0x0000a731,0x00001002, | ||
84 | /* 0046 */ 0x0000a731,0x00001002,0x0000a731,0x00001002, | ||
85 | /* 0048 */ 0x00000000,0x00000000,0x000f619c,0x00001003, | ||
86 | /* 004A */ 0x0007f801,0x000c0000,0x00000037,0x00001000, | ||
87 | /* 004C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
88 | /* 004E */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
89 | /* 0050 */ 0x00000000,0x000c0000,0x00000000,0x00000000, | ||
90 | /* 0052 */ 0x0000373c,0x00001000,0x00000000,0x00000000, | ||
91 | /* 0054 */ 0x000ee19c,0x00001003,0x0007f801,0x000c0000, | ||
92 | /* 0056 */ 0x00000037,0x00001000,0x00000000,0x00000000, | ||
93 | /* 0058 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
94 | /* 005A */ 0x00000000,0x00000000,0x0000273c,0x00001000, | ||
95 | /* 005C */ 0x00000033,0x00001000,0x000e679e,0x00001003, | ||
96 | /* 005E */ 0x00007705,0x00001400,0x000ac71e,0x00001003, | ||
97 | /* 0060 */ 0x00087fc1,0x000c3be0,0x0007f801,0x000c0000, | ||
98 | /* 0062 */ 0x00000037,0x00001000,0x00000000,0x00000000, | ||
99 | /* 0064 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
100 | /* 0066 */ 0x00000000,0x00000000,0x0000a730,0x00001003, | ||
101 | /* 0068 */ 0x00000033,0x00001000,0x0007f801,0x000c0000, | ||
102 | /* 006A */ 0x00000037,0x00001000,0x00000000,0x00000000, | ||
103 | /* 006C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
104 | /* 006E */ 0x00000000,0x00000000,0x00000000,0x000c0000, | ||
105 | /* 0070 */ 0x00000032,0x00001000,0x0000273d,0x00001000, | ||
106 | /* 0072 */ 0x0004a730,0x00001003,0x00000f41,0x00097140, | ||
107 | /* 0074 */ 0x0000a841,0x0009b240,0x0000a0c1,0x0009f040, | ||
108 | /* 0076 */ 0x0001c641,0x00093540,0x0001cec1,0x0009b5c0, | ||
109 | /* 0078 */ 0x00000000,0x00000000,0x0001bf05,0x0003fc40, | ||
110 | /* 007A */ 0x00002725,0x000aa400,0x00013705,0x00093a00, | ||
111 | /* 007C */ 0x0000002e,0x0009d6c0,0x0002ef8a,0x00000000, | ||
112 | /* 007E */ 0x00040630,0x00001004,0x0004ef0a,0x000eb785, | ||
113 | /* 0080 */ 0x0003fc8a,0x00000000,0x00000000,0x000c70e0, | ||
114 | /* 0082 */ 0x0007d182,0x0002c640,0x00008630,0x00001004, | ||
115 | /* 0084 */ 0x000799b8,0x0002c6c0,0x00031705,0x00092240, | ||
116 | /* 0086 */ 0x00039f05,0x000932c0,0x0003520a,0x00000000, | ||
117 | /* 0088 */ 0x00070731,0x0000100b,0x00010705,0x000b20c0, | ||
118 | /* 008A */ 0x00000000,0x000eba44,0x00032108,0x000c60c4, | ||
119 | /* 008C */ 0x00065208,0x000c2917,0x000486b0,0x00001007, | ||
120 | /* 008E */ 0x00012f05,0x00036880,0x0002818e,0x000c0000, | ||
121 | /* 0090 */ 0x0004410a,0x00000000,0x00048630,0x00001007, | ||
122 | /* 0092 */ 0x00029705,0x000c0000,0x00000000,0x00000000, | ||
123 | /* 0094 */ 0x00003fc1,0x0003fc40,0x000037c1,0x00091b40, | ||
124 | /* 0096 */ 0x00003fc1,0x000911c0,0x000037c1,0x000957c0, | ||
125 | /* 0098 */ 0x00003fc1,0x000951c0,0x000037c1,0x00000000, | ||
126 | /* 009A */ 0x00003fc1,0x000991c0,0x000037c1,0x00000000, | ||
127 | /* 009C */ 0x00003fc1,0x0009d1c0,0x000037c1,0x00000000, | ||
128 | /* 009E */ 0x0001ccc1,0x000915c0,0x0001c441,0x0009d800, | ||
129 | /* 00A0 */ 0x0009cdc1,0x00091240,0x0001c541,0x00091d00, | ||
130 | /* 00A2 */ 0x0009cfc1,0x00095240,0x0001c741,0x00095c80, | ||
131 | /* 00A4 */ 0x000e8ca9,0x00099240,0x000e85ad,0x00095640, | ||
132 | /* 00A6 */ 0x00069ca9,0x00099d80,0x000e952d,0x00099640, | ||
133 | /* 00A8 */ 0x000eaca9,0x0009d6c0,0x000ea5ad,0x00091a40, | ||
134 | /* 00AA */ 0x0006bca9,0x0009de80,0x000eb52d,0x00095a40, | ||
135 | /* 00AC */ 0x000ecca9,0x00099ac0,0x000ec5ad,0x0009da40, | ||
136 | /* 00AE */ 0x000edca9,0x0009d300,0x000a6e0a,0x00001000, | ||
137 | /* 00B0 */ 0x000ed52d,0x00091e40,0x000eeca9,0x00095ec0, | ||
138 | /* 00B2 */ 0x000ee5ad,0x00099e40,0x0006fca9,0x00002500, | ||
139 | /* 00B4 */ 0x000fb208,0x000c59a0,0x000ef52d,0x0009de40, | ||
140 | /* 00B6 */ 0x00068ca9,0x000912c1,0x000683ad,0x00095241, | ||
141 | /* 00B8 */ 0x00020f05,0x000991c1,0x00000000,0x00000000, | ||
142 | /* 00BA */ 0x00086f88,0x00001000,0x0009cf81,0x000b5340, | ||
143 | /* 00BC */ 0x0009c701,0x000b92c0,0x0009de81,0x000bd300, | ||
144 | /* 00BE */ 0x0009d601,0x000b1700,0x0001fd81,0x000b9d80, | ||
145 | /* 00C0 */ 0x0009f501,0x000b57c0,0x000a0f81,0x000bd740, | ||
146 | /* 00C2 */ 0x00020701,0x000b5c80,0x000a1681,0x000b97c0, | ||
147 | /* 00C4 */ 0x00021601,0x00002500,0x000a0701,0x000b9b40, | ||
148 | /* 00C6 */ 0x000a0f81,0x000b1bc0,0x00021681,0x00002d00, | ||
149 | /* 00C8 */ 0x00020f81,0x000bd800,0x000a0701,0x000b5bc0, | ||
150 | /* 00CA */ 0x00021601,0x00003500,0x000a0f81,0x000b5f40, | ||
151 | /* 00CC */ 0x000a0701,0x000bdbc0,0x00021681,0x00003d00, | ||
152 | /* 00CE */ 0x00020f81,0x000b1d00,0x000a0701,0x000b1fc0, | ||
153 | /* 00D0 */ 0x00021601,0x00020500,0x00020f81,0x000b1341, | ||
154 | /* 00D2 */ 0x000a0701,0x000b9fc0,0x00021681,0x00020d00, | ||
155 | /* 00D4 */ 0x00020f81,0x000bde80,0x000a0701,0x000bdfc0, | ||
156 | /* 00D6 */ 0x00021601,0x00021500,0x00020f81,0x000b9341, | ||
157 | /* 00D8 */ 0x00020701,0x000b53c1,0x00021681,0x00021d00, | ||
158 | /* 00DA */ 0x000a0f81,0x000d0380,0x0000b601,0x000b15c0, | ||
159 | /* 00DC */ 0x00007b01,0x00000000,0x00007b81,0x000bd1c0, | ||
160 | /* 00DE */ 0x00007b01,0x00000000,0x00007b81,0x000b91c0, | ||
161 | /* 00E0 */ 0x00007b01,0x000b57c0,0x00007b81,0x000b51c0, | ||
162 | /* 00E2 */ 0x00007b01,0x000b1b40,0x00007b81,0x000b11c0, | ||
163 | /* 00E4 */ 0x00087b01,0x000c3dc0,0x0007e488,0x000d7e45, | ||
164 | /* 00E6 */ 0x00000000,0x000d7a44,0x0007e48a,0x00000000, | ||
165 | /* 00E8 */ 0x00011f05,0x00084080,0x00000000,0x00000000, | ||
166 | /* 00EA */ 0x00001705,0x000b3540,0x00008a01,0x000bf040, | ||
167 | /* 00EC */ 0x00007081,0x000bb5c0,0x00055488,0x00000000, | ||
168 | /* 00EE */ 0x0000d482,0x0003fc40,0x0003fc88,0x00000000, | ||
169 | /* 00F0 */ 0x0001e401,0x000b3a00,0x0001ec81,0x000bd6c0, | ||
170 | /* 00F2 */ 0x0002ef88,0x000e7784,0x00056f08,0x00000000, | ||
171 | /* 00F4 */ 0x000d86b0,0x00001007,0x00008281,0x000bb240, | ||
172 | /* 00F6 */ 0x0000b801,0x000b7140,0x00007888,0x00000000, | ||
173 | /* 00F8 */ 0x0000073c,0x00001000,0x0007f188,0x000c0000, | ||
174 | /* 00FA */ 0x00000000,0x00000000,0x00055288,0x000c555c, | ||
175 | /* 00FC */ 0x0005528a,0x000c0000,0x0009fa88,0x000c5d00, | ||
176 | /* 00FE */ 0x0000fa88,0x00000000,0x00000032,0x00001000, | ||
177 | /* 0100 */ 0x0000073d,0x00001000,0x0007f188,0x000c0000, | ||
178 | /* 0102 */ 0x00000000,0x00000000,0x0008c01c,0x00001003, | ||
179 | /* 0104 */ 0x00002705,0x00001008,0x0008b201,0x000c1392, | ||
180 | /* 0106 */ 0x0000ba01,0x00000000, | ||
181 | /* TASKTREETHREAD */ | ||
182 | /* 0107 */ 0x00008731,0x00001400,0x0004c108,0x000fe0c4, | ||
183 | /* 0109 */ 0x00057488,0x00000000,0x000a6388,0x00001001, | ||
184 | /* 010B */ 0x0008b334,0x000bc141,0x0003020e,0x00000000, | ||
185 | /* 010D */ 0x000986b0,0x00001008,0x00003625,0x000c5dfa, | ||
186 | /* 010F */ 0x000a638a,0x00001001,0x0008020e,0x00001002, | ||
187 | /* 0111 */ 0x0009a6b0,0x00001008,0x0007f301,0x00000000, | ||
188 | /* 0113 */ 0x00000000,0x00000000,0x00002725,0x000a8c40, | ||
189 | /* 0115 */ 0x000000ae,0x00000000,0x000e8630,0x00001008, | ||
190 | /* 0117 */ 0x00000000,0x000c74e0,0x0007d182,0x0002d640, | ||
191 | /* 0119 */ 0x000b8630,0x00001008,0x000799b8,0x0002d6c0, | ||
192 | /* 011B */ 0x0000748a,0x000c3ec5,0x0007420a,0x000c0000, | ||
193 | /* 011D */ 0x00062208,0x000c4117,0x000a0630,0x00001009, | ||
194 | /* 011F */ 0x00000000,0x000c0000,0x0001022e,0x00000000, | ||
195 | /* 0121 */ 0x0006a630,0x00001009,0x00000032,0x00001000, | ||
196 | /* 0123 */ 0x000ca21c,0x00001003,0x00005a02,0x00000000, | ||
197 | /* 0125 */ 0x0001a630,0x00001009,0x00000000,0x000c0000, | ||
198 | /* 0127 */ 0x00000036,0x00001000,0x00000000,0x00000000, | ||
199 | /* 0129 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
200 | /* 012B */ 0x00000000,0x00000000,0x0003a730,0x00001008, | ||
201 | /* 012D */ 0x0007f801,0x000c0000,0x00000037,0x00001000, | ||
202 | /* 012F */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
203 | /* 0131 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
204 | /* 0133 */ 0x0003a730,0x00001008,0x00000033,0x00001000, | ||
205 | /* 0135 */ 0x0003a705,0x00001008,0x00007a01,0x000c0000, | ||
206 | /* 0137 */ 0x000e6288,0x000d550a,0x0006428a,0x00000000, | ||
207 | /* 0139 */ 0x00090730,0x0000100a,0x00000000,0x000c0000, | ||
208 | /* 013B */ 0x00000000,0x00000000, | ||
209 | /* TASKTREEHEADERCODE */ | ||
210 | /* 013C */ 0x0007aab0,0x00034880,0x000a8fb0,0x0000100b, | ||
211 | /* 013E */ 0x00057488,0x00000000,0x00033b94,0x00081140, | ||
212 | /* 0140 */ 0x000183ae,0x00000000,0x000a86b0,0x0000100b, | ||
213 | /* 0142 */ 0x00022f05,0x000c3545,0x0000eb8a,0x00000000, | ||
214 | /* 0144 */ 0x00042731,0x00001003, | ||
215 | /* FGTASKTREEHEADERCODE */ | ||
216 | /* 0145 */ 0x0007aab0,0x00034880,0x00078fb0,0x0000100a, | ||
217 | /* 0147 */ 0x00057488,0x00000000,0x00033b94,0x00081140, | ||
218 | /* 0149 */ 0x000183ae,0x00000000,0x000b06b0,0x0000100b, | ||
219 | /* 014B */ 0x00022f05,0x00000000,0x00007401,0x00091140, | ||
220 | /* 014D */ 0x00048f05,0x000951c0,0x00042731,0x00001003, | ||
221 | /* 014F */ 0x0000473d,0x00001000,0x000f19b0,0x000bbc47, | ||
222 | /* 0151 */ 0x00080000,0x000bffc7,0x000fe19e,0x00001003, | ||
223 | /* 0153 */ 0x00000000,0x00000000,0x0008e19c,0x00001003, | ||
224 | /* 0155 */ 0x000083c1,0x00093040,0x00000f41,0x00097140, | ||
225 | /* 0157 */ 0x0000a841,0x0009b240,0x0000a0c1,0x0009f040, | ||
226 | /* 0159 */ 0x0001c641,0x00093540,0x0001cec1,0x0009b5c0, | ||
227 | /* 015B */ 0x00000000,0x000fdc44,0x00055208,0x00000000, | ||
228 | /* 015D */ 0x00010705,0x000a2880,0x0000a23a,0x00093a00, | ||
229 | /* 015F */ 0x0003fc8a,0x000df6c5,0x0004ef0a,0x000c0000, | ||
230 | /* 0161 */ 0x00012f05,0x00036880,0x00065308,0x000c2997, | ||
231 | /* 0163 */ 0x000086b0,0x0000100b,0x0004410a,0x000d40c7, | ||
232 | /* 0165 */ 0x00000000,0x00000000,0x00088730,0x00001004, | ||
233 | /* 0167 */ 0x00056f0a,0x000ea105,0x00000000,0x00000000, | ||
234 | /* NULLALGORITHM */ | ||
235 | /* 0169 */ 0x0000473d,0x00001000,0x000f19b0,0x000bbc47, | ||
236 | /* 016B */ 0x00080000,0x000bffc7,0x0000273d,0x00001000, | ||
237 | /* HFGEXECCHILD */ | ||
238 | /* 016D */ 0x00000000,0x000eba44, | ||
239 | /* HFGEXECCHILD_98 */ | ||
240 | /* 016E */ 0x00048f05,0x0000f440,0x00007401,0x0000f7c0, | ||
241 | /* HFGEXECCHILD_PUSH1IND */ | ||
242 | /* 0170 */ 0x00000734,0x00001000,0x00010705,0x000a6880, | ||
243 | /* 0172 */ 0x00006a88,0x000c75c4, | ||
244 | /* HFGEXECSIBLING */ | ||
245 | /* 0173 */ 0x00000000,0x000e5084,0x00000000,0x000eba44, | ||
246 | /* HFGEXECSIBLING_298 */ | ||
247 | /* 0175 */ 0x00087401,0x000e4782, | ||
248 | /* HFGEXECSIBLING_2IND1 */ | ||
249 | /* 0176 */ 0x00000734,0x00001000,0x00010705,0x000a6880, | ||
250 | /* 0178 */ 0x00006a88,0x000c75c4, | ||
251 | /* S16_CODECOUTPUTTASK */ | ||
252 | /* 0179 */ 0x0007c108,0x000c0000,0x0007e721,0x000bed40, | ||
253 | /* 017B */ 0x00005f25,0x000badc0,0x0003ba97,0x000beb80, | ||
254 | /* 017D */ 0x00065590,0x000b2e00,0x00033217,0x00003ec0, | ||
255 | /* 017F */ 0x00065590,0x000b8e40,0x0003ed80,0x000491c0, | ||
256 | /* 0181 */ 0x00073fb0,0x00074c80,0x000583a0,0x0000100c, | ||
257 | /* 0183 */ 0x000ee388,0x00042970,0x00008301,0x00021ef2, | ||
258 | /* 0185 */ 0x000b8f14,0x0000000f,0x000c4d8d,0x0000001b, | ||
259 | /* 0187 */ 0x000d6dc2,0x000e06c6,0x000032ac,0x000c3916, | ||
260 | /* 0189 */ 0x0004edc2,0x00074c80,0x00078898,0x00001000, | ||
261 | /* 018B */ 0x00038894,0x00000032,0x000c4d8d,0x00092e1b, | ||
262 | /* 018D */ 0x000d6dc2,0x000e06c6,0x0004edc2,0x000c1956, | ||
263 | /* 018F */ 0x0000722c,0x00034a00,0x00041705,0x0009ed40, | ||
264 | /* 0191 */ 0x00058730,0x00001400,0x000d7488,0x000c3a00, | ||
265 | /* 0193 */ 0x00048f05,0x00000000 | ||
266 | }; | ||
267 | /* #CODE_END */ | ||
268 | |||
269 | static u32 cwc4630_parameter[] = { | ||
270 | /* 0000 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
271 | /* 0004 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
272 | /* 0008 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
273 | /* 000C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
274 | /* 0010 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
275 | /* 0014 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
276 | /* 0018 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
277 | /* 001C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
278 | /* 0020 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
279 | /* 0024 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
280 | /* 0028 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
281 | /* 002C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
282 | /* 0030 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
283 | /* 0034 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
284 | /* 0038 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
285 | /* 003C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
286 | /* 0040 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
287 | /* 0044 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
288 | /* 0048 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
289 | /* 004C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
290 | /* 0050 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
291 | /* 0054 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
292 | /* 0058 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
293 | /* 005C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
294 | /* 0060 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
295 | /* 0064 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
296 | /* 0068 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
297 | /* 006C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
298 | /* 0070 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
299 | /* 0074 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
300 | /* 0078 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
301 | /* 007C */ 0x00000000,0x00000000,0x00000000,0x00000000 | ||
302 | }; /* #PARAMETER_END */ | ||
303 | |||
304 | |||
305 | static segment_desc_t cwc4630_segments[] = { | ||
306 | { SEGTYPE_SP_PROGRAM, 0x00000000, 0x00000328, cwc4630_code }, | ||
307 | { SEGTYPE_SP_PARAMETER, 0x00000000, 0x00000080, cwc4630_parameter }, | ||
308 | }; | ||
309 | |||
310 | static dsp_module_desc_t cwc4630_module = { | ||
311 | "cwc4630", | ||
312 | { | ||
313 | 38, | ||
314 | cwc4630_symbols | ||
315 | }, | ||
316 | 2, | ||
317 | cwc4630_segments, | ||
318 | }; | ||
319 | |||
320 | #endif /* __HEADER_cwc4630_H__ */ | ||
diff --git a/sound/pci/cs46xx/imgs/cwcasync.h b/sound/pci/cs46xx/imgs/cwcasync.h new file mode 100644 index 000000000000..e01a7b66c4ff --- /dev/null +++ b/sound/pci/cs46xx/imgs/cwcasync.h | |||
@@ -0,0 +1,176 @@ | |||
1 | /* generated from cwcasync.osp DO NOT MODIFY */ | ||
2 | |||
3 | #ifndef __HEADER_cwcasync_H__ | ||
4 | #define __HEADER_cwcasync_H__ | ||
5 | |||
6 | static symbol_entry_t cwcasync_symbols[] = { | ||
7 | { 0x8000, "EXECCHILD",0x03 }, | ||
8 | { 0x8001, "EXECCHILD_98",0x03 }, | ||
9 | { 0x8003, "EXECCHILD_PUSH1IND",0x03 }, | ||
10 | { 0x8008, "EXECSIBLING",0x03 }, | ||
11 | { 0x800a, "EXECSIBLING_298",0x03 }, | ||
12 | { 0x800b, "EXECSIBLING_2IND1",0x03 }, | ||
13 | { 0x8010, "TIMINGMASTER",0x03 }, | ||
14 | { 0x804f, "S16_CODECINPUTTASK",0x03 }, | ||
15 | { 0x805e, "PCMSERIALINPUTTASK",0x03 }, | ||
16 | { 0x806d, "S16_MIX_TO_OSTREAM",0x03 }, | ||
17 | { 0x809a, "S16_MIX",0x03 }, | ||
18 | { 0x80bb, "S16_UPSRC",0x03 }, | ||
19 | { 0x813b, "MIX3_EXP",0x03 }, | ||
20 | { 0x8164, "DECIMATEBYPOW2",0x03 }, | ||
21 | { 0x8197, "VARIDECIMATE",0x03 }, | ||
22 | { 0x81f2, "_3DINPUTTASK",0x03 }, | ||
23 | { 0x820a, "_3DPRLGCINPTASK",0x03 }, | ||
24 | { 0x8227, "_3DSTEREOINPUTTASK",0x03 }, | ||
25 | { 0x8242, "_3DOUTPUTTASK",0x03 }, | ||
26 | { 0x82c4, "HRTF_MORPH_TASK",0x03 }, | ||
27 | { 0x82c6, "WAIT4DATA",0x03 }, | ||
28 | { 0x82fa, "PROLOGIC",0x03 }, | ||
29 | { 0x8496, "DECORRELATOR",0x03 }, | ||
30 | { 0x84a4, "STEREO2MONO",0x03 }, | ||
31 | { 0x0000, "OVERLAYBEGINADDRESS",0x00 }, | ||
32 | { 0x0000, "SPIOWRITE",0x03 }, | ||
33 | { 0x000d, "S16_ASYNCCODECINPUTTASK",0x03 }, | ||
34 | { 0x0043, "SPDIFITASK",0x03 }, | ||
35 | { 0x007b, "SPDIFOTASK",0x03 }, | ||
36 | { 0x0097, "ASYNCHFGTXCODE",0x03 }, | ||
37 | { 0x00be, "ASYNCHFGRXCODE",0x03 }, | ||
38 | { 0x00db, "#CODE_END",0x00 }, | ||
39 | }; /* cwcasync symbols */ | ||
40 | |||
41 | static u32 cwcasync_code[] = { | ||
42 | /* OVERLAYBEGINADDRESS */ | ||
43 | /* 0000 */ 0x00002731,0x00001400,0x00003725,0x000a8440, | ||
44 | /* 0002 */ 0x000000ae,0x00000000,0x00060630,0x00001000, | ||
45 | /* 0004 */ 0x00000000,0x000c7560,0x00075282,0x0002d640, | ||
46 | /* 0006 */ 0x00021705,0x00000000,0x00072ab8,0x0002d6c0, | ||
47 | /* 0008 */ 0x00020630,0x00001000,0x000c74c2,0x000d4b82, | ||
48 | /* 000A */ 0x000475c2,0x00000000,0x0003430a,0x000c0000, | ||
49 | /* 000C */ 0x00042730,0x00001400, | ||
50 | /* S16_ASYNCCODECINPUTTASK */ | ||
51 | /* 000D */ 0x0006a108,0x000cf2c4,0x0004f4c0,0x00000000, | ||
52 | /* 000F */ 0x000fa418,0x0000101f,0x0005d402,0x0001c500, | ||
53 | /* 0011 */ 0x000f0630,0x00001000,0x00004418,0x00001380, | ||
54 | /* 0013 */ 0x000e243d,0x000d394a,0x00049705,0x00000000, | ||
55 | /* 0015 */ 0x0007d530,0x000b4240,0x000e00f2,0x00001000, | ||
56 | /* 0017 */ 0x00009134,0x000ca20a,0x00004c90,0x00001000, | ||
57 | /* 0019 */ 0x0005d705,0x00000000,0x00004f25,0x00098240, | ||
58 | /* 001B */ 0x00004725,0x00000000,0x0000e48a,0x00000000, | ||
59 | /* 001D */ 0x00027295,0x0009c2c0,0x0003df25,0x00000000, | ||
60 | /* 001F */ 0x000e8030,0x00001001,0x0005f718,0x000ac600, | ||
61 | /* 0021 */ 0x0007cf30,0x000c2a01,0x00082630,0x00001001, | ||
62 | /* 0023 */ 0x000504a0,0x00001001,0x00029314,0x000bcb80, | ||
63 | /* 0025 */ 0x0003cf25,0x000b0e00,0x0004f5c0,0x00000000, | ||
64 | /* 0027 */ 0x00049118,0x000d888a,0x0007dd02,0x000c6efa, | ||
65 | /* 0029 */ 0x00000000,0x00000000,0x0004f5c0,0x00069c80, | ||
66 | /* 002B */ 0x0000d402,0x00000000,0x000e8630,0x00001001, | ||
67 | /* 002D */ 0x00079130,0x00000000,0x00049118,0x00090e00, | ||
68 | /* 002F */ 0x0006c10a,0x00000000,0x00000000,0x000c0000, | ||
69 | /* 0031 */ 0x0007cf30,0x00030580,0x00005725,0x00000000, | ||
70 | /* 0033 */ 0x000d84a0,0x00001001,0x00029314,0x000b4780, | ||
71 | /* 0035 */ 0x0003cf25,0x000b8600,0x00000000,0x00000000, | ||
72 | /* 0037 */ 0x00000000,0x000c0000,0x00000000,0x00042c80, | ||
73 | /* 0039 */ 0x0001dec1,0x000e488c,0x00031114,0x00000000, | ||
74 | /* 003B */ 0x0004f5c2,0x00000000,0x0003640a,0x00000000, | ||
75 | /* 003D */ 0x00000000,0x000e5084,0x00000000,0x000eb844, | ||
76 | /* 003F */ 0x00007001,0x00000000,0x00000734,0x00001000, | ||
77 | /* 0041 */ 0x00010705,0x000a6880,0x00006a88,0x000c75c4, | ||
78 | /* SPDIFITASK */ | ||
79 | /* 0043 */ 0x0006a108,0x000cf2c4,0x0004f4c0,0x000d5384, | ||
80 | /* 0045 */ 0x0007e48a,0x00000000,0x00067718,0x00001000, | ||
81 | /* 0047 */ 0x0007a418,0x00001000,0x0007221a,0x00000000, | ||
82 | /* 0049 */ 0x0005d402,0x00014500,0x000b8630,0x00001002, | ||
83 | /* 004B */ 0x00004418,0x00001780,0x000e243d,0x000d394a, | ||
84 | /* 004D */ 0x00049705,0x00000000,0x0007d530,0x000b4240, | ||
85 | /* 004F */ 0x000ac0f2,0x00001002,0x00014414,0x00000000, | ||
86 | /* 0051 */ 0x00004c90,0x00001000,0x0005d705,0x00000000, | ||
87 | /* 0053 */ 0x00004f25,0x00098240,0x00004725,0x00000000, | ||
88 | /* 0055 */ 0x0000e48a,0x00000000,0x00027295,0x0009c2c0, | ||
89 | /* 0057 */ 0x0007df25,0x00000000,0x000ac030,0x00001003, | ||
90 | /* 0059 */ 0x0005f718,0x000fe798,0x00029314,0x000bcb80, | ||
91 | /* 005B */ 0x00000930,0x000b0e00,0x0004f5c0,0x000de204, | ||
92 | /* 005D */ 0x000884a0,0x00001003,0x0007cf25,0x000e3560, | ||
93 | /* 005F */ 0x00049118,0x00000000,0x00049118,0x000d888a, | ||
94 | /* 0061 */ 0x0007dd02,0x000c6efa,0x0000c434,0x00030040, | ||
95 | /* 0063 */ 0x000fda82,0x000c2312,0x000fdc0e,0x00001001, | ||
96 | /* 0065 */ 0x00083402,0x000c2b92,0x000706b0,0x00001003, | ||
97 | /* 0067 */ 0x00075a82,0x00000000,0x0000d625,0x000b0940, | ||
98 | /* 0069 */ 0x0000840e,0x00001002,0x0000aabc,0x000c511e, | ||
99 | /* 006B */ 0x00078730,0x00001003,0x0000aaf4,0x000e910a, | ||
100 | /* 006D */ 0x0004628a,0x00000000,0x00006aca,0x00000000, | ||
101 | /* 006F */ 0x00000930,0x00000000,0x0004f5c0,0x00069c80, | ||
102 | /* 0071 */ 0x00046ac0,0x00000000,0x0003c40a,0x000fc898, | ||
103 | /* 0073 */ 0x00049118,0x00090e00,0x0006c10a,0x00000000, | ||
104 | /* 0075 */ 0x00000000,0x000e5084,0x00000000,0x000eb844, | ||
105 | /* 0077 */ 0x00007001,0x00000000,0x00000734,0x00001000, | ||
106 | /* 0079 */ 0x00010705,0x000a6880,0x00006a88,0x000c75c4, | ||
107 | /* SPDIFOTASK */ | ||
108 | /* 007B */ 0x0006a108,0x000c0000,0x0004f4c0,0x000c3245, | ||
109 | /* 007D */ 0x0000a418,0x00001000,0x0003a20a,0x00000000, | ||
110 | /* 007F */ 0x00004418,0x00001380,0x000e243d,0x000d394a, | ||
111 | /* 0081 */ 0x000c9705,0x000def92,0x0008c030,0x00001004, | ||
112 | /* 0083 */ 0x0005f718,0x000fe798,0x00000000,0x000c0000, | ||
113 | /* 0085 */ 0x00005725,0x00000000,0x000704a0,0x00001004, | ||
114 | /* 0087 */ 0x00029314,0x000b4780,0x0003cf25,0x000b8600, | ||
115 | /* 0089 */ 0x00000000,0x00000000,0x00000000,0x000c0000, | ||
116 | /* 008B */ 0x00000000,0x00042c80,0x0001dec1,0x000e488c, | ||
117 | /* 008D */ 0x00031114,0x00000000,0x0004f5c2,0x00000000, | ||
118 | /* 008F */ 0x0004a918,0x00098600,0x0006c28a,0x00000000, | ||
119 | /* 0091 */ 0x00000000,0x000e5084,0x00000000,0x000eb844, | ||
120 | /* 0093 */ 0x00007001,0x00000000,0x00000734,0x00001000, | ||
121 | /* 0095 */ 0x00010705,0x000a6880,0x00006a88,0x000c75c4, | ||
122 | /* ASYNCHFGTXCODE */ | ||
123 | /* 0097 */ 0x0002a880,0x000b4e40,0x00042214,0x000e5548, | ||
124 | /* 0099 */ 0x000542bf,0x00000000,0x00000000,0x000481c0, | ||
125 | /* 009B */ 0x00000000,0x00000000,0x00000000,0x00000030, | ||
126 | /* 009D */ 0x0000072d,0x000fbf8a,0x00077f94,0x000ea7df, | ||
127 | /* 009F */ 0x0002ac95,0x000d3145,0x00002731,0x00001400, | ||
128 | /* 00A1 */ 0x00006288,0x000c71c4,0x00014108,0x000e6044, | ||
129 | /* 00A3 */ 0x00035408,0x00000000,0x00025418,0x000a0ec0, | ||
130 | /* 00A5 */ 0x0001443d,0x000ca21e,0x00046595,0x000d730c, | ||
131 | /* 00A7 */ 0x0006538e,0x00000000,0x00064630,0x00001005, | ||
132 | /* 00A9 */ 0x000e7b0e,0x000df782,0x000746b0,0x00001005, | ||
133 | /* 00AB */ 0x00036f05,0x000c0000,0x00043695,0x000d598c, | ||
134 | /* 00AD */ 0x0005331a,0x000f2185,0x00000000,0x00000000, | ||
135 | /* 00AF */ 0x000007ae,0x000bdb00,0x00040630,0x00001400, | ||
136 | /* 00B1 */ 0x0005e708,0x000c0000,0x0007ef30,0x000b1c00, | ||
137 | /* 00B3 */ 0x000d86a0,0x00001005,0x00066408,0x000c0000, | ||
138 | /* 00B5 */ 0x00000000,0x00000000,0x00021843,0x00000000, | ||
139 | /* 00B7 */ 0x00000cac,0x00062c00,0x00001dac,0x00063400, | ||
140 | /* 00B9 */ 0x00002cac,0x0006cc80,0x000db943,0x000e5ca1, | ||
141 | /* 00BB */ 0x00000000,0x00000000,0x0006680a,0x000f3205, | ||
142 | /* 00BD */ 0x00042730,0x00001400, | ||
143 | /* ASYNCHFGRXCODE */ | ||
144 | /* 00BE */ 0x00014108,0x000f2204,0x00025418,0x000a2ec0, | ||
145 | /* 00C0 */ 0x00015dbd,0x00038100,0x00015dbc,0x00000000, | ||
146 | /* 00C2 */ 0x0005e415,0x00034880,0x0001258a,0x000d730c, | ||
147 | /* 00C4 */ 0x0006538e,0x000baa40,0x00060630,0x00001006, | ||
148 | /* 00C6 */ 0x00067b0e,0x000ac380,0x0003ef05,0x00000000, | ||
149 | /* 00C8 */ 0x0000f734,0x0001c300,0x000586b0,0x00001400, | ||
150 | /* 00CA */ 0x000b6f05,0x000c3a00,0x00048f05,0x00000000, | ||
151 | /* 00CC */ 0x0005b695,0x0008c380,0x0002058e,0x00000000, | ||
152 | /* 00CE */ 0x000500b0,0x00001400,0x0002b318,0x000e998d, | ||
153 | /* 00D0 */ 0x0006430a,0x00000000,0x00000000,0x000ef384, | ||
154 | /* 00D2 */ 0x00004725,0x000c0000,0x00000000,0x000f3204, | ||
155 | /* 00D4 */ 0x00004f25,0x000c0000,0x00080000,0x000e5ca1, | ||
156 | /* 00D6 */ 0x000cb943,0x000e5ca1,0x0004b943,0x00000000, | ||
157 | /* 00D8 */ 0x00040730,0x00001400,0x000cb943,0x000e5ca1, | ||
158 | /* 00DA */ 0x0004b943,0x00000000 | ||
159 | }; | ||
160 | /* #CODE_END */ | ||
161 | |||
162 | static segment_desc_t cwcasync_segments[] = { | ||
163 | { SEGTYPE_SP_PROGRAM, 0x00000000, 0x000001b6, cwcasync_code }, | ||
164 | }; | ||
165 | |||
166 | static dsp_module_desc_t cwcasync_module = { | ||
167 | "cwcasync", | ||
168 | { | ||
169 | 32, | ||
170 | cwcasync_symbols | ||
171 | }, | ||
172 | 1, | ||
173 | cwcasync_segments, | ||
174 | }; | ||
175 | |||
176 | #endif /* __HEADER_cwcasync_H__ */ | ||
diff --git a/sound/pci/cs46xx/imgs/cwcbinhack.h b/sound/pci/cs46xx/imgs/cwcbinhack.h new file mode 100644 index 000000000000..436b38bd246c --- /dev/null +++ b/sound/pci/cs46xx/imgs/cwcbinhack.h | |||
@@ -0,0 +1,48 @@ | |||
1 | /* generated by Benny | ||
2 | MODIFY ON YOUR OWN RISK */ | ||
3 | |||
4 | #ifndef __HEADER_cwcbinhack_H__ | ||
5 | #define __HEADER_cwcbinhack_H__ | ||
6 | |||
7 | static symbol_entry_t cwcbinhack_symbols[] = { | ||
8 | { 0x02c8, "OVERLAYBEGINADDRESS",0x00 }, | ||
9 | { 0x02c8, "MAGICSNOOPTASK",0x03 }, | ||
10 | { 0x0308, "#CODE_END",0x00 }, | ||
11 | }; /* cwcbinhack symbols */ | ||
12 | |||
13 | static u32 cwcbinhack_code[] = { | ||
14 | /* 0x02c8 */ | ||
15 | 0x0007bfb0,0x000bc240,0x00000c2e,0x000c6084, /* 1 */ | ||
16 | 0x000b8630,0x00001016,0x00006408,0x000efb84, /* 2 */ | ||
17 | 0x00016008,0x00000000,0x0001c088,0x000c0000, /* 3 */ | ||
18 | 0x000fc908,0x000e3392,0x0005f488,0x000efb84, /* 4 */ | ||
19 | 0x0001d402,0x000b2e00,0x0003d418,0x00001000, /* 5 */ | ||
20 | 0x0008d574,0x000c4293,0x00065625,0x000ea30e, /* 6 */ | ||
21 | 0x00096c01,0x000c6f92,0x0001a58a,0x000c6085, /* 7 */ | ||
22 | 0x00002f43,0x00000000,0x000e03a0,0x00001016, /* 8 */ | ||
23 | 0x0005e608,0x000c0000,0x00000000,0x00000000, /* 9 */ | ||
24 | 0x000ca108,0x000dcca1,0x00003bac,0x000c3205, /* 10 */ | ||
25 | 0x00073843,0x00000000,0x00010730,0x00001017, /* 11 */ | ||
26 | 0x0001600a,0x000c0000,0x00057488,0x00000000, /* 12 */ | ||
27 | 0x00000000,0x000e5084,0x00000000,0x000eba44, /* 13 */ | ||
28 | 0x00087401,0x000e4782,0x00000734,0x00001000, /* 14 */ | ||
29 | 0x00010705,0x000a6880,0x00006a88,0x000c75c4, /* 15 */ | ||
30 | 0x00000000,0x00000000,0x00000000,0x00000000, /* 16 */ | ||
31 | }; | ||
32 | /* #CODE_END */ | ||
33 | |||
34 | static segment_desc_t cwcbinhack_segments[] = { | ||
35 | { SEGTYPE_SP_PROGRAM, 0x00000000, 64, cwcbinhack_code }, | ||
36 | }; | ||
37 | |||
38 | static dsp_module_desc_t cwcbinhack_module = { | ||
39 | "cwcbinhack", | ||
40 | { | ||
41 | 3, | ||
42 | cwcbinhack_symbols | ||
43 | }, | ||
44 | 1, | ||
45 | cwcbinhack_segments, | ||
46 | }; | ||
47 | |||
48 | #endif /* __HEADER_cwcbinhack_H__ */ | ||
diff --git a/sound/pci/cs46xx/imgs/cwcdma.asp b/sound/pci/cs46xx/imgs/cwcdma.asp new file mode 100644 index 000000000000..09d24c76f034 --- /dev/null +++ b/sound/pci/cs46xx/imgs/cwcdma.asp | |||
@@ -0,0 +1,169 @@ | |||
1 | // | ||
2 | // Copyright(c) by Benny Sjostrand (benny@hostmobility.com) | ||
3 | // | ||
4 | // This program is free software; you can redistribute it and/or modify | ||
5 | // it under the terms of the GNU General Public License as published by | ||
6 | // the Free Software Foundation; either version 2 of the License, or | ||
7 | // (at your option) any later version. | ||
8 | // | ||
9 | // This program is distributed in the hope that it will be useful, | ||
10 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | // GNU General Public License for more details. | ||
13 | // | ||
14 | // You should have received a copy of the GNU General Public License | ||
15 | // along with this program; if not, write to the Free Software | ||
16 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
17 | // | ||
18 | |||
19 | |||
20 | // | ||
21 | // This code runs inside the DSP (cs4610, cs4612, cs4624, or cs4630), | ||
22 | // to compile it you need a tool named SPASM 3.0 and DSP code owned by | ||
23 | // Cirrus Logic(R). The SPASM program will generate a object file (cwcdma.osp), | ||
24 | // the "ospparser" tool will genereate the cwcdma.h file it's included from | ||
25 | // the cs46xx_lib.c file. | ||
26 | // | ||
27 | // | ||
28 | // The purpose of this code is very simple: make it possible to tranfser | ||
29 | // the samples 'as they are' with no alteration from a PCMreader SCB (DMA from host) | ||
30 | // to any other SCB. This is useful for AC3 throug SPDIF. SRC (source rate converters) | ||
31 | // task always alters the samples in some how, however it's from 48khz -> 48khz. The | ||
32 | // alterations are not audible, but AC3 wont work. | ||
33 | // | ||
34 | // ... | ||
35 | // | | ||
36 | // +---------------+ | ||
37 | // | AsynchFGTxSCB | | ||
38 | // +---------------+ | ||
39 | // | | ||
40 | // subListPtr | ||
41 | // | | ||
42 | // +--------------+ | ||
43 | // | DMAReader | | ||
44 | // +--------------+ | ||
45 | // | | ||
46 | // subListPtr | ||
47 | // | | ||
48 | // +-------------+ | ||
49 | // | PCMReader | | ||
50 | // +-------------+ | ||
51 | // (DMA from host) | ||
52 | // | ||
53 | |||
54 | struct dmaSCB | ||
55 | { | ||
56 | long dma_reserved1[3]; | ||
57 | |||
58 | short dma_reserved2:dma_outBufPtr; | ||
59 | |||
60 | short dma_unused1:dma_unused2; | ||
61 | |||
62 | long dma_reserved3[4]; | ||
63 | |||
64 | short dma_subListPtr:dma_nextSCB; | ||
65 | short dma_SPBptr:dma_entryPoint; | ||
66 | |||
67 | long dma_strmRsConfig; | ||
68 | long dma_strmBufPtr; | ||
69 | |||
70 | long dma_reserved4; | ||
71 | |||
72 | VolumeControl s2m_volume; | ||
73 | }; | ||
74 | |||
75 | #export DMAReader | ||
76 | void DMAReader() | ||
77 | { | ||
78 | execChild(); | ||
79 | r2 = r0->dma_subListPtr; | ||
80 | r1 = r0->nextSCB; | ||
81 | |||
82 | rsConfig01 = r2->strmRsConfig; | ||
83 | // Load rsConfig for input buffer | ||
84 | |||
85 | rsDMA01 = r2->basicReq.daw, , tb = Z(0 - rf); | ||
86 | // Load rsDMA in case input buffer is a DMA buffer Test to see if there is any data to transfer | ||
87 | |||
88 | if (tb) goto execSibling_2ind1 after { | ||
89 | r5 = rf + (-1); | ||
90 | r6 = r1->dma_entryPoint; // r6 = entry point of sibling task | ||
91 | r1 = r1->dma_SPBptr, // r1 = pointer to sibling task's SPB | ||
92 | , ind = r6; // Load entry point of sibling task | ||
93 | } | ||
94 | |||
95 | rsConfig23 = r0->dma_strmRsConfig; | ||
96 | // Load rsConfig for output buffer (never a DMA buffer) | ||
97 | |||
98 | r4 = r0->dma_outBufPtr; | ||
99 | |||
100 | rsa0 = r2->strmBufPtr; | ||
101 | // rsa0 = input buffer pointer | ||
102 | |||
103 | for (i = r5; i >= 0; --i) | ||
104 | after { | ||
105 | rsa2 = r4; | ||
106 | // rsa2 = output buffer pointer | ||
107 | |||
108 | nop; | ||
109 | nop; | ||
110 | } | ||
111 | //***************************** | ||
112 | // TODO: cycles to this point * | ||
113 | //***************************** | ||
114 | { | ||
115 | acc0 = (rsd0 = *rsa0++1); | ||
116 | // get sample | ||
117 | |||
118 | nop; // Those "nop"'s are really uggly, but there's | ||
119 | nop; // something with DSP's pipelines which I don't | ||
120 | nop; // understand, resulting this code to fail without | ||
121 | // having those "nop"'s (Benny) | ||
122 | |||
123 | rsa0?reqDMA = r2; | ||
124 | // Trigger DMA transfer on input stream, | ||
125 | // if needed to replenish input buffer | ||
126 | |||
127 | nop; | ||
128 | // Yet another magic "nop" to make stuff work | ||
129 | |||
130 | ,,r98 = acc0 $+>> 0; | ||
131 | // store sample in ALU | ||
132 | |||
133 | nop; | ||
134 | // latency on load register. | ||
135 | // (this one is understandable) | ||
136 | |||
137 | *rsa2++1 = r98; | ||
138 | // store sample in output buffer | ||
139 | |||
140 | nop; // The same story | ||
141 | nop; // as above again ... | ||
142 | nop; | ||
143 | } | ||
144 | // TODO: cycles per loop iteration | ||
145 | |||
146 | r2->strmBufPtr = rsa0,, ; | ||
147 | // Update the modified buffer pointers | ||
148 | |||
149 | r4 = rsa2; | ||
150 | // Load output pointer position into r4 | ||
151 | |||
152 | r2 = r0->nextSCB; | ||
153 | // Sibling task | ||
154 | |||
155 | goto execSibling_2ind1 // takes 6 cycles | ||
156 | after { | ||
157 | r98 = r2->thisSPB:entryPoint; | ||
158 | // Load child routine entry and data address | ||
159 | |||
160 | r1 = r9; | ||
161 | // r9 is r2->thisSPB | ||
162 | |||
163 | r0->dma_outBufPtr = r4,, | ||
164 | // Store updated output buffer pointer | ||
165 | |||
166 | ind = r8; | ||
167 | // r8 is r2->entryPoint | ||
168 | } | ||
169 | } | ||
diff --git a/sound/pci/cs46xx/imgs/cwcdma.h b/sound/pci/cs46xx/imgs/cwcdma.h new file mode 100644 index 000000000000..92860435beed --- /dev/null +++ b/sound/pci/cs46xx/imgs/cwcdma.h | |||
@@ -0,0 +1,68 @@ | |||
1 | /* generated from cwcdma.osp DO NOT MODIFY */ | ||
2 | |||
3 | #ifndef __HEADER_cwcdma_H__ | ||
4 | #define __HEADER_cwcdma_H__ | ||
5 | |||
6 | static symbol_entry_t cwcdma_symbols[] = { | ||
7 | { 0x8000, "EXECCHILD",0x03 }, | ||
8 | { 0x8001, "EXECCHILD_98",0x03 }, | ||
9 | { 0x8003, "EXECCHILD_PUSH1IND",0x03 }, | ||
10 | { 0x8008, "EXECSIBLING",0x03 }, | ||
11 | { 0x800a, "EXECSIBLING_298",0x03 }, | ||
12 | { 0x800b, "EXECSIBLING_2IND1",0x03 }, | ||
13 | { 0x8010, "TIMINGMASTER",0x03 }, | ||
14 | { 0x804f, "S16_CODECINPUTTASK",0x03 }, | ||
15 | { 0x805e, "PCMSERIALINPUTTASK",0x03 }, | ||
16 | { 0x806d, "S16_MIX_TO_OSTREAM",0x03 }, | ||
17 | { 0x809a, "S16_MIX",0x03 }, | ||
18 | { 0x80bb, "S16_UPSRC",0x03 }, | ||
19 | { 0x813b, "MIX3_EXP",0x03 }, | ||
20 | { 0x8164, "DECIMATEBYPOW2",0x03 }, | ||
21 | { 0x8197, "VARIDECIMATE",0x03 }, | ||
22 | { 0x81f2, "_3DINPUTTASK",0x03 }, | ||
23 | { 0x820a, "_3DPRLGCINPTASK",0x03 }, | ||
24 | { 0x8227, "_3DSTEREOINPUTTASK",0x03 }, | ||
25 | { 0x8242, "_3DOUTPUTTASK",0x03 }, | ||
26 | { 0x82c4, "HRTF_MORPH_TASK",0x03 }, | ||
27 | { 0x82c6, "WAIT4DATA",0x03 }, | ||
28 | { 0x82fa, "PROLOGIC",0x03 }, | ||
29 | { 0x8496, "DECORRELATOR",0x03 }, | ||
30 | { 0x84a4, "STEREO2MONO",0x03 }, | ||
31 | { 0x0000, "OVERLAYBEGINADDRESS",0x00 }, | ||
32 | { 0x0000, "DMAREADER",0x03 }, | ||
33 | { 0x0018, "#CODE_END",0x00 }, | ||
34 | }; /* cwcdma symbols */ | ||
35 | |||
36 | static u32 cwcdma_code[] = { | ||
37 | /* OVERLAYBEGINADDRESS */ | ||
38 | /* 0000 */ 0x00002731,0x00001400,0x0004c108,0x000e5044, | ||
39 | /* 0002 */ 0x0005f608,0x00000000,0x000007ae,0x000be300, | ||
40 | /* 0004 */ 0x00058630,0x00001400,0x0007afb0,0x000e9584, | ||
41 | /* 0006 */ 0x00007301,0x000a9840,0x0005e708,0x000cd104, | ||
42 | /* 0008 */ 0x00067008,0x00000000,0x000902a0,0x00001000, | ||
43 | /* 000A */ 0x00012a01,0x000c0000,0x00000000,0x00000000, | ||
44 | /* 000C */ 0x00021843,0x000c0000,0x00000000,0x000c0000, | ||
45 | /* 000E */ 0x0000e101,0x000c0000,0x00000cac,0x00000000, | ||
46 | /* 0010 */ 0x00080000,0x000e5ca1,0x00000000,0x000c0000, | ||
47 | /* 0012 */ 0x00000000,0x00000000,0x00000000,0x00092c00, | ||
48 | /* 0014 */ 0x000122c1,0x000e5084,0x00058730,0x00001400, | ||
49 | /* 0016 */ 0x000d7488,0x000e4782,0x00007401,0x0001c100 | ||
50 | }; | ||
51 | |||
52 | /* #CODE_END */ | ||
53 | |||
54 | static segment_desc_t cwcdma_segments[] = { | ||
55 | { SEGTYPE_SP_PROGRAM, 0x00000000, 0x00000030, cwcdma_code }, | ||
56 | }; | ||
57 | |||
58 | static dsp_module_desc_t cwcdma_module = { | ||
59 | "cwcdma", | ||
60 | { | ||
61 | 27, | ||
62 | cwcdma_symbols | ||
63 | }, | ||
64 | 1, | ||
65 | cwcdma_segments, | ||
66 | }; | ||
67 | |||
68 | #endif /* __HEADER_cwcdma_H__ */ | ||
diff --git a/sound/pci/cs46xx/imgs/cwcemb80.h b/sound/pci/cs46xx/imgs/cwcemb80.h new file mode 100644 index 000000000000..4b13551eae41 --- /dev/null +++ b/sound/pci/cs46xx/imgs/cwcemb80.h | |||
@@ -0,0 +1,1607 @@ | |||
1 | /* generated from cwcemb80.osp DO NOT MODIFY */ | ||
2 | |||
3 | #ifndef __HEADER_cwcemb80_H__ | ||
4 | #define __HEADER_cwcemb80_H__ | ||
5 | |||
6 | static symbol_entry_t cwcemb80_symbols[] = { | ||
7 | { 0x0000, "BEGINADDRESS",0x00 }, | ||
8 | { 0x8000, "EXECCHILD",0x03 }, | ||
9 | { 0x8001, "EXECCHILD_98",0x03 }, | ||
10 | { 0x8003, "EXECCHILD_PUSH1IND",0x03 }, | ||
11 | { 0x8008, "EXECSIBLING",0x03 }, | ||
12 | { 0x800a, "EXECSIBLING_298",0x03 }, | ||
13 | { 0x800b, "EXECSIBLING_2IND1",0x03 }, | ||
14 | { 0x8010, "TIMINGMASTER",0x03 }, | ||
15 | { 0x804f, "S16_CODECINPUTTASK",0x03 }, | ||
16 | { 0x805e, "PCMSERIALINPUTTASK",0x03 }, | ||
17 | { 0x806d, "S16_MIX_TO_OSTREAM",0x03 }, | ||
18 | { 0x809a, "S16_MIX",0x03 }, | ||
19 | { 0x80bb, "S16_UPSRC",0x03 }, | ||
20 | { 0x813b, "MIX3_EXP",0x03 }, | ||
21 | { 0x8164, "DECIMATEBYPOW2",0x03 }, | ||
22 | { 0x8197, "VARIDECIMATE",0x03 }, | ||
23 | { 0x81f2, "_3DINPUTTASK",0x03 }, | ||
24 | { 0x820a, "_3DPRLGCINPTASK",0x03 }, | ||
25 | { 0x8227, "_3DSTEREOINPUTTASK",0x03 }, | ||
26 | { 0x8242, "_3DOUTPUTTASK",0x03 }, | ||
27 | { 0x82c4, "HRTF_MORPH_TASK",0x03 }, | ||
28 | { 0x82c6, "WAIT4DATA",0x03 }, | ||
29 | { 0x82fa, "PROLOGIC",0x03 }, | ||
30 | { 0x8496, "DECORRELATOR",0x03 }, | ||
31 | { 0x84a4, "STEREO2MONO",0x03 }, | ||
32 | { 0x0070, "SPOSCB",0x02 }, | ||
33 | { 0x0105, "TASKTREETHREAD",0x03 }, | ||
34 | { 0x0136, "TASKTREEHEADERCODE",0x03 }, | ||
35 | { 0x013f, "FGTASKTREEHEADERCODE",0x03 }, | ||
36 | { 0x0163, "NULLALGORITHM",0x03 }, | ||
37 | { 0x0167, "HFGEXECCHILD",0x03 }, | ||
38 | { 0x0168, "HFGEXECCHILD_98",0x03 }, | ||
39 | { 0x016a, "HFGEXECCHILD_PUSH1IND",0x03 }, | ||
40 | { 0x016d, "HFGEXECSIBLING",0x03 }, | ||
41 | { 0x016f, "HFGEXECSIBLING_298",0x03 }, | ||
42 | { 0x0170, "HFGEXECSIBLING_2IND1",0x03 }, | ||
43 | { 0x0173, "S16_CODECOUTPUTTASK",0x03 }, | ||
44 | { 0x018e, "#CODE_END",0x00 }, | ||
45 | }; /* cwcemb80 symbols */ | ||
46 | |||
47 | static u32 cwcemb80_code[] = { | ||
48 | /* BEGINADDRESS */ | ||
49 | /* 0000 */ 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
50 | /* 0002 */ 0x00001705,0x00001400,0x000a411e,0x00001003, | ||
51 | /* 0004 */ 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
52 | /* 0006 */ 0x00009705,0x00001400,0x000a411e,0x00001003, | ||
53 | /* 0008 */ 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
54 | /* 000A */ 0x00011705,0x00001400,0x000a411e,0x00001003, | ||
55 | /* 000C */ 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
56 | /* 000E */ 0x00019705,0x00001400,0x000a411e,0x00001003, | ||
57 | /* 0010 */ 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
58 | /* 0012 */ 0x00021705,0x00001400,0x000a411e,0x00001003, | ||
59 | /* 0014 */ 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
60 | /* 0016 */ 0x00029705,0x00001400,0x000a411e,0x00001003, | ||
61 | /* 0018 */ 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
62 | /* 001A */ 0x00031705,0x00001400,0x000a411e,0x00001003, | ||
63 | /* 001C */ 0x00040730,0x00001002,0x000f619e,0x00001003, | ||
64 | /* 001E */ 0x00039705,0x00001400,0x000a411e,0x00001003, | ||
65 | /* 0020 */ 0x000fe19e,0x00001003,0x0009c730,0x00001003, | ||
66 | /* 0022 */ 0x0008e19c,0x00001003,0x000083c1,0x00093040, | ||
67 | /* 0024 */ 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
68 | /* 0026 */ 0x00009705,0x00001400,0x000a211e,0x00001003, | ||
69 | /* 0028 */ 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
70 | /* 002A */ 0x00011705,0x00001400,0x000a211e,0x00001003, | ||
71 | /* 002C */ 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
72 | /* 002E */ 0x00019705,0x00001400,0x000a211e,0x00001003, | ||
73 | /* 0030 */ 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
74 | /* 0032 */ 0x00021705,0x00001400,0x000a211e,0x00001003, | ||
75 | /* 0034 */ 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
76 | /* 0036 */ 0x00029705,0x00001400,0x000a211e,0x00001003, | ||
77 | /* 0038 */ 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
78 | /* 003A */ 0x00031705,0x00001400,0x000a211e,0x00001003, | ||
79 | /* 003C */ 0x00098730,0x00001002,0x000ee19e,0x00001003, | ||
80 | /* 003E */ 0x00039705,0x00001400,0x000a211e,0x00001003, | ||
81 | /* 0040 */ 0x0000a730,0x00001008,0x000e2730,0x00001002, | ||
82 | /* 0042 */ 0x0000a731,0x00001002,0x0000a731,0x00001002, | ||
83 | /* 0044 */ 0x0000a731,0x00001002,0x0000a731,0x00001002, | ||
84 | /* 0046 */ 0x0000a731,0x00001002,0x0000a731,0x00001002, | ||
85 | /* 0048 */ 0x00000000,0x00000000,0x000f619c,0x00001003, | ||
86 | /* 004A */ 0x0007f801,0x000c0000,0x00000037,0x00001000, | ||
87 | /* 004C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
88 | /* 004E */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
89 | /* 0050 */ 0x00000000,0x000c0000,0x00000000,0x00000000, | ||
90 | /* 0052 */ 0x0000373c,0x00001000,0x00000000,0x00000000, | ||
91 | /* 0054 */ 0x000ee19c,0x00001003,0x0007f801,0x000c0000, | ||
92 | /* 0056 */ 0x00000037,0x00001000,0x00000000,0x00000000, | ||
93 | /* 0058 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
94 | /* 005A */ 0x00000000,0x00000000,0x0000273c,0x00001000, | ||
95 | /* 005C */ 0x00000033,0x00001000,0x000e679e,0x00001003, | ||
96 | /* 005E */ 0x00007705,0x00001400,0x000ac71e,0x00001003, | ||
97 | /* 0060 */ 0x00087fc1,0x000c3be0,0x0007f801,0x000c0000, | ||
98 | /* 0062 */ 0x00000037,0x00001000,0x00000000,0x00000000, | ||
99 | /* 0064 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
100 | /* 0066 */ 0x00000000,0x00000000,0x0000a730,0x00001003, | ||
101 | /* 0068 */ 0x00000033,0x00001000,0x0007f801,0x000c0000, | ||
102 | /* 006A */ 0x00000037,0x00001000,0x00000000,0x00000000, | ||
103 | /* 006C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
104 | /* 006E */ 0x00000000,0x00000000,0x00000000,0x000c0000, | ||
105 | /* 0070 */ 0x00000032,0x00001000,0x0000273d,0x00001000, | ||
106 | /* 0072 */ 0x0004a730,0x00001003,0x00000f41,0x00097140, | ||
107 | /* 0074 */ 0x0000a841,0x0009b240,0x0000a0c1,0x0009f040, | ||
108 | /* 0076 */ 0x0001c641,0x00093540,0x0001cec1,0x0009b5c0, | ||
109 | /* 0078 */ 0x00000000,0x00000000,0x0001bf05,0x0003fc40, | ||
110 | /* 007A */ 0x00002725,0x000aa400,0x00013705,0x00093a00, | ||
111 | /* 007C */ 0x0000002e,0x0009d6c0,0x00038630,0x00001004, | ||
112 | /* 007E */ 0x0004ef0a,0x000eb785,0x0003fc8a,0x00000000, | ||
113 | /* 0080 */ 0x00000000,0x000c70e0,0x0007d182,0x0002c640, | ||
114 | /* 0082 */ 0x00000630,0x00001004,0x000799b8,0x0002c6c0, | ||
115 | /* 0084 */ 0x00031705,0x00092240,0x00039f05,0x000932c0, | ||
116 | /* 0086 */ 0x0003520a,0x00000000,0x00040731,0x0000100b, | ||
117 | /* 0088 */ 0x00010705,0x000b20c0,0x00000000,0x000eba44, | ||
118 | /* 008A */ 0x00032108,0x000c60c4,0x00065208,0x000c2917, | ||
119 | /* 008C */ 0x000406b0,0x00001007,0x00012f05,0x00036880, | ||
120 | /* 008E */ 0x0002818e,0x000c0000,0x0004410a,0x00000000, | ||
121 | /* 0090 */ 0x00040630,0x00001007,0x00029705,0x000c0000, | ||
122 | /* 0092 */ 0x00000000,0x00000000,0x00003fc1,0x0003fc40, | ||
123 | /* 0094 */ 0x000037c1,0x00091b40,0x00003fc1,0x000911c0, | ||
124 | /* 0096 */ 0x000037c1,0x000957c0,0x00003fc1,0x000951c0, | ||
125 | /* 0098 */ 0x000037c1,0x00000000,0x00003fc1,0x000991c0, | ||
126 | /* 009A */ 0x000037c1,0x00000000,0x00003fc1,0x0009d1c0, | ||
127 | /* 009C */ 0x000037c1,0x00000000,0x0001ccc1,0x000915c0, | ||
128 | /* 009E */ 0x0001c441,0x0009d800,0x0009cdc1,0x00091240, | ||
129 | /* 00A0 */ 0x0001c541,0x00091d00,0x0009cfc1,0x00095240, | ||
130 | /* 00A2 */ 0x0001c741,0x00095c80,0x000e8ca9,0x00099240, | ||
131 | /* 00A4 */ 0x000e85ad,0x00095640,0x00069ca9,0x00099d80, | ||
132 | /* 00A6 */ 0x000e952d,0x00099640,0x000eaca9,0x0009d6c0, | ||
133 | /* 00A8 */ 0x000ea5ad,0x00091a40,0x0006bca9,0x0009de80, | ||
134 | /* 00AA */ 0x000eb52d,0x00095a40,0x000ecca9,0x00099ac0, | ||
135 | /* 00AC */ 0x000ec5ad,0x0009da40,0x000edca9,0x0009d300, | ||
136 | /* 00AE */ 0x000a6e0a,0x00001000,0x000ed52d,0x00091e40, | ||
137 | /* 00B0 */ 0x000eeca9,0x00095ec0,0x000ee5ad,0x00099e40, | ||
138 | /* 00B2 */ 0x0006fca9,0x00002500,0x000fb208,0x000c59a0, | ||
139 | /* 00B4 */ 0x000ef52d,0x0009de40,0x00068ca9,0x000912c1, | ||
140 | /* 00B6 */ 0x000683ad,0x00095241,0x00020f05,0x000991c1, | ||
141 | /* 00B8 */ 0x00000000,0x00000000,0x00086f88,0x00001000, | ||
142 | /* 00BA */ 0x0009cf81,0x000b5340,0x0009c701,0x000b92c0, | ||
143 | /* 00BC */ 0x0009de81,0x000bd300,0x0009d601,0x000b1700, | ||
144 | /* 00BE */ 0x0001fd81,0x000b9d80,0x0009f501,0x000b57c0, | ||
145 | /* 00C0 */ 0x000a0f81,0x000bd740,0x00020701,0x000b5c80, | ||
146 | /* 00C2 */ 0x000a1681,0x000b97c0,0x00021601,0x00002500, | ||
147 | /* 00C4 */ 0x000a0701,0x000b9b40,0x000a0f81,0x000b1bc0, | ||
148 | /* 00C6 */ 0x00021681,0x00002d00,0x00020f81,0x000bd800, | ||
149 | /* 00C8 */ 0x000a0701,0x000b5bc0,0x00021601,0x00003500, | ||
150 | /* 00CA */ 0x000a0f81,0x000b5f40,0x000a0701,0x000bdbc0, | ||
151 | /* 00CC */ 0x00021681,0x00003d00,0x00020f81,0x000b1d00, | ||
152 | /* 00CE */ 0x000a0701,0x000b1fc0,0x00021601,0x00020500, | ||
153 | /* 00D0 */ 0x00020f81,0x000b1341,0x000a0701,0x000b9fc0, | ||
154 | /* 00D2 */ 0x00021681,0x00020d00,0x00020f81,0x000bde80, | ||
155 | /* 00D4 */ 0x000a0701,0x000bdfc0,0x00021601,0x00021500, | ||
156 | /* 00D6 */ 0x00020f81,0x000b9341,0x00020701,0x000b53c1, | ||
157 | /* 00D8 */ 0x00021681,0x00021d00,0x000a0f81,0x000d0380, | ||
158 | /* 00DA */ 0x0000b601,0x000b15c0,0x00007b01,0x00000000, | ||
159 | /* 00DC */ 0x00007b81,0x000bd1c0,0x00007b01,0x00000000, | ||
160 | /* 00DE */ 0x00007b81,0x000b91c0,0x00007b01,0x000b57c0, | ||
161 | /* 00E0 */ 0x00007b81,0x000b51c0,0x00007b01,0x000b1b40, | ||
162 | /* 00E2 */ 0x00007b81,0x000b11c0,0x00087b01,0x000c3dc0, | ||
163 | /* 00E4 */ 0x0007e488,0x000d7e45,0x00000000,0x000d7a44, | ||
164 | /* 00E6 */ 0x0007e48a,0x00000000,0x00011f05,0x00084080, | ||
165 | /* 00E8 */ 0x00000000,0x00000000,0x00001705,0x000b3540, | ||
166 | /* 00EA */ 0x00008a01,0x000bf040,0x00007081,0x000bb5c0, | ||
167 | /* 00EC */ 0x00055488,0x00000000,0x0000d482,0x0003fc40, | ||
168 | /* 00EE */ 0x0003fc88,0x00000000,0x0001e401,0x000b3a00, | ||
169 | /* 00F0 */ 0x0001ec81,0x000bd6c0,0x0004ef08,0x000eb784, | ||
170 | /* 00F2 */ 0x000c86b0,0x00001007,0x00008281,0x000bb240, | ||
171 | /* 00F4 */ 0x0000b801,0x000b7140,0x00007888,0x00000000, | ||
172 | /* 00F6 */ 0x0000073c,0x00001000,0x0007f188,0x000c0000, | ||
173 | /* 00F8 */ 0x00000000,0x00000000,0x00055288,0x000c555c, | ||
174 | /* 00FA */ 0x0005528a,0x000c0000,0x0009fa88,0x000c5d00, | ||
175 | /* 00FC */ 0x0000fa88,0x00000000,0x00000032,0x00001000, | ||
176 | /* 00FE */ 0x0000073d,0x00001000,0x0007f188,0x000c0000, | ||
177 | /* 0100 */ 0x00000000,0x00000000,0x0008c01c,0x00001003, | ||
178 | /* 0102 */ 0x00002705,0x00001008,0x0008b201,0x000c1392, | ||
179 | /* 0104 */ 0x0000ba01,0x00000000, | ||
180 | /* TASKTREETHREAD */ | ||
181 | /* 0105 */ 0x00008731,0x00001400,0x0004c108,0x000fe0c4, | ||
182 | /* 0107 */ 0x00057488,0x00000000,0x000a6388,0x00001001, | ||
183 | /* 0109 */ 0x0008b334,0x000bc141,0x0003020e,0x00000000, | ||
184 | /* 010B */ 0x000886b0,0x00001008,0x00003625,0x000c5dfa, | ||
185 | /* 010D */ 0x000a638a,0x00001001,0x0008020e,0x00001002, | ||
186 | /* 010F */ 0x0008a6b0,0x00001008,0x0007f301,0x00000000, | ||
187 | /* 0111 */ 0x00000000,0x00000000,0x00002725,0x000a8c40, | ||
188 | /* 0113 */ 0x000000ae,0x00000000,0x000d8630,0x00001008, | ||
189 | /* 0115 */ 0x00000000,0x000c74e0,0x0007d182,0x0002d640, | ||
190 | /* 0117 */ 0x000a8630,0x00001008,0x000799b8,0x0002d6c0, | ||
191 | /* 0119 */ 0x0000748a,0x000c3ec5,0x0007420a,0x000c0000, | ||
192 | /* 011B */ 0x00062208,0x000c4117,0x00070630,0x00001009, | ||
193 | /* 011D */ 0x00000000,0x000c0000,0x0001022e,0x00000000, | ||
194 | /* 011F */ 0x0003a630,0x00001009,0x00000000,0x000c0000, | ||
195 | /* 0121 */ 0x00000036,0x00001000,0x00000000,0x00000000, | ||
196 | /* 0123 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
197 | /* 0125 */ 0x00000000,0x00000000,0x0002a730,0x00001008, | ||
198 | /* 0127 */ 0x0007f801,0x000c0000,0x00000037,0x00001000, | ||
199 | /* 0129 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
200 | /* 012B */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
201 | /* 012D */ 0x0002a730,0x00001008,0x00000033,0x00001000, | ||
202 | /* 012F */ 0x0002a705,0x00001008,0x00007a01,0x000c0000, | ||
203 | /* 0131 */ 0x000e6288,0x000d550a,0x0006428a,0x00000000, | ||
204 | /* 0133 */ 0x00060730,0x0000100a,0x00000000,0x000c0000, | ||
205 | /* 0135 */ 0x00000000,0x00000000, | ||
206 | /* TASKTREEHEADERCODE */ | ||
207 | /* 0136 */ 0x0007aab0,0x00034880,0x00078fb0,0x0000100b, | ||
208 | /* 0138 */ 0x00057488,0x00000000,0x00033b94,0x00081140, | ||
209 | /* 013A */ 0x000183ae,0x00000000,0x000786b0,0x0000100b, | ||
210 | /* 013C */ 0x00022f05,0x000c3545,0x0000eb8a,0x00000000, | ||
211 | /* 013E */ 0x00042731,0x00001003, | ||
212 | /* FGTASKTREEHEADERCODE */ | ||
213 | /* 013F */ 0x0007aab0,0x00034880,0x00048fb0,0x0000100a, | ||
214 | /* 0141 */ 0x00057488,0x00000000,0x00033b94,0x00081140, | ||
215 | /* 0143 */ 0x000183ae,0x00000000,0x000806b0,0x0000100b, | ||
216 | /* 0145 */ 0x00022f05,0x00000000,0x00007401,0x00091140, | ||
217 | /* 0147 */ 0x00048f05,0x000951c0,0x00042731,0x00001003, | ||
218 | /* 0149 */ 0x0000473d,0x00001000,0x000f19b0,0x000bbc47, | ||
219 | /* 014B */ 0x00080000,0x000bffc7,0x000fe19e,0x00001003, | ||
220 | /* 014D */ 0x00000000,0x00000000,0x0008e19c,0x00001003, | ||
221 | /* 014F */ 0x000083c1,0x00093040,0x00000f41,0x00097140, | ||
222 | /* 0151 */ 0x0000a841,0x0009b240,0x0000a0c1,0x0009f040, | ||
223 | /* 0153 */ 0x0001c641,0x00093540,0x0001cec1,0x0009b5c0, | ||
224 | /* 0155 */ 0x00000000,0x000fdc44,0x00055208,0x00000000, | ||
225 | /* 0157 */ 0x00010705,0x000a2880,0x0000a23a,0x00093a00, | ||
226 | /* 0159 */ 0x0003fc8a,0x000df6c5,0x0004ef0a,0x000c0000, | ||
227 | /* 015B */ 0x00012f05,0x00036880,0x00065308,0x000c2997, | ||
228 | /* 015D */ 0x000d86b0,0x0000100a,0x0004410a,0x000d40c7, | ||
229 | /* 015F */ 0x00000000,0x00000000,0x00080730,0x00001004, | ||
230 | /* 0161 */ 0x00056f0a,0x000ea105,0x00000000,0x00000000, | ||
231 | /* NULLALGORITHM */ | ||
232 | /* 0163 */ 0x0000473d,0x00001000,0x000f19b0,0x000bbc47, | ||
233 | /* 0165 */ 0x00080000,0x000bffc7,0x0000273d,0x00001000, | ||
234 | /* HFGEXECCHILD */ | ||
235 | /* 0167 */ 0x00000000,0x000eba44, | ||
236 | /* HFGEXECCHILD_98 */ | ||
237 | /* 0168 */ 0x00048f05,0x0000f440,0x00007401,0x0000f7c0, | ||
238 | /* HFGEXECCHILD_PUSH1IND */ | ||
239 | /* 016A */ 0x00000734,0x00001000,0x00010705,0x000a6880, | ||
240 | /* 016C */ 0x00006a88,0x000c75c4, | ||
241 | /* HFGEXECSIBLING */ | ||
242 | /* 016D */ 0x00000000,0x000e5084,0x00000000,0x000eba44, | ||
243 | /* HFGEXECSIBLING_298 */ | ||
244 | /* 016F */ 0x00087401,0x000e4782, | ||
245 | /* HFGEXECSIBLING_2IND1 */ | ||
246 | /* 0170 */ 0x00000734,0x00001000,0x00010705,0x000a6880, | ||
247 | /* 0172 */ 0x00006a88,0x000c75c4, | ||
248 | /* S16_CODECOUTPUTTASK */ | ||
249 | /* 0173 */ 0x0007c108,0x000c0000,0x0007e721,0x000bed40, | ||
250 | /* 0175 */ 0x00005f25,0x000badc0,0x0003ba97,0x000beb80, | ||
251 | /* 0177 */ 0x00065590,0x000b2e00,0x00033217,0x00003ec0, | ||
252 | /* 0179 */ 0x00065590,0x000b8e40,0x0003ed80,0x000491c0, | ||
253 | /* 017B */ 0x00073fb0,0x00074c80,0x000283a0,0x0000100c, | ||
254 | /* 017D */ 0x000ee388,0x00042970,0x00008301,0x00021ef2, | ||
255 | /* 017F */ 0x000b8f14,0x0000000f,0x000c4d8d,0x0000001b, | ||
256 | /* 0181 */ 0x000d6dc2,0x000e06c6,0x000032ac,0x000c3916, | ||
257 | /* 0183 */ 0x0004edc2,0x00074c80,0x00078898,0x00001000, | ||
258 | /* 0185 */ 0x00038894,0x00000032,0x000c4d8d,0x00092e1b, | ||
259 | /* 0187 */ 0x000d6dc2,0x000e06c6,0x0004edc2,0x000c1956, | ||
260 | /* 0189 */ 0x0000722c,0x00034a00,0x00041705,0x0009ed40, | ||
261 | /* 018B */ 0x00058730,0x00001400,0x000d7488,0x000c3a00, | ||
262 | /* 018D */ 0x00048f05,0x00000000 | ||
263 | }; | ||
264 | /* #CODE_END */ | ||
265 | |||
266 | static u32 cwcemb80_parameter[] = { | ||
267 | /* 0000 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
268 | /* 0004 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
269 | /* 0008 */ 0x00000000,0x00000000,0x00000163,0x00000000, | ||
270 | /* 000C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
271 | /* 0010 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
272 | /* 0014 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
273 | /* 0018 */ 0x00000000,0x00200040,0x00008010,0x00000000, | ||
274 | /* 001C */ 0x00000000,0x80000001,0x00000001,0x00060000, | ||
275 | /* 0020 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
276 | /* 0024 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
277 | /* 0028 */ 0x00000000,0x00900080,0x00000173,0x00000000, | ||
278 | /* 002C */ 0x00000000,0x00000010,0x00800000,0x00900000, | ||
279 | /* 0030 */ 0xf2c0000f,0x00000200,0x00000000,0x00010600, | ||
280 | /* 0034 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
281 | /* 0038 */ 0x00000000,0x00000000,0x00000163,0x330300c2, | ||
282 | /* 003C */ 0x06000000,0x00000000,0x80008000,0x80008000, | ||
283 | /* 0040 */ 0x3fc0000f,0x00000301,0x00010400,0x00000000, | ||
284 | /* 0044 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
285 | /* 0048 */ 0x00000000,0x00b00000,0x00d0806d,0x330480c3, | ||
286 | /* 004C */ 0x04800000,0x00000001,0x00800001,0x0000ffff, | ||
287 | /* 0050 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
288 | /* 0054 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
289 | /* 0058 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
290 | /* 005C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
291 | /* 0060 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
292 | /* 0064 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
293 | /* 0068 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
294 | /* 006C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
295 | /* 0070 */ 0x066a0600,0x06350070,0x0000929d,0x929d929d, | ||
296 | /* 0074 */ 0x00000000,0x0000735a,0x00000600,0x00000000, | ||
297 | /* 0078 */ 0x929d735a,0x00000000,0x00010000,0x735a735a, | ||
298 | /* 007C */ 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
299 | /* 0080 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
300 | /* 0084 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
301 | /* 0088 */ 0x00000000,0x00000000,0x0000804f,0x000000c3, | ||
302 | /* 008C */ 0x05000000,0x00a00010,0x00000000,0x80008000, | ||
303 | /* 0090 */ 0x00000000,0x00000000,0x00000700,0x00000000, | ||
304 | /* 0094 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
305 | /* 0098 */ 0x00000080,0x00a00000,0x0000809a,0x000000c2, | ||
306 | /* 009C */ 0x07400000,0x00000000,0x80008000,0xffffffff, | ||
307 | /* 00A0 */ 0x00c80028,0x00005555,0x00000000,0x000107a0, | ||
308 | /* 00A4 */ 0x00c80028,0x000000c2,0x06800000,0x00000000, | ||
309 | /* 00A8 */ 0x06e00080,0x00300000,0x000080bb,0x000000c9, | ||
310 | /* 00AC */ 0x07a00000,0x04000000,0x80008000,0xffffffff, | ||
311 | /* 00B0 */ 0x00c80028,0x00005555,0x00000000,0x00000780, | ||
312 | /* 00B4 */ 0x00c80028,0x000000c5,0xff800000,0x00000000, | ||
313 | /* 00B8 */ 0x00640080,0x00c00000,0x00008197,0x000000c9, | ||
314 | /* 00BC */ 0x07800000,0x04000000,0x80008000,0xffffffff, | ||
315 | /* 00C0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
316 | /* 00C4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
317 | /* 00C8 */ 0x00000000,0x00000000,0x0000805e,0x000000c1, | ||
318 | /* 00CC */ 0x00000000,0x00800000,0x80008000,0x80008000, | ||
319 | /* 00D0 */ 0x00020000,0x0000ffff,0x00000000,0x00000000, | ||
320 | /* 00D4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
321 | /* 00D8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
322 | /* 00DC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
323 | /* 00E0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
324 | /* 00E4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
325 | /* 00E8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
326 | /* 00EC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
327 | /* 00F0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
328 | /* 00F4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
329 | /* 00F8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
330 | /* 00FC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
331 | /* 0100 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
332 | /* 0104 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
333 | /* 0108 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
334 | /* 010C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
335 | /* 0110 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
336 | /* 0114 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
337 | /* 0118 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
338 | /* 011C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
339 | /* 0120 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
340 | /* 0124 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
341 | /* 0128 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
342 | /* 012C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
343 | /* 0130 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
344 | /* 0134 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
345 | /* 0138 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
346 | /* 013C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
347 | /* 0140 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
348 | /* 0144 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
349 | /* 0148 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
350 | /* 014C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
351 | /* 0150 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
352 | /* 0154 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
353 | /* 0158 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
354 | /* 015C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
355 | /* 0160 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
356 | /* 0164 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
357 | /* 0168 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
358 | /* 016C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
359 | /* 0170 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
360 | /* 0174 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
361 | /* 0178 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
362 | /* 017C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
363 | /* 0180 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
364 | /* 0184 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
365 | /* 0188 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
366 | /* 018C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
367 | /* 0190 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
368 | /* 0194 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
369 | /* 0198 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
370 | /* 019C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
371 | /* 01A0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
372 | /* 01A4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
373 | /* 01A8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
374 | /* 01AC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
375 | /* 01B0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
376 | /* 01B4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
377 | /* 01B8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
378 | /* 01BC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
379 | /* 01C0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
380 | /* 01C4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
381 | /* 01C8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
382 | /* 01CC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
383 | /* 01D0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
384 | /* 01D4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
385 | /* 01D8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
386 | /* 01DC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
387 | /* 01E0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
388 | /* 01E4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
389 | /* 01E8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
390 | /* 01EC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
391 | /* 01F0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
392 | /* 01F4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
393 | /* 01F8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
394 | /* 01FC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
395 | /* 0200 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
396 | /* 0204 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
397 | /* 0208 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
398 | /* 020C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
399 | /* 0210 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
400 | /* 0214 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
401 | /* 0218 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
402 | /* 021C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
403 | /* 0220 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
404 | /* 0224 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
405 | /* 0228 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
406 | /* 022C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
407 | /* 0230 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
408 | /* 0234 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
409 | /* 0238 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
410 | /* 023C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
411 | /* 0240 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
412 | /* 0244 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
413 | /* 0248 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
414 | /* 024C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
415 | /* 0250 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
416 | /* 0254 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
417 | /* 0258 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
418 | /* 025C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
419 | /* 0260 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
420 | /* 0264 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
421 | /* 0268 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
422 | /* 026C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
423 | /* 0270 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
424 | /* 0274 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
425 | /* 0278 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
426 | /* 027C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
427 | /* 0280 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
428 | /* 0284 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
429 | /* 0288 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
430 | /* 028C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
431 | /* 0290 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
432 | /* 0294 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
433 | /* 0298 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
434 | /* 029C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
435 | /* 02A0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
436 | /* 02A4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
437 | /* 02A8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
438 | /* 02AC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
439 | /* 02B0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
440 | /* 02B4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
441 | /* 02B8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
442 | /* 02BC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
443 | /* 02C0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
444 | /* 02C4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
445 | /* 02C8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
446 | /* 02CC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
447 | /* 02D0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
448 | /* 02D4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
449 | /* 02D8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
450 | /* 02DC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
451 | /* 02E0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
452 | /* 02E4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
453 | /* 02E8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
454 | /* 02EC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
455 | /* 02F0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
456 | /* 02F4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
457 | /* 02F8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
458 | /* 02FC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
459 | /* 0300 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
460 | /* 0304 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
461 | /* 0308 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
462 | /* 030C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
463 | /* 0310 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
464 | /* 0314 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
465 | /* 0318 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
466 | /* 031C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
467 | /* 0320 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
468 | /* 0324 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
469 | /* 0328 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
470 | /* 032C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
471 | /* 0330 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
472 | /* 0334 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
473 | /* 0338 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
474 | /* 033C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
475 | /* 0340 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
476 | /* 0344 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
477 | /* 0348 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
478 | /* 034C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
479 | /* 0350 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
480 | /* 0354 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
481 | /* 0358 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
482 | /* 035C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
483 | /* 0360 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
484 | /* 0364 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
485 | /* 0368 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
486 | /* 036C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
487 | /* 0370 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
488 | /* 0374 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
489 | /* 0378 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
490 | /* 037C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
491 | /* 0380 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
492 | /* 0384 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
493 | /* 0388 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
494 | /* 038C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
495 | /* 0390 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
496 | /* 0394 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
497 | /* 0398 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
498 | /* 039C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
499 | /* 03A0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
500 | /* 03A4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
501 | /* 03A8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
502 | /* 03AC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
503 | /* 03B0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
504 | /* 03B4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
505 | /* 03B8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
506 | /* 03BC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
507 | /* 03C0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
508 | /* 03C4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
509 | /* 03C8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
510 | /* 03CC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
511 | /* 03D0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
512 | /* 03D4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
513 | /* 03D8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
514 | /* 03DC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
515 | /* 03E0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
516 | /* 03E4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
517 | /* 03E8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
518 | /* 03EC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
519 | /* 03F0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
520 | /* 03F4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
521 | /* 03F8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
522 | /* 03FC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
523 | /* 0400 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
524 | /* 0404 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
525 | /* 0408 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
526 | /* 040C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
527 | /* 0410 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
528 | /* 0414 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
529 | /* 0418 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
530 | /* 041C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
531 | /* 0420 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
532 | /* 0424 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
533 | /* 0428 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
534 | /* 042C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
535 | /* 0430 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
536 | /* 0434 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
537 | /* 0438 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
538 | /* 043C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
539 | /* 0440 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
540 | /* 0444 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
541 | /* 0448 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
542 | /* 044C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
543 | /* 0450 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
544 | /* 0454 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
545 | /* 0458 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
546 | /* 045C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
547 | /* 0460 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
548 | /* 0464 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
549 | /* 0468 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
550 | /* 046C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
551 | /* 0470 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
552 | /* 0474 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
553 | /* 0478 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
554 | /* 047C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
555 | /* 0480 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
556 | /* 0484 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
557 | /* 0488 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
558 | /* 048C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
559 | /* 0490 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
560 | /* 0494 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
561 | /* 0498 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
562 | /* 049C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
563 | /* 04A0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
564 | /* 04A4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
565 | /* 04A8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
566 | /* 04AC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
567 | /* 04B0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
568 | /* 04B4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
569 | /* 04B8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
570 | /* 04BC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
571 | /* 04C0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
572 | /* 04C4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
573 | /* 04C8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
574 | /* 04CC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
575 | /* 04D0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
576 | /* 04D4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
577 | /* 04D8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
578 | /* 04DC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
579 | /* 04E0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
580 | /* 04E4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
581 | /* 04E8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
582 | /* 04EC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
583 | /* 04F0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
584 | /* 04F4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
585 | /* 04F8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
586 | /* 04FC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
587 | /* 0500 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
588 | /* 0504 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
589 | /* 0508 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
590 | /* 050C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
591 | /* 0510 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
592 | /* 0514 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
593 | /* 0518 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
594 | /* 051C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
595 | /* 0520 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
596 | /* 0524 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
597 | /* 0528 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
598 | /* 052C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
599 | /* 0530 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
600 | /* 0534 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
601 | /* 0538 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
602 | /* 053C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
603 | /* 0540 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
604 | /* 0544 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
605 | /* 0548 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
606 | /* 054C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
607 | /* 0550 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
608 | /* 0554 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
609 | /* 0558 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
610 | /* 055C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
611 | /* 0560 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
612 | /* 0564 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
613 | /* 0568 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
614 | /* 056C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
615 | /* 0570 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
616 | /* 0574 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
617 | /* 0578 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
618 | /* 057C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
619 | /* 0580 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
620 | /* 0584 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
621 | /* 0588 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
622 | /* 058C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
623 | /* 0590 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
624 | /* 0594 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
625 | /* 0598 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
626 | /* 059C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
627 | /* 05A0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
628 | /* 05A4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
629 | /* 05A8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
630 | /* 05AC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
631 | /* 05B0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
632 | /* 05B4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
633 | /* 05B8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
634 | /* 05BC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
635 | /* 05C0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
636 | /* 05C4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
637 | /* 05C8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
638 | /* 05CC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
639 | /* 05D0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
640 | /* 05D4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
641 | /* 05D8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
642 | /* 05DC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
643 | /* 05E0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
644 | /* 05E4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
645 | /* 05E8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
646 | /* 05EC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
647 | /* 05F0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
648 | /* 05F4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
649 | /* 05F8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
650 | /* 05FC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
651 | /* 0600 */ 0x929d0600,0x929d929d,0x929d929d,0x929d0000, | ||
652 | /* 0604 */ 0x929d929d,0x929d929d,0x929d929d,0x929d929d, | ||
653 | /* 0608 */ 0x929d929d,0x00100635,0x060b013f,0x00000004, | ||
654 | /* 060C */ 0x00000001,0x007a0002,0x00000000,0x066e0610, | ||
655 | /* 0610 */ 0x0105929d,0x929d929d,0x929d929d,0x929d929d, | ||
656 | /* 0614 */ 0x929d929d,0xa431ac75,0x0001735a,0xa431ac75, | ||
657 | /* 0618 */ 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
658 | /* 061C */ 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
659 | /* 0620 */ 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
660 | /* 0624 */ 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
661 | /* 0628 */ 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
662 | /* 062C */ 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
663 | /* 0630 */ 0xa431ac75,0xa431ac75,0xa431ac75,0x735a0051, | ||
664 | /* 0634 */ 0x00000000,0x929d929d,0x929d929d,0x929d929d, | ||
665 | /* 0638 */ 0x929d929d,0x929d929d,0x929d929d,0x929d929d, | ||
666 | /* 063C */ 0x929d929d,0x929d929d,0x00000000,0x06400136, | ||
667 | /* 0640 */ 0x0000270f,0x00010000,0x007a0000,0x00000000, | ||
668 | /* 0644 */ 0x068e0645,0x0105929d,0x929d929d,0x929d929d, | ||
669 | /* 0648 */ 0x929d929d,0x929d929d,0xa431ac75,0x0001735a, | ||
670 | /* 064C */ 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
671 | /* 0650 */ 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
672 | /* 0654 */ 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
673 | /* 0658 */ 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
674 | /* 065C */ 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
675 | /* 0660 */ 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
676 | /* 0664 */ 0xa431ac75,0xa431ac75,0xa431ac75,0xa431ac75, | ||
677 | /* 0668 */ 0x735a0100,0x00000000,0x00000000,0x00000000, | ||
678 | /* 066C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
679 | /* 0670 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
680 | /* 0674 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
681 | /* 0678 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
682 | /* 067C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
683 | /* 0680 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
684 | /* 0684 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
685 | /* 0688 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
686 | /* 068C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
687 | /* 0690 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
688 | /* 0694 */ 0x00000000,0x00000000,0x00000000 | ||
689 | }; /* #PARAMETER_END */ | ||
690 | |||
691 | static u32 cwcemb80_sample[] = { | ||
692 | /* 0000 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
693 | /* 0004 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
694 | /* 0008 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
695 | /* 000C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
696 | /* 0010 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
697 | /* 0014 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
698 | /* 0018 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
699 | /* 001C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
700 | /* 0020 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
701 | /* 0024 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
702 | /* 0028 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
703 | /* 002C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
704 | /* 0030 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
705 | /* 0034 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
706 | /* 0038 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
707 | /* 003C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
708 | /* 0040 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
709 | /* 0044 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
710 | /* 0048 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
711 | /* 004C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
712 | /* 0050 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
713 | /* 0054 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
714 | /* 0058 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
715 | /* 005C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
716 | /* 0060 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
717 | /* 0064 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
718 | /* 0068 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
719 | /* 006C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
720 | /* 0070 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
721 | /* 0074 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
722 | /* 0078 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
723 | /* 007C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
724 | /* 0080 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
725 | /* 0084 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
726 | /* 0088 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
727 | /* 008C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
728 | /* 0090 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
729 | /* 0094 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
730 | /* 0098 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
731 | /* 009C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
732 | /* 00A0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
733 | /* 00A4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
734 | /* 00A8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
735 | /* 00AC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
736 | /* 00B0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
737 | /* 00B4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
738 | /* 00B8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
739 | /* 00BC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
740 | /* 00C0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
741 | /* 00C4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
742 | /* 00C8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
743 | /* 00CC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
744 | /* 00D0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
745 | /* 00D4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
746 | /* 00D8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
747 | /* 00DC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
748 | /* 00E0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
749 | /* 00E4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
750 | /* 00E8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
751 | /* 00EC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
752 | /* 00F0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
753 | /* 00F4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
754 | /* 00F8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
755 | /* 00FC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
756 | /* 0100 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
757 | /* 0104 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
758 | /* 0108 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
759 | /* 010C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
760 | /* 0110 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
761 | /* 0114 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
762 | /* 0118 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
763 | /* 011C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
764 | /* 0120 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
765 | /* 0124 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
766 | /* 0128 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
767 | /* 012C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
768 | /* 0130 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
769 | /* 0134 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
770 | /* 0138 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
771 | /* 013C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
772 | /* 0140 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
773 | /* 0144 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
774 | /* 0148 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
775 | /* 014C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
776 | /* 0150 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
777 | /* 0154 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
778 | /* 0158 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
779 | /* 015C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
780 | /* 0160 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
781 | /* 0164 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
782 | /* 0168 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
783 | /* 016C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
784 | /* 0170 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
785 | /* 0174 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
786 | /* 0178 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
787 | /* 017C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
788 | /* 0180 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
789 | /* 0184 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
790 | /* 0188 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
791 | /* 018C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
792 | /* 0190 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
793 | /* 0194 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
794 | /* 0198 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
795 | /* 019C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
796 | /* 01A0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
797 | /* 01A4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
798 | /* 01A8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
799 | /* 01AC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
800 | /* 01B0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
801 | /* 01B4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
802 | /* 01B8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
803 | /* 01BC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
804 | /* 01C0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
805 | /* 01C4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
806 | /* 01C8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
807 | /* 01CC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
808 | /* 01D0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
809 | /* 01D4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
810 | /* 01D8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
811 | /* 01DC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
812 | /* 01E0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
813 | /* 01E4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
814 | /* 01E8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
815 | /* 01EC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
816 | /* 01F0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
817 | /* 01F4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
818 | /* 01F8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
819 | /* 01FC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
820 | /* 0200 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
821 | /* 0204 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
822 | /* 0208 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
823 | /* 020C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
824 | /* 0210 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
825 | /* 0214 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
826 | /* 0218 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
827 | /* 021C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
828 | /* 0220 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
829 | /* 0224 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
830 | /* 0228 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
831 | /* 022C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
832 | /* 0230 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
833 | /* 0234 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
834 | /* 0238 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
835 | /* 023C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
836 | /* 0240 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
837 | /* 0244 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
838 | /* 0248 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
839 | /* 024C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
840 | /* 0250 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
841 | /* 0254 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
842 | /* 0258 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
843 | /* 025C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
844 | /* 0260 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
845 | /* 0264 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
846 | /* 0268 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
847 | /* 026C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
848 | /* 0270 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
849 | /* 0274 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
850 | /* 0278 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
851 | /* 027C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
852 | /* 0280 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
853 | /* 0284 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
854 | /* 0288 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
855 | /* 028C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
856 | /* 0290 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
857 | /* 0294 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
858 | /* 0298 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
859 | /* 029C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
860 | /* 02A0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
861 | /* 02A4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
862 | /* 02A8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
863 | /* 02AC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
864 | /* 02B0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
865 | /* 02B4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
866 | /* 02B8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
867 | /* 02BC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
868 | /* 02C0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
869 | /* 02C4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
870 | /* 02C8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
871 | /* 02CC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
872 | /* 02D0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
873 | /* 02D4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
874 | /* 02D8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
875 | /* 02DC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
876 | /* 02E0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
877 | /* 02E4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
878 | /* 02E8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
879 | /* 02EC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
880 | /* 02F0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
881 | /* 02F4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
882 | /* 02F8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
883 | /* 02FC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
884 | /* 0300 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
885 | /* 0304 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
886 | /* 0308 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
887 | /* 030C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
888 | /* 0310 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
889 | /* 0314 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
890 | /* 0318 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
891 | /* 031C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
892 | /* 0320 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
893 | /* 0324 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
894 | /* 0328 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
895 | /* 032C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
896 | /* 0330 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
897 | /* 0334 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
898 | /* 0338 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
899 | /* 033C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
900 | /* 0340 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
901 | /* 0344 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
902 | /* 0348 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
903 | /* 034C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
904 | /* 0350 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
905 | /* 0354 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
906 | /* 0358 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
907 | /* 035C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
908 | /* 0360 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
909 | /* 0364 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
910 | /* 0368 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
911 | /* 036C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
912 | /* 0370 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
913 | /* 0374 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
914 | /* 0378 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
915 | /* 037C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
916 | /* 0380 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
917 | /* 0384 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
918 | /* 0388 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
919 | /* 038C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
920 | /* 0390 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
921 | /* 0394 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
922 | /* 0398 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
923 | /* 039C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
924 | /* 03A0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
925 | /* 03A4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
926 | /* 03A8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
927 | /* 03AC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
928 | /* 03B0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
929 | /* 03B4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
930 | /* 03B8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
931 | /* 03BC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
932 | /* 03C0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
933 | /* 03C4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
934 | /* 03C8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
935 | /* 03CC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
936 | /* 03D0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
937 | /* 03D4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
938 | /* 03D8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
939 | /* 03DC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
940 | /* 03E0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
941 | /* 03E4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
942 | /* 03E8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
943 | /* 03EC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
944 | /* 03F0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
945 | /* 03F4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
946 | /* 03F8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
947 | /* 03FC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
948 | /* 0400 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
949 | /* 0404 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
950 | /* 0408 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
951 | /* 040C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
952 | /* 0410 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
953 | /* 0414 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
954 | /* 0418 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
955 | /* 041C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
956 | /* 0420 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
957 | /* 0424 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
958 | /* 0428 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
959 | /* 042C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
960 | /* 0430 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
961 | /* 0434 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
962 | /* 0438 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
963 | /* 043C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
964 | /* 0440 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
965 | /* 0444 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
966 | /* 0448 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
967 | /* 044C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
968 | /* 0450 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
969 | /* 0454 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
970 | /* 0458 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
971 | /* 045C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
972 | /* 0460 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
973 | /* 0464 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
974 | /* 0468 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
975 | /* 046C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
976 | /* 0470 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
977 | /* 0474 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
978 | /* 0478 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
979 | /* 047C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
980 | /* 0480 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
981 | /* 0484 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
982 | /* 0488 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
983 | /* 048C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
984 | /* 0490 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
985 | /* 0494 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
986 | /* 0498 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
987 | /* 049C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
988 | /* 04A0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
989 | /* 04A4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
990 | /* 04A8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
991 | /* 04AC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
992 | /* 04B0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
993 | /* 04B4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
994 | /* 04B8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
995 | /* 04BC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
996 | /* 04C0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
997 | /* 04C4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
998 | /* 04C8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
999 | /* 04CC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1000 | /* 04D0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1001 | /* 04D4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1002 | /* 04D8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1003 | /* 04DC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1004 | /* 04E0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1005 | /* 04E4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1006 | /* 04E8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1007 | /* 04EC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1008 | /* 04F0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1009 | /* 04F4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1010 | /* 04F8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1011 | /* 04FC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1012 | /* 0500 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1013 | /* 0504 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1014 | /* 0508 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1015 | /* 050C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1016 | /* 0510 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1017 | /* 0514 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1018 | /* 0518 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1019 | /* 051C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1020 | /* 0520 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1021 | /* 0524 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1022 | /* 0528 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1023 | /* 052C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1024 | /* 0530 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1025 | /* 0534 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1026 | /* 0538 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1027 | /* 053C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1028 | /* 0540 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1029 | /* 0544 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1030 | /* 0548 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1031 | /* 054C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1032 | /* 0550 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1033 | /* 0554 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1034 | /* 0558 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1035 | /* 055C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1036 | /* 0560 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1037 | /* 0564 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1038 | /* 0568 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1039 | /* 056C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1040 | /* 0570 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1041 | /* 0574 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1042 | /* 0578 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1043 | /* 057C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1044 | /* 0580 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1045 | /* 0584 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1046 | /* 0588 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1047 | /* 058C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1048 | /* 0590 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1049 | /* 0594 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1050 | /* 0598 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1051 | /* 059C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1052 | /* 05A0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1053 | /* 05A4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1054 | /* 05A8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1055 | /* 05AC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1056 | /* 05B0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1057 | /* 05B4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1058 | /* 05B8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1059 | /* 05BC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1060 | /* 05C0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1061 | /* 05C4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1062 | /* 05C8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1063 | /* 05CC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1064 | /* 05D0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1065 | /* 05D4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1066 | /* 05D8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1067 | /* 05DC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1068 | /* 05E0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1069 | /* 05E4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1070 | /* 05E8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1071 | /* 05EC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1072 | /* 05F0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1073 | /* 05F4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1074 | /* 05F8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1075 | /* 05FC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1076 | /* 0600 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1077 | /* 0604 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1078 | /* 0608 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1079 | /* 060C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1080 | /* 0610 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1081 | /* 0614 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1082 | /* 0618 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1083 | /* 061C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1084 | /* 0620 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1085 | /* 0624 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1086 | /* 0628 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1087 | /* 062C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1088 | /* 0630 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1089 | /* 0634 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1090 | /* 0638 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1091 | /* 063C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1092 | /* 0640 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1093 | /* 0644 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1094 | /* 0648 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1095 | /* 064C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1096 | /* 0650 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1097 | /* 0654 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1098 | /* 0658 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1099 | /* 065C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1100 | /* 0660 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1101 | /* 0664 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1102 | /* 0668 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1103 | /* 066C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1104 | /* 0670 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1105 | /* 0674 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1106 | /* 0678 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1107 | /* 067C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1108 | /* 0680 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1109 | /* 0684 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1110 | /* 0688 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1111 | /* 068C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1112 | /* 0690 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1113 | /* 0694 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1114 | /* 0698 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1115 | /* 069C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1116 | /* 06A0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1117 | /* 06A4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1118 | /* 06A8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1119 | /* 06AC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1120 | /* 06B0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1121 | /* 06B4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1122 | /* 06B8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1123 | /* 06BC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1124 | /* 06C0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1125 | /* 06C4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1126 | /* 06C8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1127 | /* 06CC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1128 | /* 06D0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1129 | /* 06D4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1130 | /* 06D8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1131 | /* 06DC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1132 | /* 06E0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1133 | /* 06E4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1134 | /* 06E8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1135 | /* 06EC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1136 | /* 06F0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1137 | /* 06F4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1138 | /* 06F8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1139 | /* 06FC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1140 | /* 0700 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1141 | /* 0704 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1142 | /* 0708 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1143 | /* 070C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1144 | /* 0710 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1145 | /* 0714 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1146 | /* 0718 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1147 | /* 071C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1148 | /* 0720 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1149 | /* 0724 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1150 | /* 0728 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1151 | /* 072C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1152 | /* 0730 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1153 | /* 0734 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1154 | /* 0738 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1155 | /* 073C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1156 | /* 0740 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1157 | /* 0744 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1158 | /* 0748 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1159 | /* 074C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1160 | /* 0750 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1161 | /* 0754 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1162 | /* 0758 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1163 | /* 075C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1164 | /* 0760 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1165 | /* 0764 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1166 | /* 0768 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1167 | /* 076C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1168 | /* 0770 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1169 | /* 0774 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1170 | /* 0778 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1171 | /* 077C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1172 | /* 0780 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1173 | /* 0784 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1174 | /* 0788 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1175 | /* 078C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1176 | /* 0790 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1177 | /* 0794 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1178 | /* 0798 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1179 | /* 079C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1180 | /* 07A0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1181 | /* 07A4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1182 | /* 07A8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1183 | /* 07AC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1184 | /* 07B0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1185 | /* 07B4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1186 | /* 07B8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1187 | /* 07BC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1188 | /* 07C0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1189 | /* 07C4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1190 | /* 07C8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1191 | /* 07CC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1192 | /* 07D0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1193 | /* 07D4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1194 | /* 07D8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1195 | /* 07DC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1196 | /* 07E0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1197 | /* 07E4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1198 | /* 07E8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1199 | /* 07EC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1200 | /* 07F0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1201 | /* 07F4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1202 | /* 07F8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1203 | /* 07FC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1204 | /* 0800 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1205 | /* 0804 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1206 | /* 0808 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1207 | /* 080C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1208 | /* 0810 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1209 | /* 0814 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1210 | /* 0818 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1211 | /* 081C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1212 | /* 0820 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1213 | /* 0824 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1214 | /* 0828 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1215 | /* 082C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1216 | /* 0830 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1217 | /* 0834 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1218 | /* 0838 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1219 | /* 083C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1220 | /* 0840 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1221 | /* 0844 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1222 | /* 0848 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1223 | /* 084C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1224 | /* 0850 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1225 | /* 0854 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1226 | /* 0858 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1227 | /* 085C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1228 | /* 0860 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1229 | /* 0864 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1230 | /* 0868 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1231 | /* 086C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1232 | /* 0870 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1233 | /* 0874 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1234 | /* 0878 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1235 | /* 087C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1236 | /* 0880 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1237 | /* 0884 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1238 | /* 0888 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1239 | /* 088C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1240 | /* 0890 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1241 | /* 0894 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1242 | /* 0898 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1243 | /* 089C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1244 | /* 08A0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1245 | /* 08A4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1246 | /* 08A8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1247 | /* 08AC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1248 | /* 08B0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1249 | /* 08B4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1250 | /* 08B8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1251 | /* 08BC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1252 | /* 08C0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1253 | /* 08C4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1254 | /* 08C8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1255 | /* 08CC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1256 | /* 08D0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1257 | /* 08D4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1258 | /* 08D8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1259 | /* 08DC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1260 | /* 08E0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1261 | /* 08E4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1262 | /* 08E8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1263 | /* 08EC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1264 | /* 08F0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1265 | /* 08F4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1266 | /* 08F8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1267 | /* 08FC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1268 | /* 0900 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1269 | /* 0904 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1270 | /* 0908 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1271 | /* 090C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1272 | /* 0910 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1273 | /* 0914 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1274 | /* 0918 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1275 | /* 091C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1276 | /* 0920 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1277 | /* 0924 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1278 | /* 0928 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1279 | /* 092C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1280 | /* 0930 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1281 | /* 0934 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1282 | /* 0938 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1283 | /* 093C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1284 | /* 0940 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1285 | /* 0944 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1286 | /* 0948 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1287 | /* 094C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1288 | /* 0950 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1289 | /* 0954 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1290 | /* 0958 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1291 | /* 095C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1292 | /* 0960 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1293 | /* 0964 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1294 | /* 0968 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1295 | /* 096C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1296 | /* 0970 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1297 | /* 0974 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1298 | /* 0978 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1299 | /* 097C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1300 | /* 0980 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1301 | /* 0984 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1302 | /* 0988 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1303 | /* 098C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1304 | /* 0990 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1305 | /* 0994 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1306 | /* 0998 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1307 | /* 099C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1308 | /* 09A0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1309 | /* 09A4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1310 | /* 09A8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1311 | /* 09AC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1312 | /* 09B0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1313 | /* 09B4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1314 | /* 09B8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1315 | /* 09BC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1316 | /* 09C0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1317 | /* 09C4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1318 | /* 09C8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1319 | /* 09CC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1320 | /* 09D0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1321 | /* 09D4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1322 | /* 09D8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1323 | /* 09DC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1324 | /* 09E0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1325 | /* 09E4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1326 | /* 09E8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1327 | /* 09EC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1328 | /* 09F0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1329 | /* 09F4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1330 | /* 09F8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1331 | /* 09FC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1332 | /* 0A00 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1333 | /* 0A04 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1334 | /* 0A08 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1335 | /* 0A0C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1336 | /* 0A10 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1337 | /* 0A14 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1338 | /* 0A18 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1339 | /* 0A1C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1340 | /* 0A20 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1341 | /* 0A24 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1342 | /* 0A28 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1343 | /* 0A2C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1344 | /* 0A30 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1345 | /* 0A34 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1346 | /* 0A38 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1347 | /* 0A3C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1348 | /* 0A40 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1349 | /* 0A44 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1350 | /* 0A48 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1351 | /* 0A4C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1352 | /* 0A50 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1353 | /* 0A54 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1354 | /* 0A58 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1355 | /* 0A5C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1356 | /* 0A60 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1357 | /* 0A64 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1358 | /* 0A68 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1359 | /* 0A6C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1360 | /* 0A70 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1361 | /* 0A74 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1362 | /* 0A78 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1363 | /* 0A7C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1364 | /* 0A80 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1365 | /* 0A84 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1366 | /* 0A88 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1367 | /* 0A8C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1368 | /* 0A90 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1369 | /* 0A94 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1370 | /* 0A98 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1371 | /* 0A9C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1372 | /* 0AA0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1373 | /* 0AA4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1374 | /* 0AA8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1375 | /* 0AAC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1376 | /* 0AB0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1377 | /* 0AB4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1378 | /* 0AB8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1379 | /* 0ABC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1380 | /* 0AC0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1381 | /* 0AC4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1382 | /* 0AC8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1383 | /* 0ACC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1384 | /* 0AD0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1385 | /* 0AD4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1386 | /* 0AD8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1387 | /* 0ADC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1388 | /* 0AE0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1389 | /* 0AE4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1390 | /* 0AE8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1391 | /* 0AEC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1392 | /* 0AF0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1393 | /* 0AF4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1394 | /* 0AF8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1395 | /* 0AFC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1396 | /* 0B00 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1397 | /* 0B04 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1398 | /* 0B08 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1399 | /* 0B0C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1400 | /* 0B10 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1401 | /* 0B14 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1402 | /* 0B18 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1403 | /* 0B1C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1404 | /* 0B20 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1405 | /* 0B24 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1406 | /* 0B28 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1407 | /* 0B2C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1408 | /* 0B30 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1409 | /* 0B34 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1410 | /* 0B38 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1411 | /* 0B3C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1412 | /* 0B40 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1413 | /* 0B44 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1414 | /* 0B48 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1415 | /* 0B4C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1416 | /* 0B50 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1417 | /* 0B54 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1418 | /* 0B58 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1419 | /* 0B5C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1420 | /* 0B60 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1421 | /* 0B64 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1422 | /* 0B68 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1423 | /* 0B6C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1424 | /* 0B70 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1425 | /* 0B74 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1426 | /* 0B78 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1427 | /* 0B7C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1428 | /* 0B80 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1429 | /* 0B84 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1430 | /* 0B88 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1431 | /* 0B8C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1432 | /* 0B90 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1433 | /* 0B94 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1434 | /* 0B98 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1435 | /* 0B9C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1436 | /* 0BA0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1437 | /* 0BA4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1438 | /* 0BA8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1439 | /* 0BAC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1440 | /* 0BB0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1441 | /* 0BB4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1442 | /* 0BB8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1443 | /* 0BBC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1444 | /* 0BC0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1445 | /* 0BC4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1446 | /* 0BC8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1447 | /* 0BCC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1448 | /* 0BD0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1449 | /* 0BD4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1450 | /* 0BD8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1451 | /* 0BDC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1452 | /* 0BE0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1453 | /* 0BE4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1454 | /* 0BE8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1455 | /* 0BEC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1456 | /* 0BF0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1457 | /* 0BF4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1458 | /* 0BF8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1459 | /* 0BFC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1460 | /* 0C00 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1461 | /* 0C04 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1462 | /* 0C08 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1463 | /* 0C0C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1464 | /* 0C10 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1465 | /* 0C14 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1466 | /* 0C18 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1467 | /* 0C1C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1468 | /* 0C20 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1469 | /* 0C24 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1470 | /* 0C28 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1471 | /* 0C2C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1472 | /* 0C30 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1473 | /* 0C34 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1474 | /* 0C38 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1475 | /* 0C3C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1476 | /* 0C40 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1477 | /* 0C44 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1478 | /* 0C48 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1479 | /* 0C4C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1480 | /* 0C50 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1481 | /* 0C54 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1482 | /* 0C58 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1483 | /* 0C5C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1484 | /* 0C60 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1485 | /* 0C64 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1486 | /* 0C68 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1487 | /* 0C6C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1488 | /* 0C70 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1489 | /* 0C74 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1490 | /* 0C78 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1491 | /* 0C7C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1492 | /* 0C80 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1493 | /* 0C84 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1494 | /* 0C88 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1495 | /* 0C8C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1496 | /* 0C90 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1497 | /* 0C94 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1498 | /* 0C98 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1499 | /* 0C9C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1500 | /* 0CA0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1501 | /* 0CA4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1502 | /* 0CA8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1503 | /* 0CAC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1504 | /* 0CB0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1505 | /* 0CB4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1506 | /* 0CB8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1507 | /* 0CBC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1508 | /* 0CC0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1509 | /* 0CC4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1510 | /* 0CC8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1511 | /* 0CCC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1512 | /* 0CD0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1513 | /* 0CD4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1514 | /* 0CD8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1515 | /* 0CDC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1516 | /* 0CE0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1517 | /* 0CE4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1518 | /* 0CE8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1519 | /* 0CEC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1520 | /* 0CF0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1521 | /* 0CF4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1522 | /* 0CF8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1523 | /* 0CFC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1524 | /* 0D00 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1525 | /* 0D04 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1526 | /* 0D08 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1527 | /* 0D0C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1528 | /* 0D10 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1529 | /* 0D14 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1530 | /* 0D18 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1531 | /* 0D1C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1532 | /* 0D20 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1533 | /* 0D24 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1534 | /* 0D28 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1535 | /* 0D2C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1536 | /* 0D30 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1537 | /* 0D34 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1538 | /* 0D38 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1539 | /* 0D3C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1540 | /* 0D40 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1541 | /* 0D44 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1542 | /* 0D48 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1543 | /* 0D4C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1544 | /* 0D50 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1545 | /* 0D54 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1546 | /* 0D58 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1547 | /* 0D5C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1548 | /* 0D60 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1549 | /* 0D64 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1550 | /* 0D68 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1551 | /* 0D6C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1552 | /* 0D70 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1553 | /* 0D74 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1554 | /* 0D78 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1555 | /* 0D7C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1556 | /* 0D80 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1557 | /* 0D84 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1558 | /* 0D88 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1559 | /* 0D8C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1560 | /* 0D90 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1561 | /* 0D94 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1562 | /* 0D98 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1563 | /* 0D9C */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1564 | /* 0DA0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1565 | /* 0DA4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1566 | /* 0DA8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1567 | /* 0DAC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1568 | /* 0DB0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1569 | /* 0DB4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1570 | /* 0DB8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1571 | /* 0DBC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1572 | /* 0DC0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1573 | /* 0DC4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1574 | /* 0DC8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1575 | /* 0DCC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1576 | /* 0DD0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1577 | /* 0DD4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1578 | /* 0DD8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1579 | /* 0DDC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1580 | /* 0DE0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1581 | /* 0DE4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1582 | /* 0DE8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1583 | /* 0DEC */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1584 | /* 0DF0 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1585 | /* 0DF4 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1586 | /* 0DF8 */ 0x00000000,0x00000000,0x00000000,0x00000000, | ||
1587 | /* 0DFC */ 0x00000000,0x00000000,0x00000000,0x00010004 | ||
1588 | }; /* #SAMPLE_END */ | ||
1589 | |||
1590 | |||
1591 | static segment_desc_t cwcemb80_segments[] = { | ||
1592 | { SEGTYPE_SP_PROGRAM, 0x00000000, 0x0000031c, cwcemb80_code }, | ||
1593 | { SEGTYPE_SP_PARAMETER, 0x00000000, 0x00000697, cwcemb80_parameter }, | ||
1594 | { SEGTYPE_SP_SAMPLE, 0x00000000, 0x00000e00, cwcemb80_sample }, | ||
1595 | }; | ||
1596 | |||
1597 | static dsp_module_desc_t cwcemb80_module = { | ||
1598 | "cwcemb80", | ||
1599 | { | ||
1600 | 38, | ||
1601 | cwcemb80_symbols | ||
1602 | }, | ||
1603 | 3, | ||
1604 | cwcemb80_segments, | ||
1605 | }; | ||
1606 | |||
1607 | #endif /* __HEADER_cwcemb80_H__ */ | ||
diff --git a/sound/pci/cs46xx/imgs/cwcsnoop.h b/sound/pci/cs46xx/imgs/cwcsnoop.h new file mode 100644 index 000000000000..be1162bbcb45 --- /dev/null +++ b/sound/pci/cs46xx/imgs/cwcsnoop.h | |||
@@ -0,0 +1,46 @@ | |||
1 | /* generated from cwcsnoop.osp DO NOT MODIFY */ | ||
2 | |||
3 | #ifndef __HEADER_cwcsnoop_H__ | ||
4 | #define __HEADER_cwcsnoop_H__ | ||
5 | |||
6 | static symbol_entry_t cwcsnoop_symbols[] = { | ||
7 | { 0x0500, "OVERLAYBEGINADDRESS",0x00 }, | ||
8 | { 0x0500, "OUTPUTSNOOP",0x03 }, | ||
9 | { 0x051f, "#CODE_END",0x00 }, | ||
10 | }; /* cwcsnoop symbols */ | ||
11 | |||
12 | static u32 cwcsnoop_code[] = { | ||
13 | /* 0000 */ 0x0007bfb0,0x000b4e40,0x0007c088,0x000c0617, | ||
14 | /* 0002 */ 0x00049705,0x00000000,0x00080630,0x00001028, | ||
15 | /* 0004 */ 0x00076408,0x000efb84,0x00066008,0x00000000, | ||
16 | /* 0006 */ 0x0007c908,0x000c0000,0x00046725,0x000efa44, | ||
17 | /* 0008 */ 0x0005f708,0x00000000,0x0001d402,0x000b2e00, | ||
18 | /* 000A */ 0x0003d418,0x00001000,0x0008d574,0x000c4293, | ||
19 | /* 000C */ 0x00065625,0x000ea30e,0x00096c01,0x000c6f92, | ||
20 | /* 000E */ 0x0006a58a,0x000f6085,0x00002f43,0x00000000, | ||
21 | /* 0010 */ 0x000a83a0,0x00001028,0x0005e608,0x000c0000, | ||
22 | /* 0012 */ 0x00000000,0x00000000,0x000ca108,0x000dcca1, | ||
23 | /* 0014 */ 0x00003bac,0x000fb205,0x00073843,0x00000000, | ||
24 | /* 0016 */ 0x000d8730,0x00001028,0x0006600a,0x000c0000, | ||
25 | /* 0018 */ 0x00057488,0x00000000,0x00000000,0x000e5084, | ||
26 | /* 001A */ 0x00000000,0x000eba44,0x00087401,0x000e4782, | ||
27 | /* 001C */ 0x00000734,0x00001000,0x00010705,0x000a6880, | ||
28 | /* 001E */ 0x00006a88,0x000c75c4 | ||
29 | }; | ||
30 | /* #CODE_END */ | ||
31 | |||
32 | static segment_desc_t cwcsnoop_segments[] = { | ||
33 | { SEGTYPE_SP_PROGRAM, 0x00000000, 0x0000003e, cwcsnoop_code }, | ||
34 | }; | ||
35 | |||
36 | static dsp_module_desc_t cwcsnoop_module = { | ||
37 | "cwcsnoop", | ||
38 | { | ||
39 | 3, | ||
40 | cwcsnoop_symbols | ||
41 | }, | ||
42 | 1, | ||
43 | cwcsnoop_segments, | ||
44 | }; | ||
45 | |||
46 | #endif /* __HEADER_cwcsnoop_H__ */ | ||