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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /sound/pci/cs46xx/cs46xx_lib.h
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'sound/pci/cs46xx/cs46xx_lib.h')
-rw-r--r--sound/pci/cs46xx/cs46xx_lib.h182
1 files changed, 182 insertions, 0 deletions
diff --git a/sound/pci/cs46xx/cs46xx_lib.h b/sound/pci/cs46xx/cs46xx_lib.h
new file mode 100644
index 000000000000..d7bec096d247
--- /dev/null
+++ b/sound/pci/cs46xx/cs46xx_lib.h
@@ -0,0 +1,182 @@
1/*
2 * The driver for the Cirrus Logic's Sound Fusion CS46XX based soundcards
3 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
4 *
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22#ifndef __CS46XX_LIB_H__
23#define __CS46XX_LIB_H__
24
25/*
26 * constants
27 */
28
29#define CS46XX_BA0_SIZE 0x1000
30#define CS46XX_BA1_DATA0_SIZE 0x3000
31#define CS46XX_BA1_DATA1_SIZE 0x3800
32#define CS46XX_BA1_PRG_SIZE 0x7000
33#define CS46XX_BA1_REG_SIZE 0x0100
34
35
36
37#ifdef CONFIG_SND_CS46XX_NEW_DSP
38#define CS46XX_MIN_PERIOD_SIZE 1
39#define CS46XX_MAX_PERIOD_SIZE 1024*1024
40#else
41#define CS46XX_MIN_PERIOD_SIZE 2048
42#define CS46XX_MAX_PERIOD_SIZE 2048
43#endif
44
45#define CS46XX_FRAGS 2
46/* #define CS46XX_BUFFER_SIZE CS46XX_MAX_PERIOD_SIZE * CS46XX_FRAGS */
47
48#define SCB_NO_PARENT 0
49#define SCB_ON_PARENT_NEXT_SCB 1
50#define SCB_ON_PARENT_SUBLIST_SCB 2
51
52/* 3*1024 parameter, 3.5*1024 sample, 2*3.5*1024 code */
53#define BA1_DWORD_SIZE (13 * 1024 + 512)
54#define BA1_MEMORY_COUNT 3
55
56/*
57 * common I/O routines
58 */
59
60static inline void snd_cs46xx_poke(cs46xx_t *chip, unsigned long reg, unsigned int val)
61{
62 unsigned int bank = reg >> 16;
63 unsigned int offset = reg & 0xffff;
64
65 /*if (bank == 0) printk("snd_cs46xx_poke: %04X - %08X\n",reg >> 2,val); */
66 writel(val, chip->region.idx[bank+1].remap_addr + offset);
67}
68
69static inline unsigned int snd_cs46xx_peek(cs46xx_t *chip, unsigned long reg)
70{
71 unsigned int bank = reg >> 16;
72 unsigned int offset = reg & 0xffff;
73 return readl(chip->region.idx[bank+1].remap_addr + offset);
74}
75
76static inline void snd_cs46xx_pokeBA0(cs46xx_t *chip, unsigned long offset, unsigned int val)
77{
78 writel(val, chip->region.name.ba0.remap_addr + offset);
79}
80
81static inline unsigned int snd_cs46xx_peekBA0(cs46xx_t *chip, unsigned long offset)
82{
83 return readl(chip->region.name.ba0.remap_addr + offset);
84}
85
86dsp_spos_instance_t * cs46xx_dsp_spos_create (cs46xx_t * chip);
87void cs46xx_dsp_spos_destroy (cs46xx_t * chip);
88int cs46xx_dsp_load_module (cs46xx_t * chip,dsp_module_desc_t * module);
89symbol_entry_t * cs46xx_dsp_lookup_symbol (cs46xx_t * chip,char * symbol_name,int symbol_type);
90int cs46xx_dsp_proc_init (snd_card_t * card, cs46xx_t *chip);
91int cs46xx_dsp_proc_done (cs46xx_t *chip);
92int cs46xx_dsp_scb_and_task_init (cs46xx_t *chip);
93int snd_cs46xx_download (cs46xx_t *chip,u32 *src,unsigned long offset,
94 unsigned long len);
95int snd_cs46xx_clear_BA1(cs46xx_t *chip,unsigned long offset,unsigned long len);
96int cs46xx_dsp_enable_spdif_out (cs46xx_t *chip);
97int cs46xx_dsp_enable_spdif_hw (cs46xx_t *chip);
98int cs46xx_dsp_disable_spdif_out (cs46xx_t *chip);
99int cs46xx_dsp_enable_spdif_in (cs46xx_t *chip);
100int cs46xx_dsp_disable_spdif_in (cs46xx_t *chip);
101int cs46xx_dsp_enable_pcm_capture (cs46xx_t *chip);
102int cs46xx_dsp_disable_pcm_capture (cs46xx_t *chip);
103int cs46xx_dsp_enable_adc_capture (cs46xx_t *chip);
104int cs46xx_dsp_disable_adc_capture (cs46xx_t *chip);
105int cs46xx_poke_via_dsp (cs46xx_t *chip,u32 address,u32 data);
106dsp_scb_descriptor_t * cs46xx_dsp_create_scb (cs46xx_t *chip,char * name, u32 * scb_data,u32 dest);
107void cs46xx_dsp_proc_free_scb_desc (dsp_scb_descriptor_t * scb);
108void cs46xx_dsp_proc_register_scb_desc (cs46xx_t *chip,dsp_scb_descriptor_t * scb);
109dsp_scb_descriptor_t * cs46xx_dsp_create_timing_master_scb (cs46xx_t *chip);
110dsp_scb_descriptor_t * cs46xx_dsp_create_codec_out_scb(cs46xx_t * chip,char * codec_name,
111 u16 channel_disp,u16 fifo_addr,
112 u16 child_scb_addr,
113 u32 dest,
114 dsp_scb_descriptor_t * parent_scb,
115 int scb_child_type);
116dsp_scb_descriptor_t * cs46xx_dsp_create_codec_in_scb(cs46xx_t * chip,char * codec_name,
117 u16 channel_disp,u16 fifo_addr,
118 u16 sample_buffer_addr,
119 u32 dest,
120 dsp_scb_descriptor_t * parent_scb,
121 int scb_child_type);
122void cs46xx_dsp_remove_scb (cs46xx_t *chip,dsp_scb_descriptor_t * scb);
123dsp_scb_descriptor_t * cs46xx_dsp_create_codec_in_scb(cs46xx_t * chip,char * codec_name,
124 u16 channel_disp,u16 fifo_addr,
125 u16 sample_buffer_addr,
126 u32 dest,dsp_scb_descriptor_t * parent_scb,
127 int scb_child_type);
128dsp_scb_descriptor_t * cs46xx_dsp_create_src_task_scb(cs46xx_t * chip,char * scb_name,
129 int sample_rate,
130 u16 src_buffer_addr,
131 u16 src_delay_buffer_addr,u32 dest,
132 dsp_scb_descriptor_t * parent_scb,
133 int scb_child_type,
134 int pass_through);
135dsp_scb_descriptor_t * cs46xx_dsp_create_mix_only_scb(cs46xx_t * chip,char * scb_name,
136 u16 mix_buffer_addr,u32 dest,
137 dsp_scb_descriptor_t * parent_scb,
138 int scb_child_type);
139
140dsp_scb_descriptor_t * cs46xx_dsp_create_vari_decimate_scb(cs46xx_t * chip,char * scb_name,
141 u16 vari_buffer_addr0,
142 u16 vari_buffer_addr1,
143 u32 dest,
144 dsp_scb_descriptor_t * parent_scb,
145 int scb_child_type);
146dsp_scb_descriptor_t * cs46xx_dsp_create_asynch_fg_rx_scb(cs46xx_t * chip,char * scb_name,u32 dest,
147 u16 hfg_scb_address,
148 u16 asynch_buffer_address,
149 dsp_scb_descriptor_t * parent_scb,
150 int scb_child_type);
151dsp_scb_descriptor_t * cs46xx_dsp_create_spio_write_scb(cs46xx_t * chip,char * scb_name,u32 dest,
152 dsp_scb_descriptor_t * parent_scb,
153 int scb_child_type);
154dsp_scb_descriptor_t * cs46xx_dsp_create_mix_to_ostream_scb(cs46xx_t * chip,char * scb_name,
155 u16 mix_buffer_addr,u16 writeback_spb,u32 dest,
156 dsp_scb_descriptor_t * parent_scb,
157 int scb_child_type);
158dsp_scb_descriptor_t * cs46xx_dsp_create_magic_snoop_scb(cs46xx_t * chip,char * scb_name,u32 dest,
159 u16 snoop_buffer_address,
160 dsp_scb_descriptor_t * snoop_scb,
161 dsp_scb_descriptor_t * parent_scb,
162 int scb_child_type);
163pcm_channel_descriptor_t * cs46xx_dsp_create_pcm_channel (cs46xx_t * chip,u32 sample_rate, void * private_data, u32 hw_dma_addr,
164 int pcm_channel_id);
165void cs46xx_dsp_destroy_pcm_channel (cs46xx_t * chip,
166 pcm_channel_descriptor_t * pcm_channel);
167int cs46xx_dsp_pcm_unlink (cs46xx_t * chip,pcm_channel_descriptor_t * pcm_channel);
168int cs46xx_dsp_pcm_link (cs46xx_t * chip,pcm_channel_descriptor_t * pcm_channel);
169dsp_scb_descriptor_t * cs46xx_add_record_source (cs46xx_t *chip,dsp_scb_descriptor_t * source,
170 u16 addr,char * scb_name);
171int cs46xx_src_unlink(cs46xx_t *chip,dsp_scb_descriptor_t * src);
172int cs46xx_src_link(cs46xx_t *chip,dsp_scb_descriptor_t * src);
173int cs46xx_iec958_pre_open (cs46xx_t *chip);
174int cs46xx_iec958_post_close (cs46xx_t *chip);
175int cs46xx_dsp_pcm_channel_set_period (cs46xx_t * chip,
176 pcm_channel_descriptor_t * pcm_channel,
177 int period_size);
178int cs46xx_dsp_pcm_ostream_set_period (cs46xx_t * chip,
179 int period_size);
180int cs46xx_dsp_set_dac_volume (cs46xx_t * chip,u16 left,u16 right);
181int cs46xx_dsp_set_iec958_volume (cs46xx_t * chip,u16 left,u16 right);
182#endif /* __CS46XX_LIB_H__ */
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