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authorAndreas Mohr <andi@lisas.de>2008-06-23 05:50:47 -0400
committerJaroslav Kysela <perex@perex.cz>2008-06-26 03:01:47 -0400
commit627d3e7abca30d6e86787c98dd7cbac0233bc5a9 (patch)
tree9837968886cda7893c827aaa9edfe3053d95139f /sound/pci/azt3328.h
parent981bcead3f2279a1ec6fb5f2c57aff79ed61a700 (diff)
ALSA: PCI168 snd-azt3328: some more fixups
- fix problem with codec register 0x6a being write-only by adding a software shadow register (caused annoying noise after module loading due to _toggling_ between gameport and audio bits instead of configuring them properly) - rename several "Wave" mixer controls to "PCM", since this is what Wine and several other apps are looking for (IOW, _requiring_) and this is what AC97 specs use as naming, too, thus I'd guess it's what these controls are - cleanup, small optimizations Signed-off-by: Andreas Mohr <andi@lisas.de> Signed-off-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Jaroslav Kysela <perex@perex.cz>
Diffstat (limited to 'sound/pci/azt3328.h')
-rw-r--r--sound/pci/azt3328.h16
1 files changed, 12 insertions, 4 deletions
diff --git a/sound/pci/azt3328.h b/sound/pci/azt3328.h
index 3448fd626f80..7e3e8942d073 100644
--- a/sound/pci/azt3328.h
+++ b/sound/pci/azt3328.h
@@ -1,7 +1,8 @@
1#ifndef __SOUND_AZT3328_H 1#ifndef __SOUND_AZT3328_H
2#define __SOUND_AZT3328_H 2#define __SOUND_AZT3328_H
3 3
4/* "PU" == "power-up value", as tested on PCI168 PCI rev. 10 */ 4/* "PU" == "power-up value", as tested on PCI168 PCI rev. 10
5 * "WRITE_ONLY" == register does not indicate actual bit values */
5 6
6/*** main I/O area port indices ***/ 7/*** main I/O area port indices ***/
7/* (only 0x70 of 0x80 bytes saved/restored by Windows driver) */ 8/* (only 0x70 of 0x80 bytes saved/restored by Windows driver) */
@@ -76,7 +77,7 @@
76 #define SOUNDFORMAT_FLAG_2CHANNELS 0x0020 77 #define SOUNDFORMAT_FLAG_2CHANNELS 0x0020
77 78
78/* define frequency helpers, for maximum value safety */ 79/* define frequency helpers, for maximum value safety */
79enum { 80enum azf_freq_t {
80#define AZF_FREQ(rate) AZF_FREQ_##rate = rate 81#define AZF_FREQ(rate) AZF_FREQ_##rate = rate
81 AZF_FREQ(4000), 82 AZF_FREQ(4000),
82 AZF_FREQ(4800), 83 AZF_FREQ(4800),
@@ -150,11 +151,18 @@ enum {
150 #define IO_68_RANDOM_TOGGLE1 0x0100 /* toggles randomly */ 151 #define IO_68_RANDOM_TOGGLE1 0x0100 /* toggles randomly */
151 #define IO_68_RANDOM_TOGGLE2 0x0200 /* toggles randomly */ 152 #define IO_68_RANDOM_TOGGLE2 0x0200 /* toggles randomly */
152 /* umm, nope, behaviour of these bits changes depending on what we wrote 153 /* umm, nope, behaviour of these bits changes depending on what we wrote
153 * to 0x6b!! */ 154 * to 0x6b!!
155 * And they change upon playback/stop, too:
156 * Writing a value to 0x68 will display this exact value during playback,
157 * too but when stopped it can fall back to a rather different
158 * seemingly random value). Hmm, possibly this is a register which
159 * has a remote shadow which needs proper device supply which only exists
160 * in case playback is active? Or is this driver-induced?
161 */
154 162
155/* this WORD can be set to have bits 0x0028 activated (FIXME: correct??); 163/* this WORD can be set to have bits 0x0028 activated (FIXME: correct??);
156 * actually inhibits PCM playback!!! maybe power management??: */ 164 * actually inhibits PCM playback!!! maybe power management??: */
157#define IDX_IO_6AH 0x6A 165#define IDX_IO_6AH 0x6A /* WRITE_ONLY! */
158 /* bit 5: enabling this will activate permanent counting of bytes 2/3 166 /* bit 5: enabling this will activate permanent counting of bytes 2/3
159 * at gameport I/O (0xb402/3) (equal values each) and cause 167 * at gameport I/O (0xb402/3) (equal values each) and cause
160 * gameport legacy I/O at 0x0200 to be _DISABLED_! 168 * gameport legacy I/O at 0x0200 to be _DISABLED_!