diff options
author | Krzysztof Helt <krzysztof.h1@wp.pl> | 2008-07-31 15:07:30 -0400 |
---|---|---|
committer | Jaroslav Kysela <perex@perex.cz> | 2008-08-06 09:39:53 -0400 |
commit | 811585e9d1769d6e282852fc0675735209547ca0 (patch) | |
tree | dfd0efde16dd437f3a6c41b74cb3322d917725a8 /sound/isa | |
parent | 0c5e3e98220e743f8ac095249b09ca8c87bd655b (diff) |
ALSA: wss_lib: use CS4231P instead of AD1848P (kill the AD1848P)
Use CS4231P instead of AD1848P (kill the AD1848P).
Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl>
Reviewed-by: Rene Herman <rene.herman@gmail.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Jaroslav Kysela <perex@perex.cz>
Diffstat (limited to 'sound/isa')
-rw-r--r-- | sound/isa/ad1848/ad1848_lib.c | 104 |
1 files changed, 55 insertions, 49 deletions
diff --git a/sound/isa/ad1848/ad1848_lib.c b/sound/isa/ad1848/ad1848_lib.c index 4f7aaf4e0989..07756fa36947 100644 --- a/sound/isa/ad1848/ad1848_lib.c +++ b/sound/isa/ad1848/ad1848_lib.c | |||
@@ -103,7 +103,7 @@ static void snd_ad1848_wait(struct snd_wss *chip) | |||
103 | int timeout; | 103 | int timeout; |
104 | 104 | ||
105 | for (timeout = 250; timeout > 0; timeout--) { | 105 | for (timeout = 250; timeout > 0; timeout--) { |
106 | if ((inb(AD1848P(chip, REGSEL)) & AD1848_INIT) == 0) | 106 | if ((inb(chip->port + CS4231P(REGSEL)) & AD1848_INIT) == 0) |
107 | break; | 107 | break; |
108 | udelay(100); | 108 | udelay(100); |
109 | } | 109 | } |
@@ -115,12 +115,12 @@ void snd_ad1848_out(struct snd_wss *chip, | |||
115 | { | 115 | { |
116 | snd_ad1848_wait(chip); | 116 | snd_ad1848_wait(chip); |
117 | #ifdef CONFIG_SND_DEBUG | 117 | #ifdef CONFIG_SND_DEBUG |
118 | if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT) | 118 | if (inb(chip->port + CS4231P(REGSEL)) & AD1848_INIT) |
119 | snd_printk(KERN_WARNING "auto calibration time out - " | 119 | snd_printk(KERN_WARNING "auto calibration time out - " |
120 | "reg = 0x%x, value = 0x%x\n", reg, value); | 120 | "reg = 0x%x, value = 0x%x\n", reg, value); |
121 | #endif | 121 | #endif |
122 | outb(chip->mce_bit | reg, AD1848P(chip, REGSEL)); | 122 | outb(chip->mce_bit | reg, chip->port + CS4231P(REGSEL)); |
123 | outb(chip->image[reg] = value, AD1848P(chip, REG)); | 123 | outb(chip->image[reg] = value, chip->port + CS4231P(REG)); |
124 | mb(); | 124 | mb(); |
125 | snd_printdd("codec out - reg 0x%x = 0x%x\n", | 125 | snd_printdd("codec out - reg 0x%x = 0x%x\n", |
126 | chip->mce_bit | reg, value); | 126 | chip->mce_bit | reg, value); |
@@ -132,8 +132,8 @@ static void snd_ad1848_dout(struct snd_wss *chip, | |||
132 | unsigned char reg, unsigned char value) | 132 | unsigned char reg, unsigned char value) |
133 | { | 133 | { |
134 | snd_ad1848_wait(chip); | 134 | snd_ad1848_wait(chip); |
135 | outb(chip->mce_bit | reg, AD1848P(chip, REGSEL)); | 135 | outb(chip->mce_bit | reg, chip->port + CS4231P(REGSEL)); |
136 | outb(value, AD1848P(chip, REG)); | 136 | outb(value, chip->port + CS4231P(REG)); |
137 | mb(); | 137 | mb(); |
138 | } | 138 | } |
139 | 139 | ||
@@ -141,37 +141,37 @@ static unsigned char snd_ad1848_in(struct snd_wss *chip, unsigned char reg) | |||
141 | { | 141 | { |
142 | snd_ad1848_wait(chip); | 142 | snd_ad1848_wait(chip); |
143 | #ifdef CONFIG_SND_DEBUG | 143 | #ifdef CONFIG_SND_DEBUG |
144 | if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT) | 144 | if (inb(chip->port + CS4231P(REGSEL)) & AD1848_INIT) |
145 | snd_printk(KERN_WARNING "auto calibration time out - " | 145 | snd_printk(KERN_WARNING "auto calibration time out - " |
146 | "reg = 0x%x\n", reg); | 146 | "reg = 0x%x\n", reg); |
147 | #endif | 147 | #endif |
148 | outb(chip->mce_bit | reg, AD1848P(chip, REGSEL)); | 148 | outb(chip->mce_bit | reg, chip->port + CS4231P(REGSEL)); |
149 | mb(); | 149 | mb(); |
150 | return inb(AD1848P(chip, REG)); | 150 | return inb(chip->port + CS4231P(REG)); |
151 | } | 151 | } |
152 | 152 | ||
153 | #if 0 | 153 | #if 0 |
154 | 154 | ||
155 | static void snd_ad1848_debug(struct snd_wss *chip) | 155 | static void snd_ad1848_debug(struct snd_wss *chip) |
156 | { | 156 | { |
157 | printk("AD1848 REGS: INDEX = 0x%02x ", inb(AD1848P(chip, REGSEL))); | 157 | printk(KERN_DEBUG "AD1848 REGS: INDEX = 0x%02x ", inb(chip->port + CS4231P(REGSEL))); |
158 | printk(" STATUS = 0x%02x\n", inb(AD1848P(chip, STATUS))); | 158 | printk(KERN_DEBUG " STATUS = 0x%02x\n", inb(chip->port + CS4231P(STATUS))); |
159 | printk(" 0x00: left input = 0x%02x ", snd_ad1848_in(chip, 0x00)); | 159 | printk(KERN_DEBUG " 0x00: left input = 0x%02x ", snd_ad1848_in(chip, 0x00)); |
160 | printk(" 0x08: playback format = 0x%02x\n", snd_ad1848_in(chip, 0x08)); | 160 | printk(KERN_DEBUG " 0x08: playback format = 0x%02x\n", snd_ad1848_in(chip, 0x08)); |
161 | printk(" 0x01: right input = 0x%02x ", snd_ad1848_in(chip, 0x01)); | 161 | printk(KERN_DEBUG " 0x01: right input = 0x%02x ", snd_ad1848_in(chip, 0x01)); |
162 | printk(" 0x09: iface (CFIG 1) = 0x%02x\n", snd_ad1848_in(chip, 0x09)); | 162 | printk(KERN_DEBUG " 0x09: iface (CFIG 1) = 0x%02x\n", snd_ad1848_in(chip, 0x09)); |
163 | printk(" 0x02: AUXA left = 0x%02x ", snd_ad1848_in(chip, 0x02)); | 163 | printk(KERN_DEBUG " 0x02: AUXA left = 0x%02x ", snd_ad1848_in(chip, 0x02)); |
164 | printk(" 0x0a: pin control = 0x%02x\n", snd_ad1848_in(chip, 0x0a)); | 164 | printk(KERN_DEBUG " 0x0a: pin control = 0x%02x\n", snd_ad1848_in(chip, 0x0a)); |
165 | printk(" 0x03: AUXA right = 0x%02x ", snd_ad1848_in(chip, 0x03)); | 165 | printk(KERN_DEBUG " 0x03: AUXA right = 0x%02x ", snd_ad1848_in(chip, 0x03)); |
166 | printk(" 0x0b: init & status = 0x%02x\n", snd_ad1848_in(chip, 0x0b)); | 166 | printk(KERN_DEBUG " 0x0b: init & status = 0x%02x\n", snd_ad1848_in(chip, 0x0b)); |
167 | printk(" 0x04: AUXB left = 0x%02x ", snd_ad1848_in(chip, 0x04)); | 167 | printk(KERN_DEBUG " 0x04: AUXB left = 0x%02x ", snd_ad1848_in(chip, 0x04)); |
168 | printk(" 0x0c: revision & mode = 0x%02x\n", snd_ad1848_in(chip, 0x0c)); | 168 | printk(KERN_DEBUG " 0x0c: revision & mode = 0x%02x\n", snd_ad1848_in(chip, 0x0c)); |
169 | printk(" 0x05: AUXB right = 0x%02x ", snd_ad1848_in(chip, 0x05)); | 169 | printk(KERN_DEBUG " 0x05: AUXB right = 0x%02x ", snd_ad1848_in(chip, 0x05)); |
170 | printk(" 0x0d: loopback = 0x%02x\n", snd_ad1848_in(chip, 0x0d)); | 170 | printk(KERN_DEBUG " 0x0d: loopback = 0x%02x\n", snd_ad1848_in(chip, 0x0d)); |
171 | printk(" 0x06: left output = 0x%02x ", snd_ad1848_in(chip, 0x06)); | 171 | printk(KERN_DEBUG " 0x06: left output = 0x%02x ", snd_ad1848_in(chip, 0x06)); |
172 | printk(" 0x0e: data upr count = 0x%02x\n", snd_ad1848_in(chip, 0x0e)); | 172 | printk(KERN_DEBUG " 0x0e: data upr count = 0x%02x\n", snd_ad1848_in(chip, 0x0e)); |
173 | printk(" 0x07: right output = 0x%02x ", snd_ad1848_in(chip, 0x07)); | 173 | printk(KERN_DEBUG " 0x07: right output = 0x%02x ", snd_ad1848_in(chip, 0x07)); |
174 | printk(" 0x0f: data lwr count = 0x%02x\n", snd_ad1848_in(chip, 0x0f)); | 174 | printk(KERN_DEBUG " 0x0f: data lwr count = 0x%02x\n", snd_ad1848_in(chip, 0x0f)); |
175 | } | 175 | } |
176 | 176 | ||
177 | #endif | 177 | #endif |
@@ -187,16 +187,17 @@ static void snd_ad1848_mce_up(struct snd_wss *chip) | |||
187 | 187 | ||
188 | snd_ad1848_wait(chip); | 188 | snd_ad1848_wait(chip); |
189 | #ifdef CONFIG_SND_DEBUG | 189 | #ifdef CONFIG_SND_DEBUG |
190 | if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT) | 190 | if (inb(chip->port + CS4231P(REGSEL)) & AD1848_INIT) |
191 | snd_printk(KERN_WARNING "mce_up - auto calibration time out (0)\n"); | 191 | snd_printk(KERN_WARNING "mce_up - auto calibration time out (0)\n"); |
192 | #endif | 192 | #endif |
193 | spin_lock_irqsave(&chip->reg_lock, flags); | 193 | spin_lock_irqsave(&chip->reg_lock, flags); |
194 | chip->mce_bit |= AD1848_MCE; | 194 | chip->mce_bit |= AD1848_MCE; |
195 | timeout = inb(AD1848P(chip, REGSEL)); | 195 | timeout = inb(chip->port + CS4231P(REGSEL)); |
196 | if (timeout == 0x80) | 196 | if (timeout == 0x80) |
197 | snd_printk(KERN_WARNING "mce_up [0x%lx]: serious init problem - codec still busy\n", chip->port); | 197 | snd_printk(KERN_WARNING "mce_up [0x%lx]: serious init problem - codec still busy\n", chip->port); |
198 | if (!(timeout & AD1848_MCE)) | 198 | if (!(timeout & AD1848_MCE)) |
199 | outb(chip->mce_bit | (timeout & 0x1f), AD1848P(chip, REGSEL)); | 199 | outb(chip->mce_bit | (timeout & 0x1f), |
200 | chip->port + CS4231P(REGSEL)); | ||
200 | spin_unlock_irqrestore(&chip->reg_lock, flags); | 201 | spin_unlock_irqrestore(&chip->reg_lock, flags); |
201 | } | 202 | } |
202 | 203 | ||
@@ -207,21 +208,25 @@ static void snd_ad1848_mce_down(struct snd_wss *chip) | |||
207 | 208 | ||
208 | spin_lock_irqsave(&chip->reg_lock, flags); | 209 | spin_lock_irqsave(&chip->reg_lock, flags); |
209 | for (timeout = 5; timeout > 0; timeout--) | 210 | for (timeout = 5; timeout > 0; timeout--) |
210 | inb(AD1848P(chip, REGSEL)); | 211 | inb(chip->port + CS4231P(REGSEL)); |
211 | /* end of cleanup sequence */ | 212 | /* end of cleanup sequence */ |
212 | for (timeout = 12000; timeout > 0 && (inb(AD1848P(chip, REGSEL)) & AD1848_INIT); timeout--) | 213 | for (timeout = 12000; |
214 | timeout > 0 && (inb(chip->port + CS4231P(REGSEL)) & AD1848_INIT); | ||
215 | timeout--) | ||
213 | udelay(100); | 216 | udelay(100); |
214 | 217 | ||
215 | snd_printdd("(1) timeout = %ld\n", timeout); | 218 | snd_printdd("(1) timeout = %ld\n", timeout); |
216 | 219 | ||
217 | #ifdef CONFIG_SND_DEBUG | 220 | #ifdef CONFIG_SND_DEBUG |
218 | if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT) | 221 | if (inb(chip->port + CS4231P(REGSEL)) & AD1848_INIT) |
219 | snd_printk(KERN_WARNING "mce_down [0x%lx] - auto calibration time out (0)\n", AD1848P(chip, REGSEL)); | 222 | snd_printk(KERN_WARNING |
223 | "mce_down [0x%lx] - auto calibration time out (0)\n", | ||
224 | chip->port + CS4231P(REGSEL)); | ||
220 | #endif | 225 | #endif |
221 | 226 | ||
222 | chip->mce_bit &= ~AD1848_MCE; | 227 | chip->mce_bit &= ~AD1848_MCE; |
223 | reg = inb(AD1848P(chip, REGSEL)); | 228 | reg = inb(chip->port + CS4231P(REGSEL)); |
224 | outb(chip->mce_bit | (reg & 0x1f), AD1848P(chip, REGSEL)); | 229 | outb(chip->mce_bit | (reg & 0x1f), chip->port + CS4231P(REGSEL)); |
225 | if (reg == 0x80) | 230 | if (reg == 0x80) |
226 | snd_printk(KERN_WARNING "mce_down [0x%lx]: serious init problem - codec still busy\n", chip->port); | 231 | snd_printk(KERN_WARNING "mce_down [0x%lx]: serious init problem - codec still busy\n", chip->port); |
227 | if ((reg & AD1848_MCE) == 0) { | 232 | if ((reg & AD1848_MCE) == 0) { |
@@ -252,7 +257,8 @@ static void snd_ad1848_mce_down(struct snd_wss *chip) | |||
252 | "mce_down - auto calibration time out (2)\n"); | 257 | "mce_down - auto calibration time out (2)\n"); |
253 | 258 | ||
254 | snd_printdd("(4) jiffies = %lu\n", jiffies); | 259 | snd_printdd("(4) jiffies = %lu\n", jiffies); |
255 | snd_printd("mce_down - exit = 0x%x\n", inb(AD1848P(chip, REGSEL))); | 260 | snd_printd("mce_down - exit = 0x%x\n", |
261 | inb(chip->port + CS4231P(REGSEL))); | ||
256 | } | 262 | } |
257 | 263 | ||
258 | static unsigned int snd_ad1848_get_count(unsigned char format, | 264 | static unsigned int snd_ad1848_get_count(unsigned char format, |
@@ -412,8 +418,8 @@ static int snd_ad1848_open(struct snd_wss *chip, unsigned int mode) | |||
412 | 418 | ||
413 | /* ok. now enable and ack CODEC IRQ */ | 419 | /* ok. now enable and ack CODEC IRQ */ |
414 | spin_lock_irqsave(&chip->reg_lock, flags); | 420 | spin_lock_irqsave(&chip->reg_lock, flags); |
415 | outb(0, AD1848P(chip, STATUS)); /* clear IRQ */ | 421 | outb(0, chip->port + CS4231P(STATUS)); /* clear IRQ */ |
416 | outb(0, AD1848P(chip, STATUS)); /* clear IRQ */ | 422 | outb(0, chip->port + CS4231P(STATUS)); /* clear IRQ */ |
417 | chip->image[AD1848_PIN_CTRL] |= AD1848_IRQ_ENABLE; | 423 | chip->image[AD1848_PIN_CTRL] |= AD1848_IRQ_ENABLE; |
418 | snd_ad1848_out(chip, AD1848_PIN_CTRL, chip->image[AD1848_PIN_CTRL]); | 424 | snd_ad1848_out(chip, AD1848_PIN_CTRL, chip->image[AD1848_PIN_CTRL]); |
419 | spin_unlock_irqrestore(&chip->reg_lock, flags); | 425 | spin_unlock_irqrestore(&chip->reg_lock, flags); |
@@ -431,8 +437,8 @@ static void snd_ad1848_close(struct snd_wss *chip) | |||
431 | return; | 437 | return; |
432 | /* disable IRQ */ | 438 | /* disable IRQ */ |
433 | spin_lock_irqsave(&chip->reg_lock, flags); | 439 | spin_lock_irqsave(&chip->reg_lock, flags); |
434 | outb(0, AD1848P(chip, STATUS)); /* clear IRQ */ | 440 | outb(0, chip->port + CS4231P(STATUS)); /* clear IRQ */ |
435 | outb(0, AD1848P(chip, STATUS)); /* clear IRQ */ | 441 | outb(0, chip->port + CS4231P(STATUS)); /* clear IRQ */ |
436 | chip->image[AD1848_PIN_CTRL] &= ~AD1848_IRQ_ENABLE; | 442 | chip->image[AD1848_PIN_CTRL] &= ~AD1848_IRQ_ENABLE; |
437 | snd_ad1848_out(chip, AD1848_PIN_CTRL, chip->image[AD1848_PIN_CTRL]); | 443 | snd_ad1848_out(chip, AD1848_PIN_CTRL, chip->image[AD1848_PIN_CTRL]); |
438 | spin_unlock_irqrestore(&chip->reg_lock, flags); | 444 | spin_unlock_irqrestore(&chip->reg_lock, flags); |
@@ -449,8 +455,8 @@ static void snd_ad1848_close(struct snd_wss *chip) | |||
449 | 455 | ||
450 | /* clear IRQ again */ | 456 | /* clear IRQ again */ |
451 | spin_lock_irqsave(&chip->reg_lock, flags); | 457 | spin_lock_irqsave(&chip->reg_lock, flags); |
452 | outb(0, AD1848P(chip, STATUS)); /* clear IRQ */ | 458 | outb(0, chip->port + CS4231P(STATUS)); /* clear IRQ */ |
453 | outb(0, AD1848P(chip, STATUS)); /* clear IRQ */ | 459 | outb(0, chip->port + CS4231P(STATUS)); /* clear IRQ */ |
454 | spin_unlock_irqrestore(&chip->reg_lock, flags); | 460 | spin_unlock_irqrestore(&chip->reg_lock, flags); |
455 | 461 | ||
456 | chip->mode = 0; | 462 | chip->mode = 0; |
@@ -572,7 +578,7 @@ static irqreturn_t snd_ad1848_interrupt(int irq, void *dev_id) | |||
572 | snd_pcm_period_elapsed(chip->playback_substream); | 578 | snd_pcm_period_elapsed(chip->playback_substream); |
573 | if ((chip->mode & WSS_MODE_RECORD) && chip->capture_substream) | 579 | if ((chip->mode & WSS_MODE_RECORD) && chip->capture_substream) |
574 | snd_pcm_period_elapsed(chip->capture_substream); | 580 | snd_pcm_period_elapsed(chip->capture_substream); |
575 | outb(0, AD1848P(chip, STATUS)); /* clear global interrupt bit */ | 581 | outb(0, chip->port + CS4231P(STATUS)); /* clear global interrupt bit */ |
576 | return IRQ_HANDLED; | 582 | return IRQ_HANDLED; |
577 | } | 583 | } |
578 | 584 | ||
@@ -638,8 +644,8 @@ static void snd_ad1848_resume(struct snd_wss *chip) | |||
638 | snd_ad1848_thinkpad_twiddle(chip, 1); | 644 | snd_ad1848_thinkpad_twiddle(chip, 1); |
639 | 645 | ||
640 | /* clear any pendings IRQ */ | 646 | /* clear any pendings IRQ */ |
641 | inb(AD1848P(chip, STATUS)); | 647 | inb(chip->port + CS4231P(STATUS)); |
642 | outb(0, AD1848P(chip, STATUS)); | 648 | outb(0, chip->port + CS4231P(STATUS)); |
643 | mb(); | 649 | mb(); |
644 | 650 | ||
645 | snd_ad1848_mce_down(chip); | 651 | snd_ad1848_mce_down(chip); |
@@ -662,7 +668,7 @@ static int snd_ad1848_probe(struct snd_wss *chip) | |||
662 | id = ad1847 = 0; | 668 | id = ad1847 = 0; |
663 | for (i = 0; i < 1000; i++) { | 669 | for (i = 0; i < 1000; i++) { |
664 | mb(); | 670 | mb(); |
665 | if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT) | 671 | if (inb(chip->port + CS4231P(REGSEL)) & AD1848_INIT) |
666 | udelay(500); | 672 | udelay(500); |
667 | else { | 673 | else { |
668 | spin_lock_irqsave(&chip->reg_lock, flags); | 674 | spin_lock_irqsave(&chip->reg_lock, flags); |
@@ -707,8 +713,8 @@ static int snd_ad1848_probe(struct snd_wss *chip) | |||
707 | } | 713 | } |
708 | } | 714 | } |
709 | spin_lock_irqsave(&chip->reg_lock, flags); | 715 | spin_lock_irqsave(&chip->reg_lock, flags); |
710 | inb(AD1848P(chip, STATUS)); /* clear any pendings IRQ */ | 716 | inb(chip->port + CS4231P(STATUS)); /* clear any pendings IRQ */ |
711 | outb(0, AD1848P(chip, STATUS)); | 717 | outb(0, chip->port + CS4231P(STATUS)); |
712 | mb(); | 718 | mb(); |
713 | spin_unlock_irqrestore(&chip->reg_lock, flags); | 719 | spin_unlock_irqrestore(&chip->reg_lock, flags); |
714 | 720 | ||