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authorClemens Ladisch <clemens@ladisch.de>2011-12-04 15:47:00 -0500
committerClemens Ladisch <clemens@ladisch.de>2013-10-20 16:07:57 -0400
commita0301998aeebad206fa7e1b77300c9961c8c3d12 (patch)
tree5e2960ea479fa0dd4e99bb47e6a470a7ec06bf5e /sound/firewire
parentc5280e996fdd14ffacfbbdf8ce5ac7f913b101d2 (diff)
ALSA: dice: get clock capabilities
In preparation for sample rate selection support, ensure that the driver knows about the device's clock capabilities. Signed-off-by: Clemens Ladisch <clemens@ladisch.de>
Diffstat (limited to 'sound/firewire')
-rw-r--r--sound/firewire/dice.c23
1 files changed, 21 insertions, 2 deletions
diff --git a/sound/firewire/dice.c b/sound/firewire/dice.c
index 2d3a04ef9840..06fef4752d50 100644
--- a/sound/firewire/dice.c
+++ b/sound/firewire/dice.c
@@ -36,6 +36,7 @@ struct dice {
36 struct mutex mutex; 36 struct mutex mutex;
37 unsigned int global_offset; 37 unsigned int global_offset;
38 unsigned int rx_offset; 38 unsigned int rx_offset;
39 unsigned int clock_caps;
39 struct fw_address_handler notification_handler; 40 struct fw_address_handler notification_handler;
40 int owner_generation; 41 int owner_generation;
41 int dev_lock_count; /* > 0 driver, < 0 userspace */ 42 int dev_lock_count; /* > 0 driver, < 0 userspace */
@@ -830,9 +831,10 @@ static int dice_interface_check(struct fw_unit *unit)
830 return 0; 831 return 0;
831} 832}
832 833
833static int dice_init_offsets(struct dice *dice) 834static int dice_read_params(struct dice *dice)
834{ 835{
835 __be32 pointers[6]; 836 __be32 pointers[6];
837 __be32 value;
836 int err; 838 int err;
837 839
838 err = snd_fw_transaction(dice->unit, TCODE_READ_BLOCK_REQUEST, 840 err = snd_fw_transaction(dice->unit, TCODE_READ_BLOCK_REQUEST,
@@ -844,6 +846,23 @@ static int dice_init_offsets(struct dice *dice)
844 dice->global_offset = be32_to_cpu(pointers[0]) * 4; 846 dice->global_offset = be32_to_cpu(pointers[0]) * 4;
845 dice->rx_offset = be32_to_cpu(pointers[4]) * 4; 847 dice->rx_offset = be32_to_cpu(pointers[4]) * 4;
846 848
849 /* some very old firmwares don't tell about their clock support */
850 if (be32_to_cpu(pointers[1]) * 4 >= GLOBAL_CLOCK_CAPABILITIES + 4) {
851 err = snd_fw_transaction(
852 dice->unit, TCODE_READ_QUADLET_REQUEST,
853 global_address(dice, GLOBAL_CLOCK_CAPABILITIES),
854 &value, 4, 0);
855 if (err < 0)
856 return err;
857 dice->clock_caps = be32_to_cpu(value);
858 } else {
859 /* this should be supported by any device */
860 dice->clock_caps = CLOCK_CAP_RATE_44100 |
861 CLOCK_CAP_RATE_48000 |
862 CLOCK_CAP_SOURCE_ARX1 |
863 CLOCK_CAP_SOURCE_INTERNAL;
864 }
865
847 return 0; 866 return 0;
848} 867}
849 868
@@ -905,7 +924,7 @@ static int dice_probe(struct fw_unit *unit, const struct ieee1394_device_id *id)
905 dice->unit = unit; 924 dice->unit = unit;
906 init_waitqueue_head(&dice->hwdep_wait); 925 init_waitqueue_head(&dice->hwdep_wait);
907 926
908 err = dice_init_offsets(dice); 927 err = dice_read_params(dice);
909 if (err < 0) 928 if (err < 0)
910 goto err_mutex; 929 goto err_mutex;
911 930