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authorIngo Molnar <mingo@elte.hu>2008-06-16 05:24:43 -0400
committerIngo Molnar <mingo@elte.hu>2008-06-16 05:24:43 -0400
commit8bbd54d69e9c66adbf544e21d8dcfb15fb9198f7 (patch)
tree95f30814fc759c2cb523dbea95bc531c7f8f3231 /sound/drivers/pcsp/pcsp.h
parent8c2238eaaf0f774ca0f8d9daad7a616429bbb7f1 (diff)
parent066519068ad2fbe98c7f45552b1f592903a9c8c8 (diff)
Merge branch 'linus' into core/softlockup
Diffstat (limited to 'sound/drivers/pcsp/pcsp.h')
-rw-r--r--sound/drivers/pcsp/pcsp.h6
1 files changed, 4 insertions, 2 deletions
diff --git a/sound/drivers/pcsp/pcsp.h b/sound/drivers/pcsp/pcsp.h
index f07cc1ee1fe7..1d661f795e8c 100644
--- a/sound/drivers/pcsp/pcsp.h
+++ b/sound/drivers/pcsp/pcsp.h
@@ -24,7 +24,8 @@ static DEFINE_SPINLOCK(i8253_lock);
24/* default timer freq for PC-Speaker: 18643 Hz */ 24/* default timer freq for PC-Speaker: 18643 Hz */
25#define DIV_18KHZ 64 25#define DIV_18KHZ 64
26#define MAX_DIV DIV_18KHZ 26#define MAX_DIV DIV_18KHZ
27#define CUR_DIV() (MAX_DIV >> chip->treble) 27#define CALC_DIV(d) (MAX_DIV >> (d))
28#define CUR_DIV() CALC_DIV(chip->treble)
28#define PCSP_MAX_TREBLE 1 29#define PCSP_MAX_TREBLE 1
29 30
30/* unfortunately, with hrtimers 37KHz does not work very well :( */ 31/* unfortunately, with hrtimers 37KHz does not work very well :( */
@@ -36,7 +37,8 @@ static DEFINE_SPINLOCK(i8253_lock);
36#define PCSP_DEFAULT_SDIV (DIV_18KHZ >> 1) 37#define PCSP_DEFAULT_SDIV (DIV_18KHZ >> 1)
37#define PCSP_DEFAULT_SRATE (PIT_TICK_RATE / PCSP_DEFAULT_SDIV) 38#define PCSP_DEFAULT_SRATE (PIT_TICK_RATE / PCSP_DEFAULT_SDIV)
38#define PCSP_INDEX_INC() (1 << (PCSP_MAX_TREBLE - chip->treble)) 39#define PCSP_INDEX_INC() (1 << (PCSP_MAX_TREBLE - chip->treble))
39#define PCSP_RATE() (PIT_TICK_RATE / CUR_DIV()) 40#define PCSP_CALC_RATE(i) (PIT_TICK_RATE / CALC_DIV(i))
41#define PCSP_RATE() PCSP_CALC_RATE(chip->treble)
40#define PCSP_MIN_RATE__1 MAX_DIV/PIT_TICK_RATE 42#define PCSP_MIN_RATE__1 MAX_DIV/PIT_TICK_RATE
41#define PCSP_MAX_RATE__1 MIN_DIV/PIT_TICK_RATE 43#define PCSP_MAX_RATE__1 MIN_DIV/PIT_TICK_RATE
42#define PCSP_MAX_PERIOD_NS (1000000000ULL * PCSP_MIN_RATE__1) 44#define PCSP_MAX_PERIOD_NS (1000000000ULL * PCSP_MIN_RATE__1)