litmus-rt.git - The LITMUS^RT kernel.

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author	Karsten Wiese <fzu@wemgehoertderstaat.de>	2009-02-08 19:07:58 -0500
committer	Greg Kroah-Hartman <gregkh@suse.de>	2009-02-27 17:40:50 -0500
commit	9aa09d2f8f4bc440d6db1c3414d4009642875240 (patch)
tree	11b8735a5ddb24fcb4b810b9af3959a8aae6a1ae /net
parent	9a6e184c804b33a2c2ea974efcd3c9798d30cb39 (diff)

USB: EHCI: slow down ITD reuse

Currently ITDs are immediately recycled whenever their URB completes. However, EHCI hardware can sometimes remember some ITD state. This means that when the ITD is reused before end-of-frame it may sometimes cause the hardware to reference bogus state. This patch defers reusing such ITDs by moving them into a new ehci member cached_itd_list. ITDs resting in cached_itd_list are moved back into their stream's free_list once scan_periodic() detects that the active frame has elapsed. This makes the snd_usb_us122l driver (in kernel since .28) work right when it's hooked up through EHCI. [ dbrownell@users.sourceforge.net: comment fixups ] Signed-off-by: Karsten Wiese <fzu@wemgehoertderstaat.de> Tested-by: Philippe Carriere <philippe-f.carriere@wanadoo.fr> Tested-by: Federico Briata <federicobriata@gmail.com> Cc: stable <stable@kernel.org> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

Diffstat (limited to 'net')

0 files changed, 0 insertions, 0 deletions

/* drivers/net/eepro100.c: An Intel i82557-559 Ethernet driver for Linux. */ /* Written 1996-1999 by Donald Becker. The driver also contains updates by different kernel developers (see incomplete list below). Current maintainer is Andrey V. Savochkin <saw@saw.sw.com.sg>. Please use this email address and linux-kernel mailing list for bug reports. This software may be used and distributed according to the terms of the GNU General Public License, incorporated herein by reference. This driver is for the Intel EtherExpress Pro100 (Speedo3) design. It should work with all i82557/558/559 boards. Version history: 1998 Apr - 2000 Feb Andrey V. Savochkin <saw@saw.sw.com.sg> Serious fixes for multicast filter list setting, TX timeout routine; RX ring refilling logic; other stuff 2000 Feb Jeff Garzik <jgarzik@pobox.com> Convert to new PCI driver interface 2000 Mar 24 Dragan Stancevic <visitor@valinux.com> Disabled FC and ER, to avoid lockups when when we get FCP interrupts. 2000 Jul 17 Goutham Rao <goutham.rao@intel.com> PCI DMA API fixes, adding pci_dma_sync_single calls where neccesary 2000 Aug 31 David Mosberger <davidm@hpl.hp.com> rx_align support: enables rx DMA without causing unaligned accesses. */ static const char * const version = "eepro100.c:v1.09j-t 9/29/99 Donald Becker http://www.scyld.com/network/eepro100.html\n" "eepro100.c: $Revision: 1.36 $ 2000/11/17 Modified by Andrey V. Savochkin <saw@saw.sw.com.sg> and others\n"; /* A few user-configurable values that apply to all boards. First set is undocumented and spelled per Intel recommendations. */ static int congenb /* = 0 */; /* Enable congestion control in the DP83840. */ static int txfifo = 8; /* Tx FIFO threshold in 4 byte units, 0-15 */ static int rxfifo = 8; /* Rx FIFO threshold, default 32 bytes. */ /* Tx/Rx DMA burst length, 0-127, 0 == no preemption, tx==128 -> disabled. */ static int txdmacount = 128; static int rxdmacount /* = 0 */; #if defined(__ia64__) || defined(__alpha__) || defined(__sparc__) || defined(__mips__) || \ defined(__arm__) /* align rx buffers to 2 bytes so that IP header is aligned */ # define rx_align(skb) skb_reserve((skb), 2) # define RxFD_ALIGNMENT __attribute__ ((aligned (2), packed)) #else # define rx_align(skb) # define RxFD_ALIGNMENT #endif /* Set the copy breakpoint for the copy-only-tiny-buffer Rx method. Lower values use more memory, but are faster. */ static int rx_copybreak = 200; /* Maximum events (Rx packets, etc.) to handle at each interrupt. */ static int max_interrupt_work = 20; /* Maximum number of multicast addresses to filter (vs. rx-all-multicast) */ static int multicast_filter_limit = 64; /* 'options' is used to pass a transceiver override or full-duplex flag e.g. "options=16" for FD, "options=32" for 100mbps-only. */ static int full_duplex[] = {-1, -1, -1, -1, -1, -1, -1, -1}; static int options[] = {-1, -1, -1, -1, -1, -1, -1, -1}; /* A few values that may be tweaked. */ /* The ring sizes should be a power of two for efficiency. */ #define TX_RING_SIZE 64 #define RX_RING_SIZE 64 /* How much slots multicast filter setup may take. Do not descrease without changing set_rx_mode() implementaion. */ #define TX_MULTICAST_SIZE 2 #define TX_MULTICAST_RESERV (TX_MULTICAST_SIZE*2) /* Actual number of TX packets queued, must be <= TX_RING_SIZE-TX_MULTICAST_RESERV. */ #define TX_QUEUE_LIMIT (TX_RING_SIZE-TX_MULTICAST_RESERV) /* Hysteresis marking queue as no longer full. */ #define TX_QUEUE_UNFULL (TX_QUEUE_LIMIT-4) /* Operational parameters that usually are not changed. */ /* Time in jiffies before concluding the transmitter is hung. */ #define TX_TIMEOUT (2*HZ) /* Size of an pre-allocated Rx buffer: <Ethernet MTU> + slack.*/ #define PKT_BUF_SZ 1536 #include <linux/module.h> #include <linux/kernel.h> #include <linux/string.h> #include <linux/errno.h> #include <linux/ioport.h> #include <linux/slab.h> #include <linux/interrupt.h> #include <linux/timer.h> #include <linux/pci.h> #include <linux/spinlock.h> #include <linux/init.h> #include <linux/mii.h> #include <linux/delay.h> #include <linux/bitops.h> #include <asm/io.h> #include <asm/uaccess.h> #include <asm/irq.h> #include <linux/netdevice.h> #include <linux/etherdevice.h> #include <linux/rtnetlink.h> #include <linux/skbuff.h> #include <linux/ethtool.h> static int use_io; static int debug = -1; #define DEBUG_DEFAULT (NETIF_MSG_DRV | \ NETIF_MSG_HW | \ NETIF_MSG_RX_ERR | \ NETIF_MSG_TX_ERR) #define DEBUG ((debug >= 0) ? (1<<debug)-1 : DEBUG_DEFAULT) MODULE_AUTHOR("Maintainer: Andrey V. Savochkin <saw@saw.sw.com.sg>"); MODULE_DESCRIPTION("Intel i82557/i82558/i82559 PCI EtherExpressPro driver"); MODULE_LICENSE("GPL"); module_param(use_io, int, 0); module_param(debug, int, 0); module_param_array(options, int, NULL, 0); module_param_array(full_duplex, int, NULL, 0); module_param(congenb, int, 0); module_param(txfifo, int, 0); module_param(rxfifo, int, 0); module_param(txdmacount, int, 0); module_param(rxdmacount, int, 0); module_param(rx_copybreak, int, 0); module_param(max_interrupt_work, int, 0); module_param(multicast_filter_limit, int, 0); MODULE_PARM_DESC(debug, "debug level (0-6)"); MODULE_PARM_DESC(options, "Bits 0-3: transceiver type, bit 4: full duplex, bit 5: 100Mbps"); MODULE_PARM_DESC(full_duplex, "full duplex setting(s) (1)"); MODULE_PARM_DESC(congenb, "Enable congestion control (1)"); MODULE_PARM_DESC(txfifo, "Tx FIFO threshold in 4 byte units, (0-15)"); MODULE_PARM_DESC(rxfifo, "Rx FIFO threshold in 4 byte units, (0-15)"); MODULE_PARM_DESC(txdmacount, "Tx DMA burst length; 128 - disable (0-128)"); MODULE_PARM_DESC(rxdmacount, "Rx DMA burst length; 128 - disable (0-128)"); MODULE_PARM_DESC(rx_copybreak, "copy breakpoint for copy-only-tiny-frames"); MODULE_PARM_DESC(max_interrupt_work, "maximum events handled per interrupt"); MODULE_PARM_DESC(multicast_filter_limit, "maximum number of filtered multicast addresses"); #define RUN_AT(x) (jiffies + (x)) #define netdevice_start(dev) #define netdevice_stop(dev) #define netif_set_tx_timeout(dev, tf, tm) \ do { \ (dev)->tx_timeout = (tf); \ (dev)->watchdog_timeo = (tm); \ } while(0) /* Theory of Operation I. Board Compatibility This device driver is designed for the Intel i82557 "Speedo3" chip, Intel's single-chip fast Ethernet controller for PCI, as used on the Intel EtherExpress Pro 100 adapter. II. Board-specific settings PCI bus devices are configured by the system at boot time, so no jumpers need to be set on the board. The system BIOS should be set to assign the PCI INTA signal to an otherwise unused system IRQ line. While it's possible to share PCI interrupt lines, it negatively impacts performance and only recent kernels support it. III. Driver operation IIIA. General The Speedo3 is very similar to other Intel network chips, that is to say "apparently designed on a different planet". This chips retains the complex Rx and Tx descriptors and multiple buffers pointers as previous chips, but also has simplified Tx and Rx buffer modes. This driver uses the "flexible" Tx mode, but in a simplified lower-overhead manner: it associates only a single buffer descriptor with each frame descriptor. Despite the extra space overhead in each receive skbuff, the driver must use the simplified Rx buffer mode to assure that only a single data buffer is associated with each RxFD. The driver implements this by reserving space for the Rx descriptor at the head of each Rx skbuff. The Speedo-3 has receive and command unit base addresses that are added to almost all descriptor pointers. The driver sets these to zero, so that all pointer fields are absolute addresses. The System Control Block (SCB) of some previous Intel chips exists on the chip in both PCI I/O and memory space. This driver uses the I/O space registers, but might switch to memory mapped mode to better support non-x86 processors. IIIB. Transmit structure The driver must use the complex Tx command+descriptor mode in order to have a indirect pointer to the skbuff data section. Each Tx command block (TxCB) is associated with two immediately appended Tx Buffer Descriptor (TxBD). A fixed ring of these TxCB+TxBD pairs are kept as part of the speedo_private data structure for each adapter instance. The newer i82558 explicitly supports this structure, and can read the two TxBDs in the same PCI burst as the TxCB. This ring structure is used for all normal transmit packets, but the transmit packet descriptors aren't long enough for most non-Tx commands such as CmdConfigure. This is complicated by the possibility that the chip has already loaded the link address in the previous descriptor. So for these commands we convert the next free descriptor on the ring to a NoOp, and point that descriptor's link to the complex command. An additional complexity of these non-transmit commands are that they may be added asynchronous to the normal transmit queue, so we disable interrupts whenever the Tx descriptor ring is manipulated. A notable aspect of these special configure commands is that they do work with the normal Tx ring entry scavenge method. The Tx ring scavenge is done at interrupt time using the 'dirty_tx' index, and checking for the command-complete bit. While the setup frames may have the NoOp command on the Tx ring marked as complete, but not have completed the setup command, this is not a problem. The tx_ring entry can be still safely reused, as the tx_skbuff[] entry is always empty for config_cmd and mc_setup frames. Commands may have bits set e.g. CmdSuspend in the command word to either suspend or stop the transmit/command unit. This driver always flags the last command with CmdSuspend, erases the CmdSuspend in the previous command, and then issues a CU_RESUME. Note: Watch out for the potential race condition here: imagine erasing the previous suspend the chip processes the previous command the chip processes the final command, and suspends doing the CU_RESUME the chip processes the next-yet-valid post-final-command. So blindly sending a CU_RESUME is only safe if we do it immediately after after erasing the previous CmdSuspend, without the possibility of an intervening delay. Thus the resume command is always within the interrupts-disabled region. This is a timing dependence, but handling this condition in a timing-independent way would considerably complicate the code. Note: In previous generation Intel chips, restarting the command unit was a notoriously slow process. This is presumably no longer true. IIIC. Receive structure Because of the bus-master support on the Speedo3 this driver uses the new SKBUFF_RX_COPYBREAK scheme, rather than a fixed intermediate receive buffer. This scheme allocates full-sized skbuffs as receive buffers. The value SKBUFF_RX_COPYBREAK is used as the copying breakpoint: it is chosen to trade-off the memory wasted by passing the full-sized skbuff to the queue layer for all frames vs. the copying cost of copying a frame to a correctly-sized skbuff. For small frames the copying cost is negligible (esp. considering that we are pre-loading the cache with immediately useful header information), so we allocate a new, minimally-sized skbuff. For large frames the copying cost is non-trivial, and the larger copy might flush the cache of useful data, so we pass up the skbuff the packet was received into. IV. Notes Thanks to Steve Williams of Intel for arranging the non-disclosure agreement that stated that I could disclose the information. But I still resent having to sign an Intel NDA when I'm helping Intel sell their own product! */ static int speedo_found1(struct pci_dev *pdev, void __iomem *ioaddr, int fnd_cnt, int acpi_idle_state); /* Offsets to the various registers. All accesses need not be longword aligned. */ enum speedo_offsets { SCBStatus = 0, SCBCmd = 2, /* Rx/Command Unit command and status. */ SCBIntmask = 3, SCBPointer = 4, /* General purpose pointer. */ SCBPort = 8, /* Misc. commands and operands. */ SCBflash = 12, SCBeeprom = 14, /* EEPROM and flash memory control. */ SCBCtrlMDI = 16, /* MDI interface control. */ SCBEarlyRx = 20, /* Early receive byte count. */ }; /* Commands that can be put in a command list entry. */ enum commands { CmdNOp = 0, CmdIASetup = 0x10000, CmdConfigure = 0x20000, CmdMulticastList = 0x30000, CmdTx = 0x40000, CmdTDR = 0x50000, CmdDump = 0x60000, CmdDiagnose = 0x70000, CmdSuspend = 0x40000000, /* Suspend after completion. */ CmdIntr = 0x20000000, /* Interrupt after completion. */ CmdTxFlex = 0x00080000, /* Use "Flexible mode" for CmdTx command. */ }; /* Clear CmdSuspend (1<<30) avoiding interference with the card access to the status bits. Previous driver versions used separate 16 bit fields for commands and statuses. --SAW */ #if defined(__alpha__) # define clear_suspend(cmd) clear_bit(30, &(cmd)->cmd_status); #else # if defined(__LITTLE_ENDIAN) # define clear_suspend(cmd) ((__u16 *)&(cmd)->cmd_status)[1] &= ~0x4000 # elif defined(__BIG_ENDIAN) # define clear_suspend(cmd) ((__u16 *)&(cmd)->cmd_status)[1] &= ~0x0040 # else # error Unsupported byteorder # endif #endif enum SCBCmdBits { SCBMaskCmdDone=0x8000, SCBMaskRxDone=0x4000, SCBMaskCmdIdle=0x2000, SCBMaskRxSuspend=0x1000, SCBMaskEarlyRx=0x0800, SCBMaskFlowCtl=0x0400, SCBTriggerIntr=0x0200, SCBMaskAll=0x0100, /* The rest are Rx and Tx commands. */ CUStart=0x0010, CUResume=0x0020, CUStatsAddr=0x0040, CUShowStats=0x0050, CUCmdBase=0x0060, /* CU Base address (set to zero) . */ CUDumpStats=0x0070, /* Dump then reset stats counters. */ RxStart=0x0001, RxResume=0x0002, RxAbort=0x0004, RxAddrLoad=0x0006, RxResumeNoResources=0x0007, }; enum SCBPort_cmds { PortReset=0, PortSelfTest=1, PortPartialReset=2, PortDump=3, };


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