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authorThomas Gleixner <tglx@linutronix.de>2010-12-09 12:17:25 -0500
committerThomas Gleixner <tglx@linutronix.de>2010-12-09 12:17:25 -0500
commitd834a9dcecae834cd6b2bc5e50e1907738d9cf6a (patch)
tree0589d753465d3fe359ba451ba6cb7798df03aaa2 /net/dccp/input.c
parenta38c5380ef9f088be9f49b6e4c5d80af8b1b5cd4 (diff)
parentf658bcfb2607bf0808966a69cf74135ce98e5c2d (diff)
Merge branch 'x86/amd-nb' into x86/apic-cleanups
Reason: apic cleanup series depends on x86/apic, x86/amd-nb x86/platform Conflicts: arch/x86/include/asm/io_apic.h Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'net/dccp/input.c')
-rw-r--r--net/dccp/input.c20
1 files changed, 7 insertions, 13 deletions
diff --git a/net/dccp/input.c b/net/dccp/input.c
index 10c957a88f4f..265985370fa1 100644
--- a/net/dccp/input.c
+++ b/net/dccp/input.c
@@ -259,7 +259,7 @@ static int dccp_check_seqno(struct sock *sk, struct sk_buff *skb)
259 sysctl_dccp_sync_ratelimit))) 259 sysctl_dccp_sync_ratelimit)))
260 return 0; 260 return 0;
261 261
262 DCCP_WARN("DCCP: Step 6 failed for %s packet, " 262 DCCP_WARN("Step 6 failed for %s packet, "
263 "(LSWL(%llu) <= P.seqno(%llu) <= S.SWH(%llu)) and " 263 "(LSWL(%llu) <= P.seqno(%llu) <= S.SWH(%llu)) and "
264 "(P.ackno %s or LAWL(%llu) <= P.ackno(%llu) <= S.AWH(%llu), " 264 "(P.ackno %s or LAWL(%llu) <= P.ackno(%llu) <= S.AWH(%llu), "
265 "sending SYNC...\n", dccp_packet_name(dh->dccph_type), 265 "sending SYNC...\n", dccp_packet_name(dh->dccph_type),
@@ -441,20 +441,14 @@ static int dccp_rcv_request_sent_state_process(struct sock *sk,
441 kfree_skb(sk->sk_send_head); 441 kfree_skb(sk->sk_send_head);
442 sk->sk_send_head = NULL; 442 sk->sk_send_head = NULL;
443 443
444 dp->dccps_isr = DCCP_SKB_CB(skb)->dccpd_seq;
445 dccp_update_gsr(sk, dp->dccps_isr);
446 /* 444 /*
447 * SWL and AWL are initially adjusted so that they are not less than 445 * Set ISR, GSR from packet. ISS was set in dccp_v{4,6}_connect
448 * the initial Sequence Numbers received and sent, respectively: 446 * and GSS in dccp_transmit_skb(). Setting AWL/AWH and SWL/SWH
449 * SWL := max(GSR + 1 - floor(W/4), ISR), 447 * is done as part of activating the feature values below, since
450 * AWL := max(GSS - W' + 1, ISS). 448 * these settings depend on the local/remote Sequence Window
451 * These adjustments MUST be applied only at the beginning of the 449 * features, which were undefined or not confirmed until now.
452 * connection.
453 *
454 * AWL was adjusted in dccp_v4_connect -acme
455 */ 450 */
456 dccp_set_seqno(&dp->dccps_swl, 451 dp->dccps_gsr = dp->dccps_isr = DCCP_SKB_CB(skb)->dccpd_seq;
457 max48(dp->dccps_swl, dp->dccps_isr));
458 452
459 dccp_sync_mss(sk, icsk->icsk_pmtu_cookie); 453 dccp_sync_mss(sk, icsk->icsk_pmtu_cookie);
460 454