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authorAndi Kleen <andi@firstfloor.org>2009-02-12 07:49:38 -0500
committerH. Peter Anvin <hpa@zytor.com>2009-02-24 16:41:01 -0500
commitbe71b8553d0522aba535a815baaebb1f0bb9a9ec (patch)
treebbf5093333405249fa360a1dbf5dcc42be514a98 /mm/bootmem.c
parent5ca8681ca10f671427710f4954644359856581a3 (diff)
x86, mce, cmci: recheck CMCI banks after APIC has been enabled on CPU #0
Impact: Fix marginal race condition One the first CPU the machine checks are enabled early before the local APIC is enabled. This could in theory lead to some lost CMCI events very early during boot because CMCIs cannot be delivered with disabled LAPIC. The poller also doesn't recover from this because it doesn't check CMCI banks. Add an explicit CMCI banks check after the LAPIC is enabled. This is only done for CPU #0, the other CPUs only initialize machine checks after the LAPIC is on. Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'mm/bootmem.c')
0 files changed, 0 insertions, 0 deletions