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authorShawn Guo <shawn.guo@linaro.org>2011-12-30 03:16:07 -0500
committerShawn Guo <shawn.guo@linaro.org>2011-12-30 03:16:07 -0500
commit5b2acf384c8a8707d32a98106192ee7187e4446d (patch)
tree568cc0c99cc25e0003c26e62e50f94ce5c2bd2eb /lib
parent5f0a6e2d503896062f641639dacfe5055c2f593b (diff)
ARM: imx6: fix v7_invalidate_l1 by adding I-Cache invalidation
The recent suspend/resume and reset testing on imx6q discovers that not only D-Cache but also I-Cache has random data and validity when the core comes out of a power recycle. This patch adds I-Cache invalidation into v7_invalidate_l1 to make sure both D-Cache and I-Cache invalidated on power-up. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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