Merge tag 'md-3.8' of git://neil.brown.name/md

Pull md update from Neil Brown:
 "Mostly just little fixes.  Probably biggest part is AVX accelerated
  RAID6 calculations."

* tag 'md-3.8' of git://neil.brown.name/md:
  md/raid5: add blktrace calls
  md/raid5: use async_tx_quiesce() instead of open-coding it.
  md: Use ->curr_resync as last completed request when cleanly aborting resync.
  lib/raid6: build proper files on corresponding arch
  lib/raid6: Add AVX2 optimized gen_syndrome functions
  lib/raid6: Add AVX2 optimized recovery functions
  md: Update checkpoint of resync/recovery based on time.
  md:Add place to update ->recovery_cp.
  md.c: re-indent various 'switch' statements.
  md: close race between removing and adding a device.
  md: removed unused variable in calc_sb_1_csm.

11 files changed, 631 insertions, 26 deletions

diff --git a/lib/raid6/Makefile b/lib/raid6/Makefile
index de06dfe165b8..9f7c184725d7 100644
--- a/lib/raid6/Makefile
+++ b/lib/raid6/Makefile
@@ -1,8 +1,11 @@
 obj-$(CONFIG_RAID6_PQ)  += raid6_pq.o
 
-raid6_pq-y      += algos.o recov.o recov_ssse3.o tables.o int1.o int2.o int4.o \
-                   int8.o int16.o int32.o altivec1.o altivec2.o altivec4.o \
-                   altivec8.o mmx.o sse1.o sse2.o
+raid6_pq-y      += algos.o recov.o tables.o int1.o int2.o int4.o \
+                   int8.o int16.o int32.o
+
+raid6_pq-$(CONFIG_X86) += recov_ssse3.o recov_avx2.o mmx.o sse1.o sse2.o avx2.o
+raid6_pq-$(CONFIG_ALTIVEC) += altivec1.o altivec2.o altivec4.o altivec8.o
+
 hostprogs-y     += mktables
 
 quiet_cmd_unroll = UNROLL  $@
diff --git a/lib/raid6/algos.c b/lib/raid6/algos.c
index 589f5f50ad2e..6d7316fe9f30 100644
--- a/lib/raid6/algos.c
+++ b/lib/raid6/algos.c
@@ -45,11 +45,20 @@ const struct raid6_calls * const raid6_algos[] = {
         &raid6_sse1x2,
         &raid6_sse2x1,
         &raid6_sse2x2,
+#ifdef CONFIG_AS_AVX2
+        &raid6_avx2x1,
+        &raid6_avx2x2,
+#endif
 #endif
 #if defined(__x86_64__) && !defined(__arch_um__)
         &raid6_sse2x1,
         &raid6_sse2x2,
         &raid6_sse2x4,
+#ifdef CONFIG_AS_AVX2
+        &raid6_avx2x1,
+        &raid6_avx2x2,
+        &raid6_avx2x4,
+#endif
 #endif
 #ifdef CONFIG_ALTIVEC
         &raid6_altivec1,
@@ -72,6 +81,9 @@ EXPORT_SYMBOL_GPL(raid6_datap_recov);
 
 const struct raid6_recov_calls *const raid6_recov_algos[] = {
 #if (defined(__i386__) || defined(__x86_64__)) && !defined(__arch_um__)
+#ifdef CONFIG_AS_AVX2
+        &raid6_recov_avx2,
+#endif
         &raid6_recov_ssse3,
 #endif
         &raid6_recov_intx1,
diff --git a/lib/raid6/altivec.uc b/lib/raid6/altivec.uc
index b71012b756f4..7cc12b532e95 100644
--- a/lib/raid6/altivec.uc
+++ b/lib/raid6/altivec.uc
@@ -24,13 +24,10 @@
 
 #include <linux/raid/pq.h>
 
-#ifdef CONFIG_ALTIVEC
-
 #include <altivec.h>
 #ifdef __KERNEL__
 # include <asm/cputable.h>
 # include <asm/switch_to.h>
-#endif
 
 /*
  * This is the C data type to use.  We use a vector of
diff --git a/lib/raid6/avx2.c b/lib/raid6/avx2.c
new file mode 100644
index 000000000000..bc3b1dd436eb
--- /dev/null
+++ b/lib/raid6/avx2.c
@@ -0,0 +1,251 @@
+/* -*- linux-c -*- ------------------------------------------------------- *
+ *
+ *   Copyright (C) 2012 Intel Corporation
+ *   Author: Yuanhan Liu <yuanhan.liu@linux.intel.com>
+ *
+ *   Based on sse2.c: Copyright 2002 H. Peter Anvin - All Rights Reserved
+ *
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation, Inc., 53 Temple Place Ste 330,
+ *   Boston MA 02111-1307, USA; either version 2 of the License, or
+ *   (at your option) any later version; incorporated herein by reference.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * AVX2 implementation of RAID-6 syndrome functions
+ *
+ */
+
+#ifdef CONFIG_AS_AVX2
+
+#include <linux/raid/pq.h>
+#include "x86.h"
+
+static const struct raid6_avx2_constants {
+        u64 x1d[4];
+} raid6_avx2_constants __aligned(32) = {
+        { 0x1d1d1d1d1d1d1d1dULL, 0x1d1d1d1d1d1d1d1dULL,
+          0x1d1d1d1d1d1d1d1dULL, 0x1d1d1d1d1d1d1d1dULL,},
+};
+
+static int raid6_have_avx2(void)
+{
+        return boot_cpu_has(X86_FEATURE_AVX2) && boot_cpu_has(X86_FEATURE_AVX);
+}
+
+/*
+ * Plain AVX2 implementation
+ */
+static void raid6_avx21_gen_syndrome(int disks, size_t bytes, void **ptrs)
+{
+        u8 **dptr = (u8 **)ptrs;
+        u8 *p, *q;
+        int d, z, z0;
+
+        z0 = disks - 3;         /* Highest data disk */
+        p = dptr[z0+1];         /* XOR parity */
+        q = dptr[z0+2];         /* RS syndrome */
+
+        kernel_fpu_begin();
+
+        asm volatile("vmovdqa %0,%%ymm0" : : "m" (raid6_avx2_constants.x1d[0]));
+        asm volatile("vpxor %ymm3,%ymm3,%ymm3");        /* Zero temp */
+
+        for (d = 0; d < bytes; d += 32) {
+                asm volatile("prefetchnta %0" : : "m" (dptr[z0][d]));
+                asm volatile("vmovdqa %0,%%ymm2" : : "m" (dptr[z0][d]));/* P[0] */
+                asm volatile("prefetchnta %0" : : "m" (dptr[z0-1][d]));
+                asm volatile("vmovdqa %ymm2,%ymm4");/* Q[0] */
+                asm volatile("vmovdqa %0,%%ymm6" : : "m" (dptr[z0-1][d]));
+                for (z = z0-2; z >= 0; z--) {
+                        asm volatile("prefetchnta %0" : : "m" (dptr[z][d]));
+                        asm volatile("vpcmpgtb %ymm4,%ymm3,%ymm5");
+                        asm volatile("vpaddb %ymm4,%ymm4,%ymm4");
+                        asm volatile("vpand %ymm0,%ymm5,%ymm5");
+                        asm volatile("vpxor %ymm5,%ymm4,%ymm4");
+                        asm volatile("vpxor %ymm6,%ymm2,%ymm2");
+                        asm volatile("vpxor %ymm6,%ymm4,%ymm4");
+                        asm volatile("vmovdqa %0,%%ymm6" : : "m" (dptr[z][d]));
+                }
+                asm volatile("vpcmpgtb %ymm4,%ymm3,%ymm5");
+                asm volatile("vpaddb %ymm4,%ymm4,%ymm4");
+                asm volatile("vpand %ymm0,%ymm5,%ymm5");
+                asm volatile("vpxor %ymm5,%ymm4,%ymm4");
+                asm volatile("vpxor %ymm6,%ymm2,%ymm2");
+                asm volatile("vpxor %ymm6,%ymm4,%ymm4");
+
+                asm volatile("vmovntdq %%ymm2,%0" : "=m" (p[d]));
+                asm volatile("vpxor %ymm2,%ymm2,%ymm2");
+                asm volatile("vmovntdq %%ymm4,%0" : "=m" (q[d]));
+                asm volatile("vpxor %ymm4,%ymm4,%ymm4");
+        }
+
+        asm volatile("sfence" : : : "memory");
+        kernel_fpu_end();
+}
+
+const struct raid6_calls raid6_avx2x1 = {
+        raid6_avx21_gen_syndrome,
+        raid6_have_avx2,
+        "avx2x1",
+        1                       /* Has cache hints */
+};
+
+/*
+ * Unrolled-by-2 AVX2 implementation
+ */
+static void raid6_avx22_gen_syndrome(int disks, size_t bytes, void **ptrs)
+{
+        u8 **dptr = (u8 **)ptrs;
+        u8 *p, *q;
+        int d, z, z0;