litmus-rt.git - The LITMUS^RT kernel.

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author	Nick Piggin <nickpiggin@yahoo.com.au>	2005-08-28 02:49:11 -0400
committer	Linus Torvalds <torvalds@g5.osdl.org>	2005-08-29 20:25:04 -0400
commit	d992895ba2b27cf5adf1ba0ad6d27662adc54c5e (patch)
tree	65a4d1f18a93a9e89d43fe0b8e0b3009675c50f0 /lib/dump_stack.c
parent	40193713df2cdb9c233b3fc2029ecdccb40cb1e4 (diff)

[PATCH] Lazy page table copies in fork()

Defer copying of ptes until fault time when it is possible to reconstruct the pte from backing store. Idea from Andi Kleen and Nick Piggin. Thanks to input from Rik van Riel and Linus and to Hugh for correcting my blundering. Ray Fucillo <fucillo@intersystems.com> reports: "I applied this latest patch to a 2.6.12 kernel and found that it does resolve the problem. Prior to the patch on this machine, I was seeing about 23ms spent in fork for ever 100MB of shared memory segment. After applying the patch, fork is taking about 1ms regardless of the shared memory size." Signed-off-by: Nick Piggin <npiggin@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>

Diffstat (limited to 'lib/dump_stack.c')

0 files changed, 0 insertions, 0 deletions

// SPDX-License-Identifier: GPL-2.0 /* Copyright (c) 2010, Code Aurora Forum. All rights reserved. */ #include <linux/module.h> #include <linux/platform_device.h> #include <linux/pm_runtime.h> #include <linux/usb/chipidea.h> #include <linux/clk.h> #include <linux/reset.h> #include <linux/mfd/syscon.h> #include <linux/regmap.h> #include <linux/io.h> #include <linux/reset-controller.h> #include <linux/extcon.h> #include <linux/of.h> #include "ci.h" #define HS_PHY_AHB_MODE 0x0098 #define HS_PHY_GENCONFIG 0x009c #define HS_PHY_TXFIFO_IDLE_FORCE_DIS BIT(4) #define HS_PHY_GENCONFIG_2 0x00a0 #define HS_PHY_SESS_VLD_CTRL_EN BIT(7) #define HS_PHY_ULPI_TX_PKT_EN_CLR_FIX BIT(19) #define HSPHY_SESS_VLD_CTRL BIT(25) /* Vendor base starts at 0x200 beyond CI base */ #define HS_PHY_CTRL 0x0040 #define HS_PHY_SEC_CTRL 0x0078 #define HS_PHY_DIG_CLAMP_N BIT(16) #define HS_PHY_POR_ASSERT BIT(0) struct ci_hdrc_msm { struct platform_device *ci; struct clk *core_clk; struct clk *iface_clk; struct clk *fs_clk; struct ci_hdrc_platform_data pdata; struct reset_controller_dev rcdev; bool secondary_phy; bool hsic; void __iomem *base; }; static int ci_hdrc_msm_por_reset(struct reset_controller_dev *r, unsigned long id) { struct ci_hdrc_msm *ci_msm = container_of(r, struct ci_hdrc_msm, rcdev); void __iomem *addr = ci_msm->base; u32 val; if (id) addr += HS_PHY_SEC_CTRL; else addr += HS_PHY_CTRL; val = readl_relaxed(addr); val |= HS_PHY_POR_ASSERT; writel(val, addr); /* * wait for minimum 10 microseconds as suggested by manual. * Use a slightly larger value since the exact value didn't * work 100% of the time. */ udelay(12); val &= ~HS_PHY_POR_ASSERT; writel(val, addr); return 0; } static const struct reset_control_ops ci_hdrc_msm_reset_ops = { .reset = ci_hdrc_msm_por_reset, }; static int ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event) { struct device *dev = ci->dev->parent; struct ci_hdrc_msm *msm_ci = dev_get_drvdata(dev); int ret; switch (event) { case CI_HDRC_CONTROLLER_RESET_EVENT: dev_dbg(dev, "CI_HDRC_CONTROLLER_RESET_EVENT received\n"); hw_phymode_configure(ci); if (msm_ci->secondary_phy) { u32 val = readl_relaxed(msm_ci->base + HS_PHY_SEC_CTRL); val |= HS_PHY_DIG_CLAMP_N; writel_relaxed(val, msm_ci->base + HS_PHY_SEC_CTRL); } ret = phy_init(ci->phy); if (ret) return ret; ret = phy_power_on(ci->phy); if (ret) { phy_exit(ci->phy); return ret; } /* use AHB transactor, allow posted data writes */ hw_write_id_reg(ci, HS_PHY_AHB_MODE, 0xffffffff, 0x8); /* workaround for rx buffer collision issue */ hw_write_id_reg(ci, HS_PHY_GENCONFIG, HS_PHY_TXFIFO_IDLE_FORCE_DIS, 0); if (!msm_ci->hsic) hw_write_id_reg(ci, HS_PHY_GENCONFIG_2, HS_PHY_ULPI_TX_PKT_EN_CLR_FIX, 0); if (!IS_ERR(ci->platdata->vbus_extcon.edev)) { hw_write_id_reg(ci, HS_PHY_GENCONFIG_2, HS_PHY_SESS_VLD_CTRL_EN, HS_PHY_SESS_VLD_CTRL_EN); hw_write(ci, OP_USBCMD, HSPHY_SESS_VLD_CTRL, HSPHY_SESS_VLD_CTRL); } break; case CI_HDRC_CONTROLLER_STOPPED_EVENT: dev_dbg(dev, "CI_HDRC_CONTROLLER_STOPPED_EVENT received\n"); phy_power_off(ci->phy); phy_exit(ci->phy); break; default: dev_dbg(dev, "unknown ci_hdrc event\n"); break; } return 0; } static int ci_hdrc_msm_mux_phy(struct ci_hdrc_msm *ci, struct platform_device *pdev)


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