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authorRusty Russell <rusty@rustcorp.com.au>2009-12-17 12:43:24 -0500
committerRusty Russell <rusty@rustcorp.com.au>2009-12-16 20:13:25 -0500
commitcc216b86e51e9ab22265ea9591769c9ee235e1e4 (patch)
tree797a38135c7f4cd95f09f10e9fcc6fa3ce7053c9 /lib/cpu-notifier-error-inject.c
parent6957177f5c3c0e51b9e90a1d7fadb3177a333949 (diff)
cpumask: convert drivers/idle/i7300_idle.c to cpumask_var_t
Fairly simple transformation: 1) cpumask_t -> cpumask_var_t and alloc_cpumask_var/free_cpumask_var (which are a NOOP unless CONFIG_CPUMASK_OFFSTACK=y). 2) cpu_set -> cpumask_set_cpu 3) cpus_weight -> cpumask_weight 4) cpu_clear -> cpumask_clear_cpu Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> To: Andy Henroid <andrew.d.henroid@intel.com>
Diffstat (limited to 'lib/cpu-notifier-error-inject.c')
0 files changed, 0 insertions, 0 deletions
generated by cgit v1.2.2 (git 2.25.0) at 2025-11-27 16:36:05 -0500
282'>282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 <gid> is only meaningful if <cpio_source> is a directory. "squash" forces all files to gid 0. <cpio_source> File list or directory for cpio archive. If <cpio_source> is a .cpio file it will be used as direct input to initramfs. -d Output the default cpio list. All options except -o and -l may be repeated and are interpreted sequentially and immediately. -u and -g states are preserved across <cpio_source> options so an explicit "-u 0 -g 0" is required to reset the root/group mapping. EOF } # awk style field access # $1 - field number; rest is argument string field() { shift $1 ; echo $1 } list_default_initramfs() { # echo usr/kinit/kinit : } default_initramfs() { cat <<-EOF >> ${output} # This is a very simple, default initramfs dir /dev 0755 0 0 nod /dev/console 0600 0 0 c 5 1 dir /root 0700 0 0 # file /kinit usr/kinit/kinit 0755 0 0 # slink /init kinit 0755 0 0 EOF } filetype() { local argv1="$1" # symlink test must come before file test if [ -L "${argv1}" ]; then echo "slink" elif [ -f "${argv1}" ]; then echo "file" elif [ -d "${argv1}" ]; then echo "dir" elif [ -b "${argv1}" -o -c "${argv1}" ]; then echo "nod" elif [ -p "${argv1}" ]; then echo "pipe" elif [ -S "${argv1}" ]; then echo "sock" else echo "invalid" fi return 0 } list_print_mtime() { : } print_mtime() { local my_mtime="0" if [ -e "$1" ]; then my_mtime=$(find "$1" -printf "%T@\n" | sort -r | head -n 1) fi echo "# Last modified: ${my_mtime}" >> ${output} echo "" >> ${output} } list_parse() { if [ -L "$1" ]; then return fi echo "$1" | sed 's/:/\\:/g; s/$/ \\/' } # for each file print a line in following format # <filetype> <name> <path to file> <octal mode> <uid> <gid> # for links, devices etc the format differs. See gen_init_cpio for details parse() { local location="$1" local name="/${location#${srcdir}}" # change '//' into '/' name=$(echo "$name" | sed -e 's://*:/:g') local mode="$2" local uid="$3" local gid="$4" local ftype=$(filetype "${location}") # remap uid/gid to 0 if necessary [ "$root_uid" = "squash" ] && uid=0 || [ "$uid" -eq "$root_uid" ] && uid=0 [ "$root_gid" = "squash" ] && gid=0 || [ "$gid" -eq "$root_gid" ] && gid=0 local str="${mode} ${uid} ${gid}" [ "${ftype}" = "invalid" ] && return 0 [ "${location}" = "${srcdir}" ] && return 0 case "${ftype}" in "file") str="${ftype} ${name} ${location} ${str}" ;; "nod") local dev=`LC_ALL=C ls -l "${location}"` local maj=`field 5 ${dev}` local min=`field 6 ${dev}` maj=${maj%,} [ -b "${location}" ] && dev="b" || dev="c" str="${ftype} ${name} ${str} ${dev} ${maj} ${min}" ;; "slink") local target=`readlink "${location}"` str="${ftype} ${name} ${target} ${str}" ;; *) str="${ftype} ${name} ${str}" ;; esac echo "${str}" >> ${output} return 0 } unknown_option() { printf "ERROR: unknown option \"$arg\"\n" >&2 printf "If the filename validly begins with '-', " >&2 printf "then it must be prefixed\n" >&2 printf "by './' so that it won't be interpreted as an option." >&2 printf "\n" >&2 usage >&2 exit 1 } list_header() { : } header() { printf "\n#####################\n# $1\n" >> ${output} } # process one directory (incl sub-directories) dir_filelist() { ${dep_list}header "$1" srcdir=$(echo "$1" | sed -e 's://*:/:g') dirlist=$(find "${srcdir}" -printf "%p %m %U %G\n" | LANG=C sort) # If $dirlist is only one line, then the directory is empty if [ "$(echo "${dirlist}" | wc -l)" -gt 1 ]; then ${dep_list}print_mtime "$1" echo "${dirlist}" | \ while read x; do ${dep_list}parse ${x} done fi } # if only one file is specified and it is .cpio file then use it direct as fs # if a directory is specified then add all files in given direcotry to fs # if a regular file is specified assume it is in gen_initramfs format input_file() { source="$1" if [ -f "$1" ]; then ${dep_list}header "$1" is_cpio="$(echo "$1" | sed 's/^.*\.cpio\(\..*\)\{0,1\}/cpio/')" if [ $2 -eq 0 -a ${is_cpio} = "cpio" ]; then cpio_file=$1 echo "$1" | grep -q '^.*\.cpio\..*' && is_cpio_compressed="compressed" [ ! -z ${dep_list} ] && echo "$1" return 0 fi if [ -z ${dep_list} ]; then print_mtime "$1" >> ${output} cat "$1" >> ${output} else echo "$1 \\" cat "$1" | while read type dir file perm ; do if [ "$type" = "file" ]; then echo "$file \\"; fi done fi elif [ -d "$1" ]; then dir_filelist "$1" else echo " ${prog}: Cannot open '$1'" >&2 exit 1 fi } prog=$0 root_uid=0 root_gid/* * drivers/net/phy/micrel.c * * Driver for Micrel PHYs * * Author: David J. Choi * * Copyright (c) 2010-2013 Micrel, Inc. * Copyright (c) 2014 Johan Hovold <johan@kernel.org> * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. * * Support : Micrel Phys: * Giga phys: ksz9021, ksz9031 * 100/10 Phys : ksz8001, ksz8721, ksz8737, ksz8041 * ksz8021, ksz8031, ksz8051, * ksz8081, ksz8091, * ksz8061, * Switch : ksz8873, ksz886x */ #include <linux/kernel.h> #include <linux/module.h> #include <linux/phy.h> #include <linux/micrel_phy.h> #include <linux/of.h> #include <linux/clk.h> /* Operation Mode Strap Override */ #define MII_KSZPHY_OMSO 0x16 #define KSZPHY_OMSO_B_CAST_OFF BIT(9) #define KSZPHY_OMSO_NAND_TREE_ON BIT(5) #define KSZPHY_OMSO_RMII_OVERRIDE BIT(1) #define KSZPHY_OMSO_MII_OVERRIDE BIT(0) /* general Interrupt control/status reg in vendor specific block. */ #define MII_KSZPHY_INTCS 0x1B #define KSZPHY_INTCS_JABBER BIT(15) #define KSZPHY_INTCS_RECEIVE_ERR BIT(14) #define KSZPHY_INTCS_PAGE_RECEIVE BIT(13) #define KSZPHY_INTCS_PARELLEL BIT(12) #define KSZPHY_INTCS_LINK_PARTNER_ACK BIT(11) #define KSZPHY_INTCS_LINK_DOWN BIT(10) #define KSZPHY_INTCS_REMOTE_FAULT BIT(9) #define KSZPHY_INTCS_LINK_UP BIT(8) #define KSZPHY_INTCS_ALL (KSZPHY_INTCS_LINK_UP |\ KSZPHY_INTCS_LINK_DOWN) /* PHY Control 1 */ #define MII_KSZPHY_CTRL_1 0x1e /* PHY Control 2 / PHY Control (if no PHY Control 1) */ #define MII_KSZPHY_CTRL_2 0x1f #define MII_KSZPHY_CTRL MII_KSZPHY_CTRL_2 /* bitmap of PHY register to set interrupt mode */ #define KSZPHY_CTRL_INT_ACTIVE_HIGH BIT(9) #define KSZPHY_RMII_REF_CLK_SEL BIT(7) /* Write/read to/from extended registers */ #define MII_KSZPHY_EXTREG 0x0b #define KSZPHY_EXTREG_WRITE 0x8000 #define MII_KSZPHY_EXTREG_WRITE 0x0c #define MII_KSZPHY_EXTREG_READ 0x0d /* Extended registers */ #define MII_KSZPHY_CLK_CONTROL_PAD_SKEW 0x104 #define MII_KSZPHY_RX_DATA_PAD_SKEW 0x105 #define MII_KSZPHY_TX_DATA_PAD_SKEW 0x106 #define PS_TO_REG 200 struct kszphy_hw_stat { const char *string; u8 reg; u8 bits; }; static struct kszphy_hw_stat kszphy_hw_stats[] = { { "phy_receive_errors", 21, 16}, { "phy_idle_errors", 10, 8 }, }; struct kszphy_type { u32 led_mode_reg; u16 interrupt_level_mask; bool has_broadcast_disable; bool has_nand_tree_disable; bool has_rmii_ref_clk_sel; }; struct kszphy_priv { const struct kszphy_type *type; int led_mode; bool rmii_ref_clk_sel; bool rmii_ref_clk_sel_val; u64 stats[ARRAY_SIZE(kszphy_hw_stats)]; }; static const struct kszphy_type ksz8021_type = { .led_mode_reg = MII_KSZPHY_CTRL_2, .has_broadcast_disable = true, .has_nand_tree_disable = true, .has_rmii_ref_clk_sel = true, }; static const struct kszphy_type ksz8041_type = { .led_mode_reg = MII_KSZPHY_CTRL_1, }; static const struct kszphy_type ksz8051_type = { .led_mode_reg = MII_KSZPHY_CTRL_2, .has_nand_tree_disable = true, }; static const struct kszphy_type ksz8081_type = { .led_mode_reg = MII_KSZPHY_CTRL_2, .has_broadcast_disable = true, .has_nand_tree_disable = true, .has_rmii_ref_clk_sel = true, }; static const struct kszphy_type ks8737_type = { .interrupt_level_mask = BIT(14), }; static const struct kszphy_type ksz9021_type = { .interrupt_level_mask = BIT(14), }; static int kszphy_extended_write(struct phy_device *phydev, u32 regnum, u16 val) { phy_write(phydev, MII_KSZPHY_EXTREG, KSZPHY_EXTREG_WRITE | regnum); return phy_write(phydev, MII_KSZPHY_EXTREG_WRITE, val); } static int kszphy_extended_read(struct phy_device *phydev, u32 regnum) { phy_write(phydev, MII_KSZPHY_EXTREG, regnum); return phy_read(phydev, MII_KSZPHY_EXTREG_READ); } static int kszphy_ack_interrupt(struct phy_device *phydev) { /* bit[7..0] int status, which is a read and clear register. */ int rc; rc = phy_read(phydev, MII_KSZPHY_INTCS); return (rc < 0) ? rc : 0; } static int kszphy_config_intr(struct phy_device *phydev) { const struct kszphy_type *type = phydev->drv->driver_data; int temp; u16 mask; if (type && type->interrupt_level_mask) mask = type->interrupt_level_mask; else mask = KSZPHY_CTRL_INT_ACTIVE_HIGH; /* set the interrupt pin active low */ temp = phy_read(phydev, MII_KSZPHY_CTRL); if (temp < 0) return temp; temp &= ~mask; phy_write(phydev, MII_KSZPHY_CTRL, temp); /* enable / disable interrupts */ if (phydev->interrupts == PHY_INTERRUPT_ENABLED) temp = KSZPHY_INTCS_ALL; else temp = 0; return phy_write(phydev, MII_KSZPHY_INTCS, temp); } static int kszphy_rmii_clk_sel(struct phy_device *phydev, bool val) { int ctrl; ctrl = phy_read(phydev, MII_KSZPHY_CTRL); if (ctrl < 0) return ctrl; if (val) ctrl |= KSZPHY_RMII_REF_CLK_SEL; else ctrl &= ~KSZPHY_RMII_REF_CLK_SEL; return phy_write(phydev, MII_KSZPHY_CTRL, ctrl); } static int kszphy_setup_led(struct phy_device *phydev, u32 reg, int val) { int rc, temp, shift; switch (reg) { case MII_KSZPHY_CTRL_1: shift = 14; break; case MII_KSZPHY_CTRL_2: shift = 4; break; default: return -EINVAL; } temp = phy_read(phydev, reg); if (temp < 0) { rc = temp; goto out; } temp &= ~(3 << shift); temp |= val << shift; rc = phy_write(phydev, reg, temp); out: if (rc < 0) phydev_err(phydev, "failed to set led mode\n"); return rc; } /* Disable PHY address 0 as the broadcast address, so that it can be used as a * unique (non-broadcast) address on a shared bus. */ static int kszphy_broadcast_disable(struct phy_device *phydev) { int ret; ret = phy_read(phydev, MII_KSZPHY_OMSO); if (ret < 0) goto out; ret = phy_write(phydev, MII_KSZPHY_OMSO, ret | KSZPHY_OMSO_B_CAST_OFF); out: if (ret) phydev_err(phydev, "failed to disable broadcast address\n"); return ret; } static int kszphy_nand_tree_disable(struct phy_device *phydev) { int ret; ret = phy_read(phydev, MII_KSZPHY_OMSO); if (ret < 0) goto out; if (!(ret & KSZPHY_OMSO_NAND_TREE_ON)) return 0; ret = phy_write(phydev, MII_KSZPHY_OMSO, ret & ~KSZPHY_OMSO_NAND_TREE_ON); out: if (ret) phydev_err(phydev, "failed to disable NAND tree mode\n"); return ret; } static int kszphy_config_init(struct phy_device *phydev) { struct kszphy_priv *priv = phydev->priv; const struct kszphy_type *type; int ret; if (!priv) return 0; type = priv->type; if (type->has_broadcast_disable) kszphy_broadcast_disable(phydev); if (type->has_nand_tree_disable) kszphy_nand_tree_disable(phydev); if (priv->rmii_ref_clk_sel) { ret = kszphy_rmii_clk_sel(phydev, priv->rmii_ref_clk_sel_val); if (ret) { phydev_err(phydev, "failed to set rmii reference clock\n"); return ret; } } if (priv->led_mode >= 0) kszphy_setup_led(phydev, type->led_mode_reg, priv->led_mode); if (phy_interrupt_is_valid(phydev)) { int ctl = phy_read(phydev, MII_BMCR); if (ctl < 0) return ctl; ret = phy_write(phydev, MII_BMCR, ctl & ~BMCR_ANENABLE); if (ret < 0) return ret; } return 0; } static int ksz8041_config_init(struct phy_device *phydev) { struct device_node *of_node = phydev->mdio.dev.of_node; /* Limit supported and advertised modes in fiber mode */ if (of_property_read_bool(of_node, "micrel,fiber-mode")) { phydev->dev_flags |= MICREL_PHY_FXEN; phydev->supported &= SUPPORTED_100baseT_Full | SUPPORTED_100baseT_Half; phydev->supported |= SUPPORTED_FIBRE; phydev->advertising &= ADVERTISED_100baseT_Full | ADVERTISED_100baseT_Half; phydev->advertising |= ADVERTISED_FIBRE; phydev->autoneg = AUTONEG_DISABLE; } return kszphy_config_init(phydev); } static int ksz8041_config_aneg(struct phy_device *phydev) { /* Skip auto-negotiation in fiber mode */ if (phydev->dev_flags & MICREL_PHY_FXEN) { phydev->speed = SPEED_100; return 0; } return genphy_config_aneg(phydev); } static int ksz9021_load_values_from_of(struct phy_device *phydev, const struct device_node *of_node, u16 reg, const char *field1, const char *field2, const char *field3, const char *field4) { int val1 = -1; int val2 = -2; int val3 = -3; int val4 = -4; int newval; int matches = 0; if (!of_property_read_u32(of_node, field1, &val1)) matches++; if (!of_property_read_u32(of_node, field2, &val2)) matches++; if (!of_property_read_u32(of_node, field3, &val3)) matches++; if (!of_property_read_u32(of_node, field4, &val4)) matches++; if (!matches) return 0; if (matches < 4) newval = kszphy_extended_read(phydev, reg); else newval = 0; if (val1 != -1) newval = ((newval & 0xfff0) | ((val1 / PS_TO_REG) & 0xf) << 0); if (val2 != -2) newval = ((newval & 0xff0f) | ((val2 / PS_TO_REG) & 0xf) << 4); if (val3 != -3) newval = ((newval & 0xf0ff) | ((val3 / PS_TO_REG) & 0xf) << 8); if (val4 != -4) newval = ((newval & 0x0fff) | ((val4 / PS_TO_REG) & 0xf) << 12); return kszphy_extended_write(phydev, reg, newval); } static int ksz9021_config_init(struct phy_device *phydev) { const struct device *dev = &phydev->mdio.dev; const struct device_node *of_node = dev->of_node; const struct device *dev_walker; /* The Micrel driver has a deprecated option to place phy OF * properties in the MAC node. Walk up the tree of devices to * find a device with an OF node. */ dev_walker = &phydev->mdio.dev; do { of_node = dev_walker->of_node; dev_walker = dev_walker->parent; } while (!of_node && dev_walker); if (of_node) { ksz9021_load_values_from_of(phydev, of_node, MII_KSZPHY_CLK_CONTROL_PAD_SKEW, "txen-skew-ps", "txc-skew-ps", "rxdv-skew-ps", "rxc-skew-ps"); ksz9021_load_values_from_of(phydev, of_node, MII_KSZPHY_RX_DATA_PAD_SKEW, "rxd0-skew-ps", "rxd1-skew-ps", "rxd2-skew-ps", "rxd3-skew-ps"); ksz9021_load_values_from_of(phydev, of_node, MII_KSZPHY_TX_DATA_PAD_SKEW, "txd0-skew-ps", "txd1-skew-ps", "txd2-skew-ps", "txd3-skew-ps"); } return 0; } #define MII_KSZ9031RN_MMD_CTRL_REG 0x0d #define MII_KSZ9031RN_MMD_REGDATA_REG 0x0e #define OP_DATA 1 #define KSZ9031_PS_TO_REG 60 /* Extended registers */ /* MMD Address 0x0 */ #define MII_KSZ9031RN_FLP_BURST_TX_LO 3 #define MII_KSZ9031RN_FLP_BURST_TX_HI 4 /* MMD Address 0x2 */ #define MII_KSZ9031RN_CONTROL_PAD_SKEW 4 #define MII_KSZ9031RN_RX_DATA_PAD_SKEW 5 #define MII_KSZ9031RN_TX_DATA_PAD_SKEW 6 #define MII_KSZ9031RN_CLK_PAD_SKEW 8 /* MMD Address 0x1C */ #define MII_KSZ9031RN_EDPD 0x23 #define MII_KSZ9031RN_EDPD_ENABLE BIT(0) static int ksz9031_extended_write(struct phy_device *phydev, u8 mode, u32 dev_addr, u32 regnum, u16 val) { phy_write(phydev, MII_KSZ9031RN_MMD_CTRL_REG, dev_addr); phy_write(phydev, MII_KSZ9031RN_MMD_REGDATA_REG, regnum); phy_write(phydev, MII_KSZ9031RN_MMD_CTRL_REG, (mode << 14) | dev_addr); return phy_write(phydev, MII_KSZ9031RN_MMD_REGDATA_REG, val); } static int ksz9031_extended_read(struct phy_device *phydev, u8 mode, u32 dev_addr, u32 regnum) { phy_write(phydev, MII_KSZ9031RN_MMD_CTRL_REG, dev_addr); phy_write(phydev, MII_KSZ9031RN_MMD_REGDATA_REG, regnum); phy_write(phydev, MII_KSZ9031RN_MMD_CTRL_REG, (mode << 14) | dev_addr); return phy_read(phydev, MII_KSZ9031RN_MMD_REGDATA_REG); } static int ksz9031_of_load_skew_values(struct phy_device *phydev, const struct device_node *of_node, u16 reg, size_t field_sz, const char *field[], u8 numfields) { int val[4] = {-1, -2, -3, -4}; int matches = 0; u16 mask; u16 maxval; u16 newval; int i; for (i = 0; i < numfields; i++) if (!of_property_read_u32(of_node, field[i], val + i)) matches++; if (!matches) return 0; if (matches < numfields) newval = ksz9031_extended_read(phydev, OP_DATA, 2, reg); else newval = 0; maxval = (field_sz == 4) ? 0xf : 0x1f; for (i = 0; i < numfields; i++) if (val[i] != -(i + 1)) { mask = 0xffff; mask ^= maxval << (field_sz * i); newval = (newval & mask) | (((val[i] / KSZ9031_PS_TO_REG) & maxval) << (field_sz * i)); } return ksz9031_extended_write(phydev, OP_DATA, 2, reg, newval); } static int ksz9031_center_flp_timing(struct phy_device *phydev) { int result; /* Center KSZ9031RNX FLP timing at 16ms. */ result = ksz9031_extended_write(phydev, OP_DATA, 0, MII_KSZ9031RN_FLP_BURST_TX_HI, 0x0006); result = ksz9031_extended_write(phydev, OP_DATA, 0, MII_KSZ9031RN_FLP_BURST_TX_LO, 0x1A80); if (result) return result; return genphy_restart_aneg(phydev); } /* Enable energy-detect power-down mode */ static int ksz9031_enable_edpd(struct phy_device *phydev) { int reg; reg = ksz9031_extended_read(phydev, OP_DATA, 0x1C, MII_KSZ9031RN_EDPD); if (reg < 0) return reg; return ksz9031_extended_write(phydev, OP_DATA, 0x1C, MII_KSZ9031RN_EDPD, reg | MII_KSZ9031RN_EDPD_ENABLE); } static int ksz9031_config_init(struct phy_device *phydev) { const struct device *dev = &phydev->mdio.dev; const struct device_node *of_node = dev->of_node; static const char *clk_skews[2] = {"rxc-skew-ps", "txc-skew-ps"}; static const char *rx_data_skews[4] = { "rxd0-skew-ps", "rxd1-skew-ps", "rxd2-skew-ps", "rxd3-skew-ps"