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authorRavikiran G Thirumalai <kiran@scalex86.org>2007-05-08 03:29:13 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-05-08 14:15:09 -0400
commite729aa16b168fb202d1a20f936028cb7c2a0278d (patch)
treed0267225ebfadbaa4f55f55c3025597d86ff1c5f /kernel
parent428e6ce023c5890cfecc8ad10335da3f28dbf893 (diff)
Pad irq_desc to internode cacheline size
We noticed a drop in n/w performance due to the irq_desc being cacheline aligned rather than internode aligned. We see 50% of expected performance when two e1000 nics local to two different nodes have consecutive irq descriptors allocated, due to false sharing. Note that this patch does away with cacheline padding for the UP case, as it does not seem useful for UP configurations. Signed-off-by: Ravikiran Thirumalai <kiran@scalex86.org> Signed-off-by: Shai Fultheim <shai@scalex86.org> Cc: "Siddha, Suresh B" <suresh.b.siddha@intel.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'kernel')
-rw-r--r--kernel/irq/handle.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/kernel/irq/handle.c b/kernel/irq/handle.c
index aff1f0fabb0d..515ad40bde15 100644
--- a/kernel/irq/handle.c
+++ b/kernel/irq/handle.c
@@ -48,7 +48,7 @@ handle_bad_irq(unsigned int irq, struct irq_desc *desc)
48 * 48 *
49 * Controller mappings for all interrupt sources: 49 * Controller mappings for all interrupt sources:
50 */ 50 */
51struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned = { 51struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned_in_smp = {
52 [0 ... NR_IRQS-1] = { 52 [0 ... NR_IRQS-1] = {
53 .status = IRQ_DISABLED, 53 .status = IRQ_DISABLED,
54 .chip = &no_irq_chip, 54 .chip = &no_irq_chip,