litmus-rt.git - The LITMUS^RT kernel.

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author	Nicolas Ferre <nicolas.ferre@atmel.com>	2009-06-29 07:11:50 -0400
committer	Russell King <rmk+kernel@arm.linux.org.uk>	2009-06-29 06:19:27 -0400
commit	59c5fe6d848cae8fd51498d17532f5aad3866f98 (patch)
tree	f9975ae202432a8699a86773180b17fbfab73df8 /kernel/workqueue.c
parent	9a24ee03aebc55cec00cc388b6727bff24ed433f (diff)

[ARM] 5562/2: at91: add gpio button support for at91sam9g20ek

This adds input keyboard gpio support on at91sam9g20ek board. It adds button 3 and 4. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Diffstat (limited to 'kernel/workqueue.c')

0 files changed, 0 insertions, 0 deletions

/* * RapidIO register definitions * * Copyright 2005 MontaVista Software, Inc. * Matt Porter <mporter@kernel.crashing.org> * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. */ #ifndef LINUX_RIO_REGS_H #define LINUX_RIO_REGS_H /* * In RapidIO, each device has a 16MB configuration space that is * accessed via maintenance transactions. Portions of configuration * space are standardized and/or reserved. */ #define RIO_MAINT_SPACE_SZ 0x1000000 /* 16MB of RapidIO mainenance space */ #define RIO_DEV_ID_CAR 0x00 /* [I] Device Identity CAR */ #define RIO_DEV_INFO_CAR 0x04 /* [I] Device Information CAR */ #define RIO_ASM_ID_CAR 0x08 /* [I] Assembly Identity CAR */ #define RIO_ASM_ID_MASK 0xffff0000 /* [I] Asm ID Mask */ #define RIO_ASM_VEN_ID_MASK 0x0000ffff /* [I] Asm Vend Mask */ #define RIO_ASM_INFO_CAR 0x0c /* [I] Assembly Information CAR */ #define RIO_ASM_REV_MASK 0xffff0000 /* [I] Asm Rev Mask */ #define RIO_EXT_FTR_PTR_MASK 0x0000ffff /* [I] EF_PTR Mask */ #define RIO_PEF_CAR 0x10 /* [I] Processing Element Features CAR */ #define RIO_PEF_BRIDGE 0x80000000 /* [I] Bridge */ #define RIO_PEF_MEMORY 0x40000000 /* [I] MMIO */ #define RIO_PEF_PROCESSOR 0x20000000 /* [I] Processor */ #define RIO_PEF_SWITCH 0x10000000 /* [I] Switch */ #define RIO_PEF_MULTIPORT 0x08000000 /* [VI, 2.1] Multiport */ #define RIO_PEF_INB_MBOX 0x00f00000 /* [II, <= 1.2] Mailboxes */ #define RIO_PEF_INB_MBOX0 0x00800000 /* [II, <= 1.2] Mailbox 0 */ #define RIO_PEF_INB_MBOX1 0x00400000 /* [II, <= 1.2] Mailbox 1 */ #define RIO_PEF_INB_MBOX2 0x00200000 /* [II, <= 1.2] Mailbox 2 */ #define RIO_PEF_INB_MBOX3 0x00100000 /* [II, <= 1.2] Mailbox 3 */ #define RIO_PEF_INB_DOORBELL 0x00080000 /* [II, <= 1.2] Doorbells */ #define RIO_PEF_EXT_RT 0x00000200 /* [III, 1.3] Extended route table support */ #define RIO_PEF_STD_RT 0x00000100 /* [III, 1.3] Standard route table support */ #define RIO_PEF_CTLS 0x00000010 /* [III] CTLS */ #define RIO_PEF_EXT_FEATURES 0x00000008 /* [I] EFT_PTR valid */ #define RIO_PEF_ADDR_66 0x00000004 /* [I] 66 bits */ #define RIO_PEF_ADDR_50 0x00000002 /* [I] 50 bits */ #define RIO_PEF_ADDR_34 0x00000001 /* [I] 34 bits */ #define RIO_SWP_INFO_CAR 0x14 /* [I] Switch Port Information CAR */ #define RIO_SWP_INFO_PORT_TOTAL_MASK 0x0000ff00 /* [I] Total number of ports */ #define RIO_SWP_INFO_PORT_NUM_MASK 0x000000ff /* [I] Maintenance transaction port number */ #define RIO_GET_TOTAL_PORTS(x) ((x & RIO_SWP_INFO_PORT_TOTAL_MASK) >> 8) #define RIO_GET_PORT_NUM(x) (x & RIO_SWP_INFO_PORT_NUM_MASK) #define RIO_SRC_OPS_CAR 0x18 /* [I] Source Operations CAR */ #define RIO_SRC_OPS_READ 0x00008000 /* [I] Read op */ #define RIO_SRC_OPS_WRITE 0x00004000 /* [I] Write op */ #define RIO_SRC_OPS_STREAM_WRITE 0x00002000 /* [I] Str-write op */ #define RIO_SRC_OPS_WRITE_RESPONSE 0x00001000 /* [I] Write/resp op */ #define RIO_SRC_OPS_DATA_MSG 0x00000800 /* [II] Data msg op */ #define RIO_SRC_OPS_DOORBELL 0x00000400 /* [II] Doorbell op */ #define RIO_SRC_OPS_ATOMIC_TST_SWP 0x00000100 /* [I] Atomic TAS op */ #define RIO_SRC_OPS_ATOMIC_INC 0x00000080 /* [I] Atomic inc op */ #define RIO_SRC_OPS_ATOMIC_DEC 0x00000040 /* [I] Atomic dec op */ #define RIO_SRC_OPS_ATOMIC_SET 0x00000020 /* [I] Atomic set op */ #define RIO_SRC_OPS_ATOMIC_CLR 0x00000010 /* [I] Atomic clr op */ #define RIO_SRC_OPS_PORT_WRITE 0x00000004 /* [I] Port-write op */


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