diff options
author | Robert Richter <robert.richter@amd.com> | 2010-10-25 10:28:14 -0400 |
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committer | Robert Richter <robert.richter@amd.com> | 2010-10-25 10:29:12 -0400 |
commit | dbd1e66e04558a582e673bc4a9cd933ce0228d93 (patch) | |
tree | 85f3633276282cde0a3ac558d988704eaa3e68af /kernel/time/ntp.c | |
parent | 328b8f1ba50b708a1b3c0acd7c41ee1b356822f6 (diff) | |
parent | 4a60cfa9457749f7987fd4f3c956dbba5a281129 (diff) |
Merge commit 'linux-2.6/master' (early part) into oprofile/core
This branch depends on these apic patches:
apic, x86: Use BIOS settings for IBS and MCE threshold interrupt LVT offsets
apic, x86: Check if EILVT APIC registers are available (AMD only)
Signed-off-by: Robert Richter <robert.richter@amd.com>
Diffstat (limited to 'kernel/time/ntp.c')
-rw-r--r-- | kernel/time/ntp.c | 14 |
1 files changed, 11 insertions, 3 deletions
diff --git a/kernel/time/ntp.c b/kernel/time/ntp.c index c63116863a80..d2321891538f 100644 --- a/kernel/time/ntp.c +++ b/kernel/time/ntp.c | |||
@@ -149,10 +149,18 @@ static void ntp_update_offset(long offset) | |||
149 | time_reftime = get_seconds(); | 149 | time_reftime = get_seconds(); |
150 | 150 | ||
151 | offset64 = offset; | 151 | offset64 = offset; |
152 | freq_adj = (offset64 * secs) << | 152 | freq_adj = ntp_update_offset_fll(offset64, secs); |
153 | (NTP_SCALE_SHIFT - 2 * (SHIFT_PLL + 2 + time_constant)); | ||
154 | 153 | ||
155 | freq_adj += ntp_update_offset_fll(offset64, secs); | 154 | /* |
155 | * Clamp update interval to reduce PLL gain with low | ||
156 | * sampling rate (e.g. intermittent network connection) | ||
157 | * to avoid instability. | ||
158 | */ | ||
159 | if (unlikely(secs > 1 << (SHIFT_PLL + 1 + time_constant))) | ||
160 | secs = 1 << (SHIFT_PLL + 1 + time_constant); | ||
161 | |||
162 | freq_adj += (offset64 * secs) << | ||
163 | (NTP_SCALE_SHIFT - 2 * (SHIFT_PLL + 2 + time_constant)); | ||
156 | 164 | ||
157 | freq_adj = min(freq_adj + time_freq, MAXFREQ_SCALED); | 165 | freq_adj = min(freq_adj + time_freq, MAXFREQ_SCALED); |
158 | 166 | ||