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authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2013-06-12 08:24:12 -0400
committerJiri Kosina <jkosina@suse.cz>2013-06-18 07:38:34 -0400
commit37074c5a1b9979d05b9effc7634385fc0fa7ccc4 (patch)
treecf5aaa115e0cc7a318a109024de07c9f53f54258 /kernel/irq
parentadc88ffc405c080956cd9af0538e294ff1368999 (diff)
irq/generic-chip: fix a few kernel-doc entries
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Diffstat (limited to 'kernel/irq')
-rw-r--r--kernel/irq/generic-chip.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/kernel/irq/generic-chip.c b/kernel/irq/generic-chip.c
index c89295a8f668..b34e7267b817 100644
--- a/kernel/irq/generic-chip.c
+++ b/kernel/irq/generic-chip.c
@@ -48,7 +48,7 @@ void irq_gc_mask_disable_reg(struct irq_data *d)
48} 48}
49 49
50/** 50/**
51 * irq_gc_mask_set_mask_bit - Mask chip via setting bit in mask register 51 * irq_gc_mask_set_bit - Mask irq via setting bit in mask register
52 * @d: irq_data 52 * @d: irq_data
53 * 53 *
54 * Chip has a single mask register. Values of this register are cached 54 * Chip has a single mask register. Values of this register are cached
@@ -66,7 +66,7 @@ void irq_gc_mask_set_bit(struct irq_data *d)
66} 66}
67 67
68/** 68/**
69 * irq_gc_mask_set_mask_bit - Mask chip via clearing bit in mask register 69 * irq_gc_mask_clr_bit - Mask chip via clearing bit in mask register
70 * @d: irq_data 70 * @d: irq_data
71 * 71 *
72 * Chip has a single mask register. Values of this register are cached 72 * Chip has a single mask register. Values of this register are cached
@@ -130,7 +130,7 @@ void irq_gc_ack_clr_bit(struct irq_data *d)
130} 130}
131 131
132/** 132/**
133 * irq_gc_mask_disable_reg_and_ack- Mask and ack pending interrupt 133 * irq_gc_mask_disable_reg_and_ack - Mask and ack pending interrupt
134 * @d: irq_data 134 * @d: irq_data
135 */ 135 */
136void irq_gc_mask_disable_reg_and_ack(struct irq_data *d) 136void irq_gc_mask_disable_reg_and_ack(struct irq_data *d)