litmus-rt.git - The LITMUS^RT kernel.

diff options

author	Linus Torvalds <torvalds@woody.linux-foundation.org>	2007-11-09 18:28:11 -0500
committer	Linus Torvalds <torvalds@woody.linux-foundation.org>	2007-11-09 18:28:11 -0500
commit	8fc543c8f004fc9dfe0a262dc452dfe2eca4589b (patch)
tree	b14a215ffe0f8c594ac517257855a681ba6b7b79 /kernel/cgroup_debug.c
parent	a70a93229943c177f0062490b4f8e44be4cef685 (diff)
parent	7f6ff62a8f3a4e68258958196098c6f71563ae61 (diff)

Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6

* 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6: [IA64] IOSAPIC bogus error cleanup [IA64] Update printing of feature set bits [IA64] Fix IOSAPIC delivery mode setting [IA64] XPC heartbeat timer function must run on CPU 0 [IA64] Clean up /proc/interrupts output [IA64] Disable/re-enable CPE interrupts on Altix [IA64] Clean-up McKinley Errata message [IA64] Add gate.lds to list of files ignored by Git [IA64] Fix section mismatch in contig.c version of per_cpu_init() [IA64] Wrong args to memset in efi_gettimeofday() [IA64] Remove duplicate includes from ia32priv.h [IA64] fix number of bytes zeroed by sys_fw_init() in arch/ia64/hp/sim/boot/fw-emu.c [IA64] Fix perfmon sysctl directory modes

Diffstat (limited to 'kernel/cgroup_debug.c')

0 files changed, 0 insertions, 0 deletions

/* * linux/arch/arm/mach-sa1100/assabet.c * * Author: Nicolas Pitre * * This file contains all Assabet-specific tweaks. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #include <linux/init.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/errno.h> #include <linux/ioport.h> #include <linux/platform_data/sa11x0-serial.h> #include <linux/serial_core.h> #include <linux/platform_device.h> #include <linux/mfd/ucb1x00.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> #include <linux/delay.h> #include <linux/mm.h> #include <linux/leds.h> #include <linux/slab.h> #include <video/sa1100fb.h> #include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/setup.h> #include <asm/page.h> #include <asm/pgtable-hwdef.h> #include <asm/pgtable.h> #include <asm/tlbflush.h> #include <asm/mach/arch.h> #include <asm/mach/flash.h> #include <asm/mach/irda.h> #include <asm/mach/map.h> #include <mach/assabet.h> #include <linux/platform_data/mfd-mcp-sa11x0.h> #include <mach/irqs.h> #include "generic.h" #define ASSABET_BCR_DB1110 \ (ASSABET_BCR_SPK_OFF | \ ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \ ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \ ASSABET_BCR_IRDA_MD0) #define ASSABET_BCR_DB1111 \ (ASSABET_BCR_SPK_OFF | \ ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \ ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \ ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \ ASSABET_BCR_IRDA_MD0 | ASSABET_BCR_CF_RST) unsigned long SCR_value = ASSABET_SCR_INIT; EXPORT_SYMBOL(SCR_value); static unsigned long BCR_value = ASSABET_BCR_DB1110; void ASSABET_BCR_frob(unsigned int mask, unsigned int val) { unsigned long flags; local_irq_save(flags); BCR_value = (BCR_value & ~mask) | val; ASSABET_BCR = BCR_value; local_irq_restore(flags); } EXPORT_SYMBOL(ASSABET_BCR_frob); static void assabet_ucb1x00_reset(enum ucb1x00_reset state) { if (state == UCB_RST_PROBE) ASSABET_BCR_set(ASSABET_BCR_CODEC_RST); } /* * Assabet flash support code. */ #ifdef ASSABET_REV_4 /* * Phase 4 Assabet has two 28F160B3 flash parts in bank 0: */ static struct mtd_partition assabet_partitions[] = { { .name = "bootloader", .size = 0x00020000, .offset = 0, .mask_flags = MTD_WRITEABLE, }, { .name = "bootloader params", .size = 0x00020000, .offset = MTDPART_OFS_APPEND, .mask_flags = MTD_WRITEABLE, }, { .name = "jffs", .size = MTDPART_SIZ_FULL, .offset = MTDPART_OFS_APPEND, } }; #else /* * Phase 5 Assabet has two 28F128J3A flash parts in bank 0: */ static struct mtd_partition assabet_partitions[] = { { .name = "bootloader", .size = 0x00040000, .offset = 0, .mask_flags = MTD_WRITEABLE, }, { .name = "bootloader params", .size = 0x00040000, .offset = MTDPART_OFS_APPEND, .mask_flags = MTD_WRITEABLE, }, { .name = "jffs", .size = MTDPART_SIZ_FULL, .offset = MTDPART_OFS_APPEND, } }; #endif static struct flash_platform_data assabet_flash_data = { .map_name = "cfi_probe", .parts = assabet_partitions, .nr_parts = ARRAY_SIZE(assabet_partitions), }; static struct resource assabet_flash_resources[] = { DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M), DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M), }; /* * Assabet IrDA support code. */ static int assabet_irda_set_power(struct device *dev, unsigned int state) { static unsigned int bcr_state[4] = { ASSABET_BCR_IRDA_MD0, ASSABET_BCR_IRDA_MD1|ASSABET_BCR_IRDA_MD0, ASSABET_BCR_IRDA_MD1, 0 }; if (state < 4) { state = bcr_state[state]; ASSABET_BCR_clear(state ^ (ASSABET_BCR_IRDA_MD1| ASSABET_BCR_IRDA_MD0)); ASSABET_BCR_set(state); } return 0; } static void assabet_irda_set_speed(struct device *dev, unsigned int speed) { if (speed < 4000000) ASSABET_BCR_clear(ASSABET_BCR_IRDA_FSEL); else ASSABET_BCR_set(ASSABET_BCR_IRDA_FSEL); } static struct irda_platform_data assabet_irda_data = { .set_power = assabet_irda_set_power, .set_speed = assabet_irda_set_speed, }; static struct ucb1x00_plat_data assabet_ucb1x00_data = { .reset = assabet_ucb1x00_reset, .gpio_base = -1, }; static struct mcp_plat_data assabet_mcp_data = { .mccr0 = MCCR0_ADM, .sclk_rate = 11981000, .codec_pdata = &assabet_ucb1x00_data, }; static void assabet_lcd_set_visual(u32 visual) { u_int is_true_color = visual == FB_VISUAL_TRUECOLOR; if (machine_is_assabet()) { #if 1 // phase 4 or newer Assabet's if (is_true_color) ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB); else ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB); #else // older Assabet's if (is_true_color) ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB); else ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB); #endif } } #ifndef ASSABET_PAL_VIDEO static void assabet_lcd_backlight_power(int on) { if (on) ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON); else ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON); } /* * Turn on/off the backlight. When turning the backlight on, we wait * 500us after turning it on so we don't cause the supplies to droop * when we enable the LCD controller (and cause a hard reset.) */ static void assabet_lcd_power(int on) { if (on) { ASSABET_BCR_set(ASSABET_BCR_LCD_ON); udelay(500); } else ASSABET_BCR_clear(ASSABET_BCR_LCD_ON); } /* * The assabet uses a sharp LQ039Q2DS54 LCD module. It is actually * takes an RGB666 signal, but we provide it with an RGB565 signal * instead (def_rgb_16). */ static struct sa1100fb_mach_info lq039q2ds54_info = { .pixclock = 171521, .bpp = 16, .xres = 320, .yres = 240, .hsync_len = 5, .vsync_len = 1, .left_margin = 61, .upper_margin = 3, .right_margin = 9, .lower_margin = 0, .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2), .backlight_power = assabet_lcd_backlight_power, .lcd_power = assabet_lcd_power, .set_visual = assabet_lcd_set_visual, }; #else static void assabet_pal_backlight_power(int on) { ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON); } static void assabet_pal_power(int on) { ASSABET_BCR_clear(ASSABET_BCR_LCD_ON); } static struct sa1100fb_mach_info pal_info = { .pixclock = 67797, .bpp = 16, .xres = 640, .yres = 512, .hsync_len = 64, .vsync_len = 6, .left_margin = 125, .upper_margin = 70, .right_margin = 115, .lower_margin = 36, .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512), .backlight_power = assabet_pal_backlight_power, .lcd_power = assabet_pal_power, .set_visual = assabet_lcd_set_visual, }; #endif #ifdef CONFIG_ASSABET_NEPONSET static struct resource neponset_resources[] = { DEFINE_RES_MEM(0x10000000, 0x08000000), DEFINE_RES_MEM(0x18000000, 0x04000000), DEFINE_RES_MEM(0x40000000, SZ_8K), DEFINE_RES_IRQ(IRQ_GPIO25), }; #endif static void __init assabet_init(void) { /* * Ensure that the power supply is in "high power" mode. */ GPSR = GPIO_GPIO16; GPDR |= GPIO_GPIO16; /* * Ensure that these pins are set as outputs and are driving * logic 0. This ensures that we won't inadvertently toggle * the WS latch in the CPLD, and we don't float causing * excessive power drain. --rmk */ GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM; GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM; /* * Also set GPIO27 as an output; this is used to clock UART3 * via the FPGA and as otherwise has no pullups or pulldowns, * so stop it floating. */ GPCR = GPIO_GPIO27; GPDR |= GPIO_GPIO27; /* * Set up registers for sleep mode. */ PWER = PWER_GPIO0; PGSR = 0; PCFR = 0; PSDR = 0; PPDR |= PPC_TXD3 | PPC_TXD1; PPSR |= PPC_TXD3 | PPC_TXD1; sa11x0_ppc_configure_mcp(); if (machine_has_neponset()) { /* * Angel sets this, but other bootloaders may not. * * This must precede any driver calls to BCR_set() * or BCR_clear(). */ ASSABET_BCR = BCR_value = ASSABET_BCR_DB1111; #ifndef CONFIG_ASSABET_NEPONSET printk( "Warning: Neponset detected but full support " "hasn't been configured in the kernel\n" ); #else platform_device_register_simple("neponset", 0, neponset_resources, ARRAY_SIZE(neponset_resources)); #endif } #ifndef ASSABET_PAL_VIDEO sa11x0_register_lcd(&lq039q2ds54_info); #else sa11x0_register_lcd(&pal_video); #endif sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources, ARRAY_SIZE(assabet_flash_resources)); sa11x0_register_irda(&assabet_irda_data); sa11x0_register_mcp(&assabet_mcp_data); } /* * On Assabet, we must probe for the Neponset board _before_ * paging_init() has occurred to actually determine the amount * of RAM available. To do so, we map the appropriate IO section * in the page table here in order to access GPIO registers. */ static void __init map_sa1100_gpio_regs( void ) { unsigned long phys = __PREG(GPLR) & PMD_MASK; unsigned long virt = (unsigned long)io_p2v(phys); int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO); pmd_t *pmd; pmd = pmd_offset(pud_offset(pgd_offset_k(virt), virt), virt); *pmd = __pmd(phys | prot); flush_pmd_entry(pmd); } /* * Read System Configuration "Register" * (taken from "Intel StrongARM SA-1110 Microprocessor Development Board * User's Guide", section 4.4.1) * * This same scan is performed in arch/arm/boot/compressed/head-sa1100.S * to set up the serial port for decompression status messages. We * repeat it here because the kernel may not be loaded as a zImage, and * also because it's a hassle to communicate the SCR value to the kernel * from the decompressor. * * Note that IRQs are guaranteed to be disabled. */ static void __init get_assabet_scr(void) { unsigned long uninitialized_var(scr), i; GPDR |= 0x3fc; /* Configure GPIO 9:2 as outputs */ GPSR = 0x3fc; /* Write 0xFF to GPIO 9:2 */ GPDR &= ~(0x3fc); /* Configure GPIO 9:2 as inputs */ for(i = 100; i--; ) /* Read GPIO 9:2 */ scr = GPLR; GPDR |= 0x3fc; /* restore correct pin direction */ scr &= 0x3fc; /* save as system configuration byte. */ SCR_value = scr; } static void __init fixup_assabet(struct tag *tags, char **cmdline, struct meminfo *mi) { /* This must be done before any call to machine_has_neponset() */ map_sa1100_gpio_regs(); get_assabet_scr(); if (machine_has_neponset()) printk("Neponset expansion board detected\n"); } static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate) { if (port->mapbase == _Ser1UTCR0) { if (state) ASSABET_BCR_clear(ASSABET_BCR_RS232EN | ASSABET_BCR_COM_RTS | ASSABET_BCR_COM_DTR); else ASSABET_BCR_set(ASSABET_BCR_RS232EN | ASSABET_BCR_COM_RTS | ASSABET_BCR_COM_DTR); } }


context:
space:
mode: