aboutsummaryrefslogtreecommitdiffstats
path: root/include
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2011-03-17 12:11:39 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2011-03-17 12:11:39 -0400
commit40c7f2112ce18fa5eb6dc209c50dd0f046790191 (patch)
tree2da6636f3a1d005902d3f2afb533cb6acafce606 /include
parentb04d0a90908cdb733e490486287e1ba8c568ffb0 (diff)
parentc87a8d8dcd2587c203f3dd8a3c5c15d1e128ec0d (diff)
Merge branch 'drm-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (177 commits) drm/radeon: fixup refcounts in radeon dumb create ioctl. drm: radeon: *_cs_packet_parse_vline() cleanup radeon: merge list_del()/list_add_tail() to list_move_tail() drm: Retry i2c transfer of EDID block after failure drm/radeon/kms: fix typo in atom overscan setup drm: Hold the mode mutex whilst probing for sysfs status drm/nouveau: fix __nouveau_fence_wait performance drm/nv40: attempt to reserve just enough vram for all 32 channels drm/nv50: check for vm traps on every gr irq drm/nv50: decode vm faults some more drm/nouveau: add nouveau_enum_find() util function drm/nouveau: properly handle pushbuffer check failures drm/nvc0: remove vm hack forcing large/small pages to not share a PDE drm/i915: disable opregion lid detection for now. drm/i915: Only wait on a pending flip if we intend to write to the buffer drm/i915/dp: Sanity check eDP existence drm: add cap bit to denote if dumb ioctl is available or not. drm/core: add ioctl to query device/driver capabilities drm/radeon/kms: allow max clock of 340 Mhz on hdmi 1.3+ drm/radeon/kms: add cayman pci ids ...
Diffstat (limited to 'include')
-rw-r--r--include/drm/Kbuild1
-rw-r--r--include/drm/drm.h13
-rw-r--r--include/drm/drmP.h122
-rw-r--r--include/drm/drm_crtc.h13
-rw-r--r--include/drm/drm_hashtab.h6
-rw-r--r--include/drm/drm_mm.h49
-rw-r--r--include/drm/drm_mode.h29
-rw-r--r--include/drm/drm_pciids.h14
-rw-r--r--include/drm/drm_usb.h15
-rw-r--r--include/drm/i830_drm.h342
-rw-r--r--include/drm/i915_drm.h1
-rw-r--r--include/drm/nouveau_drm.h1
-rw-r--r--include/drm/radeon_drm.h1
-rw-r--r--include/drm/ttm/ttm_bo_driver.h6
-rw-r--r--include/drm/ttm/ttm_page_alloc.h8
15 files changed, 200 insertions, 421 deletions
diff --git a/include/drm/Kbuild b/include/drm/Kbuild
index ffec177f3481..3a60ac889520 100644
--- a/include/drm/Kbuild
+++ b/include/drm/Kbuild
@@ -2,7 +2,6 @@ header-y += drm.h
2header-y += drm_mode.h 2header-y += drm_mode.h
3header-y += drm_sarea.h 3header-y += drm_sarea.h
4header-y += i810_drm.h 4header-y += i810_drm.h
5header-y += i830_drm.h
6header-y += i915_drm.h 5header-y += i915_drm.h
7header-y += mga_drm.h 6header-y += mga_drm.h
8header-y += nouveau_drm.h 7header-y += nouveau_drm.h
diff --git a/include/drm/drm.h b/include/drm/drm.h
index e5f70617dec5..9ac431396176 100644
--- a/include/drm/drm.h
+++ b/include/drm/drm.h
@@ -608,6 +608,12 @@ struct drm_gem_open {
608 __u64 size; 608 __u64 size;
609}; 609};
610 610
611/** DRM_IOCTL_GET_CAP ioctl argument type */
612struct drm_get_cap {
613 __u64 capability;
614 __u64 value;
615};
616
611#include "drm_mode.h" 617#include "drm_mode.h"
612 618
613#define DRM_IOCTL_BASE 'd' 619#define DRM_IOCTL_BASE 'd'
@@ -628,6 +634,7 @@ struct drm_gem_open {
628#define DRM_IOCTL_GEM_CLOSE DRM_IOW (0x09, struct drm_gem_close) 634#define DRM_IOCTL_GEM_CLOSE DRM_IOW (0x09, struct drm_gem_close)
629#define DRM_IOCTL_GEM_FLINK DRM_IOWR(0x0a, struct drm_gem_flink) 635#define DRM_IOCTL_GEM_FLINK DRM_IOWR(0x0a, struct drm_gem_flink)
630#define DRM_IOCTL_GEM_OPEN DRM_IOWR(0x0b, struct drm_gem_open) 636#define DRM_IOCTL_GEM_OPEN DRM_IOWR(0x0b, struct drm_gem_open)
637#define DRM_IOCTL_GET_CAP DRM_IOWR(0x0c, struct drm_get_cap)
631 638
632#define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique) 639#define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique)
633#define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth) 640#define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth)
@@ -701,6 +708,10 @@ struct drm_gem_open {
701#define DRM_IOCTL_MODE_PAGE_FLIP DRM_IOWR(0xB0, struct drm_mode_crtc_page_flip) 708#define DRM_IOCTL_MODE_PAGE_FLIP DRM_IOWR(0xB0, struct drm_mode_crtc_page_flip)
702#define DRM_IOCTL_MODE_DIRTYFB DRM_IOWR(0xB1, struct drm_mode_fb_dirty_cmd) 709#define DRM_IOCTL_MODE_DIRTYFB DRM_IOWR(0xB1, struct drm_mode_fb_dirty_cmd)
703 710
711#define DRM_IOCTL_MODE_CREATE_DUMB DRM_IOWR(0xB2, struct drm_mode_create_dumb)
712#define DRM_IOCTL_MODE_MAP_DUMB DRM_IOWR(0xB3, struct drm_mode_map_dumb)
713#define DRM_IOCTL_MODE_DESTROY_DUMB DRM_IOWR(0xB4, struct drm_mode_destroy_dumb)
714
704/** 715/**
705 * Device specific ioctls should only be in their respective headers 716 * Device specific ioctls should only be in their respective headers
706 * The device specific ioctl range is from 0x40 to 0x99. 717 * The device specific ioctl range is from 0x40 to 0x99.
@@ -741,6 +752,8 @@ struct drm_event_vblank {
741 __u32 reserved; 752 __u32 reserved;
742}; 753};
743 754
755#define DRM_CAP_DUMB_BUFFER 0x1
756
744/* typedef area */ 757/* typedef area */
745#ifndef __KERNEL__ 758#ifndef __KERNEL__
746typedef struct drm_clip_rect drm_clip_rect_t; 759typedef struct drm_clip_rect drm_clip_rect_t;
diff --git a/include/drm/drmP.h b/include/drm/drmP.h
index 348843b80150..ad5770f2315c 100644
--- a/include/drm/drmP.h
+++ b/include/drm/drmP.h
@@ -145,7 +145,10 @@ extern void drm_ut_debug_printk(unsigned int request_level,
145#define DRIVER_IRQ_VBL2 0x800 145#define DRIVER_IRQ_VBL2 0x800
146#define DRIVER_GEM 0x1000 146#define DRIVER_GEM 0x1000
147#define DRIVER_MODESET 0x2000 147#define DRIVER_MODESET 0x2000
148#define DRIVER_USE_PLATFORM_DEVICE 0x4000 148
149#define DRIVER_BUS_PCI 0x1
150#define DRIVER_BUS_PLATFORM 0x2
151#define DRIVER_BUS_USB 0x3
149 152
150/***********************************************************************/ 153/***********************************************************************/
151/** \name Begin the DRM... */ 154/** \name Begin the DRM... */
@@ -698,6 +701,19 @@ struct drm_master {
698#define DRM_SCANOUTPOS_INVBL (1 << 1) 701#define DRM_SCANOUTPOS_INVBL (1 << 1)
699#define DRM_SCANOUTPOS_ACCURATE (1 << 2) 702#define DRM_SCANOUTPOS_ACCURATE (1 << 2)
700 703
704struct drm_bus {
705 int bus_type;
706 int (*get_irq)(struct drm_device *dev);
707 const char *(*get_name)(struct drm_device *dev);
708 int (*set_busid)(struct drm_device *dev, struct drm_master *master);
709 int (*set_unique)(struct drm_device *dev, struct drm_master *master,
710 struct drm_unique *unique);
711 int (*irq_by_busid)(struct drm_device *dev, struct drm_irq_busid *p);
712 /* hooks that are for PCI */
713 int (*agp_init)(struct drm_device *dev);
714
715};
716
701/** 717/**
702 * DRM driver structure. This structure represent the common code for 718 * DRM driver structure. This structure represent the common code for
703 * a family of cards. There will one drm_device for each card present 719 * a family of cards. There will one drm_device for each card present
@@ -880,6 +896,17 @@ struct drm_driver {
880 /* vga arb irq handler */ 896 /* vga arb irq handler */
881 void (*vgaarb_irq)(struct drm_device *dev, bool state); 897 void (*vgaarb_irq)(struct drm_device *dev, bool state);
882 898
899 /* dumb alloc support */
900 int (*dumb_create)(struct drm_file *file_priv,
901 struct drm_device *dev,
902 struct drm_mode_create_dumb *args);
903 int (*dumb_map_offset)(struct drm_file *file_priv,
904 struct drm_device *dev, uint32_t handle,
905 uint64_t *offset);
906 int (*dumb_destroy)(struct drm_file *file_priv,
907 struct drm_device *dev,
908 uint32_t handle);
909
883 /* Driver private ops for this object */ 910 /* Driver private ops for this object */
884 struct vm_operations_struct *gem_vm_ops; 911 struct vm_operations_struct *gem_vm_ops;
885 912
@@ -895,8 +922,13 @@ struct drm_driver {
895 struct drm_ioctl_desc *ioctls; 922 struct drm_ioctl_desc *ioctls;
896 int num_ioctls; 923 int num_ioctls;
897 struct file_operations fops; 924 struct file_operations fops;
898 struct pci_driver pci_driver; 925 union {
899 struct platform_device *platform_device; 926 struct pci_driver *pci;
927 struct platform_device *platform_device;
928 struct usb_driver *usb;
929 } kdriver;
930 struct drm_bus *bus;
931
900 /* List of devices hanging off this driver */ 932 /* List of devices hanging off this driver */
901 struct list_head device_list; 933 struct list_head device_list;
902}; 934};
@@ -1099,6 +1131,7 @@ struct drm_device {
1099#endif 1131#endif
1100 1132
1101 struct platform_device *platformdev; /**< Platform device struture */ 1133 struct platform_device *platformdev; /**< Platform device struture */
1134 struct usb_device *usbdev;
1102 1135
1103 struct drm_sg_mem *sg; /**< Scatter gather memory */ 1136 struct drm_sg_mem *sg; /**< Scatter gather memory */
1104 unsigned int num_crtcs; /**< Number of CRTCs on this device */ 1137 unsigned int num_crtcs; /**< Number of CRTCs on this device */
@@ -1136,28 +1169,9 @@ static __inline__ int drm_core_check_feature(struct drm_device *dev,
1136 1169
1137static inline int drm_dev_to_irq(struct drm_device *dev) 1170static inline int drm_dev_to_irq(struct drm_device *dev)
1138{ 1171{
1139 if (drm_core_check_feature(dev, DRIVER_USE_PLATFORM_DEVICE)) 1172 return dev->driver->bus->get_irq(dev);
1140 return platform_get_irq(dev->platformdev, 0);
1141 else
1142 return dev->pdev->irq;
1143} 1173}
1144 1174
1145static inline int drm_get_pci_domain(struct drm_device *dev)
1146{
1147 if (drm_core_check_feature(dev, DRIVER_USE_PLATFORM_DEVICE))
1148 return 0;
1149
1150#ifndef __alpha__
1151 /* For historical reasons, drm_get_pci_domain() is busticated
1152 * on most archs and has to remain so for userspace interface
1153 * < 1.4, except on alpha which was right from the beginning
1154 */
1155 if (dev->if_version < 0x10004)
1156 return 0;
1157#endif /* __alpha__ */
1158
1159 return pci_domain_nr(dev->pdev->bus);
1160}
1161 1175
1162#if __OS_HAS_AGP 1176#if __OS_HAS_AGP
1163static inline int drm_core_has_AGP(struct drm_device *dev) 1177static inline int drm_core_has_AGP(struct drm_device *dev)
@@ -1211,8 +1225,6 @@ static inline int drm_mtrr_del(int handle, unsigned long offset,
1211/*@{*/ 1225/*@{*/
1212 1226
1213 /* Driver support (drm_drv.h) */ 1227 /* Driver support (drm_drv.h) */
1214extern int drm_init(struct drm_driver *driver);
1215extern void drm_exit(struct drm_driver *driver);
1216extern long drm_ioctl(struct file *filp, 1228extern long drm_ioctl(struct file *filp,
1217 unsigned int cmd, unsigned long arg); 1229 unsigned int cmd, unsigned long arg);
1218extern long drm_compat_ioctl(struct file *filp, 1230extern long drm_compat_ioctl(struct file *filp,
@@ -1264,6 +1276,8 @@ extern int drm_getclient(struct drm_device *dev, void *data,
1264 struct drm_file *file_priv); 1276 struct drm_file *file_priv);
1265extern int drm_getstats(struct drm_device *dev, void *data, 1277extern int drm_getstats(struct drm_device *dev, void *data,
1266 struct drm_file *file_priv); 1278 struct drm_file *file_priv);
1279extern int drm_getcap(struct drm_device *dev, void *data,
1280 struct drm_file *file_priv);
1267extern int drm_setversion(struct drm_device *dev, void *data, 1281extern int drm_setversion(struct drm_device *dev, void *data,
1268 struct drm_file *file_priv); 1282 struct drm_file *file_priv);
1269extern int drm_noop(struct drm_device *dev, void *data, 1283extern int drm_noop(struct drm_device *dev, void *data,
@@ -1422,11 +1436,7 @@ extern int drm_dropmaster_ioctl(struct drm_device *dev, void *data,
1422struct drm_master *drm_master_create(struct drm_minor *minor); 1436struct drm_master *drm_master_create(struct drm_minor *minor);
1423extern struct drm_master *drm_master_get(struct drm_master *master); 1437extern struct drm_master *drm_master_get(struct drm_master *master);
1424extern void drm_master_put(struct drm_master **master); 1438extern void drm_master_put(struct drm_master **master);
1425extern int drm_get_pci_dev(struct pci_dev *pdev, 1439
1426 const struct pci_device_id *ent,
1427 struct drm_driver *driver);
1428extern int drm_get_platform_dev(struct platform_device *pdev,
1429 struct drm_driver *driver);
1430extern void drm_put_dev(struct drm_device *dev); 1440extern void drm_put_dev(struct drm_device *dev);
1431extern int drm_put_minor(struct drm_minor **minor); 1441extern int drm_put_minor(struct drm_minor **minor);
1432extern unsigned int drm_debug; 1442extern unsigned int drm_debug;
@@ -1544,6 +1554,7 @@ drm_gem_object_unreference_unlocked(struct drm_gem_object *obj)
1544int drm_gem_handle_create(struct drm_file *file_priv, 1554int drm_gem_handle_create(struct drm_file *file_priv,
1545 struct drm_gem_object *obj, 1555 struct drm_gem_object *obj,
1546 u32 *handlep); 1556 u32 *handlep);
1557int drm_gem_handle_delete(struct drm_file *filp, u32 handle);
1547 1558
1548static inline void 1559static inline void
1549drm_gem_object_handle_reference(struct drm_gem_object *obj) 1560drm_gem_object_handle_reference(struct drm_gem_object *obj)
@@ -1616,11 +1627,21 @@ static __inline__ struct drm_local_map *drm_core_findmap(struct drm_device *dev,
1616 return NULL; 1627 return NULL;
1617} 1628}
1618 1629
1619static __inline__ int drm_device_is_agp(struct drm_device *dev) 1630static __inline__ void drm_core_dropmap(struct drm_local_map *map)
1620{ 1631{
1621 if (drm_core_check_feature(dev, DRIVER_USE_PLATFORM_DEVICE)) 1632}
1622 return 0;
1623 1633
1634#include "drm_mem_util.h"
1635
1636extern int drm_fill_in_dev(struct drm_device *dev,
1637 const struct pci_device_id *ent,
1638 struct drm_driver *driver);
1639int drm_get_minor(struct drm_device *dev, struct drm_minor **minor, int type);
1640/*@}*/
1641
1642/* PCI section */
1643static __inline__ int drm_pci_device_is_agp(struct drm_device *dev)
1644{
1624 if (dev->driver->device_is_agp != NULL) { 1645 if (dev->driver->device_is_agp != NULL) {
1625 int err = (*dev->driver->device_is_agp) (dev); 1646 int err = (*dev->driver->device_is_agp) (dev);
1626 1647
@@ -1632,35 +1653,26 @@ static __inline__ int drm_device_is_agp(struct drm_device *dev)
1632 return pci_find_capability(dev->pdev, PCI_CAP_ID_AGP); 1653 return pci_find_capability(dev->pdev, PCI_CAP_ID_AGP);
1633} 1654}
1634 1655
1635static __inline__ int drm_device_is_pcie(struct drm_device *dev)
1636{
1637 if (drm_core_check_feature(dev, DRIVER_USE_PLATFORM_DEVICE))
1638 return 0;
1639 else
1640 return pci_find_capability(dev->pdev, PCI_CAP_ID_EXP);
1641}
1642 1656
1643static __inline__ void drm_core_dropmap(struct drm_local_map *map) 1657static __inline__ int drm_pci_device_is_pcie(struct drm_device *dev)
1644{ 1658{
1659 return pci_find_capability(dev->pdev, PCI_CAP_ID_EXP);
1645} 1660}
1646 1661
1647#include "drm_mem_util.h"
1648
1649static inline void *drm_get_device(struct drm_device *dev)
1650{
1651 if (drm_core_check_feature(dev, DRIVER_USE_PLATFORM_DEVICE))
1652 return dev->platformdev;
1653 else
1654 return dev->pdev;
1655}
1656 1662
1657extern int drm_platform_init(struct drm_driver *driver); 1663extern int drm_pci_init(struct drm_driver *driver, struct pci_driver *pdriver);
1658extern int drm_pci_init(struct drm_driver *driver); 1664extern void drm_pci_exit(struct drm_driver *driver, struct pci_driver *pdriver);
1659extern int drm_fill_in_dev(struct drm_device *dev, 1665extern int drm_get_pci_dev(struct pci_dev *pdev,
1660 const struct pci_device_id *ent, 1666 const struct pci_device_id *ent,
1661 struct drm_driver *driver); 1667 struct drm_driver *driver);
1662int drm_get_minor(struct drm_device *dev, struct drm_minor **minor, int type); 1668
1663/*@}*/ 1669
1670/* platform section */
1671extern int drm_platform_init(struct drm_driver *driver, struct platform_device *platform_device);
1672extern void drm_platform_exit(struct drm_driver *driver, struct platform_device *platform_device);
1673
1674extern int drm_get_platform_dev(struct platform_device *pdev,
1675 struct drm_driver *driver);
1664 1676
1665#endif /* __KERNEL__ */ 1677#endif /* __KERNEL__ */
1666#endif 1678#endif
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index 801be59f4f15..60edf9be31e5 100644
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -659,7 +659,7 @@ extern int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid
659extern void drm_mode_probed_add(struct drm_connector *connector, struct drm_display_mode *mode); 659extern void drm_mode_probed_add(struct drm_connector *connector, struct drm_display_mode *mode);
660extern void drm_mode_remove(struct drm_connector *connector, struct drm_display_mode *mode); 660extern void drm_mode_remove(struct drm_connector *connector, struct drm_display_mode *mode);
661extern struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev, 661extern struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev,
662 struct drm_display_mode *mode); 662 const struct drm_display_mode *mode);
663extern void drm_mode_debug_printmodeline(struct drm_display_mode *mode); 663extern void drm_mode_debug_printmodeline(struct drm_display_mode *mode);
664extern void drm_mode_config_init(struct drm_device *dev); 664extern void drm_mode_config_init(struct drm_device *dev);
665extern void drm_mode_config_reset(struct drm_device *dev); 665extern void drm_mode_config_reset(struct drm_device *dev);
@@ -685,8 +685,8 @@ extern void drm_mode_validate_size(struct drm_device *dev,
685extern void drm_mode_prune_invalid(struct drm_device *dev, 685extern void drm_mode_prune_invalid(struct drm_device *dev,
686 struct list_head *mode_list, bool verbose); 686 struct list_head *mode_list, bool verbose);
687extern void drm_mode_sort(struct list_head *mode_list); 687extern void drm_mode_sort(struct list_head *mode_list);
688extern int drm_mode_hsync(struct drm_display_mode *mode); 688extern int drm_mode_hsync(const struct drm_display_mode *mode);
689extern int drm_mode_vrefresh(struct drm_display_mode *mode); 689extern int drm_mode_vrefresh(const struct drm_display_mode *mode);
690extern void drm_mode_set_crtcinfo(struct drm_display_mode *p, 690extern void drm_mode_set_crtcinfo(struct drm_display_mode *p,
691 int adjust_flags); 691 int adjust_flags);
692extern void drm_mode_connector_list_update(struct drm_connector *connector); 692extern void drm_mode_connector_list_update(struct drm_connector *connector);
@@ -798,4 +798,11 @@ extern int drm_add_modes_noedid(struct drm_connector *connector,
798extern bool drm_edid_is_valid(struct edid *edid); 798extern bool drm_edid_is_valid(struct edid *edid);
799struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev, 799struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
800 int hsize, int vsize, int fresh); 800 int hsize, int vsize, int fresh);
801
802extern int drm_mode_create_dumb_ioctl(struct drm_device *dev,
803 void *data, struct drm_file *file_priv);
804extern int drm_mode_mmap_dumb_ioctl(struct drm_device *dev,
805 void *data, struct drm_file *file_priv);
806extern int drm_mode_destroy_dumb_ioctl(struct drm_device *dev,
807 void *data, struct drm_file *file_priv);
801#endif /* __DRM_CRTC_H__ */ 808#endif /* __DRM_CRTC_H__ */
diff --git a/include/drm/drm_hashtab.h b/include/drm/drm_hashtab.h
index 0af087a4d3b3..3650d5d011ee 100644
--- a/include/drm/drm_hashtab.h
+++ b/include/drm/drm_hashtab.h
@@ -45,14 +45,10 @@ struct drm_hash_item {
45}; 45};
46 46
47struct drm_open_hash { 47struct drm_open_hash {
48 unsigned int size;
49 unsigned int order;
50 unsigned int fill;
51 struct hlist_head *table; 48 struct hlist_head *table;
52 int use_vmalloc; 49 u8 order;
53}; 50};
54 51
55
56extern int drm_ht_create(struct drm_open_hash *ht, unsigned int order); 52extern int drm_ht_create(struct drm_open_hash *ht, unsigned int order);
57extern int drm_ht_insert_item(struct drm_open_hash *ht, struct drm_hash_item *item); 53extern int drm_ht_insert_item(struct drm_open_hash *ht, struct drm_hash_item *item);
58extern int drm_ht_just_insert_please(struct drm_open_hash *ht, struct drm_hash_item *item, 54extern int drm_ht_just_insert_please(struct drm_open_hash *ht, struct drm_hash_item *item,
diff --git a/include/drm/drm_mm.h b/include/drm/drm_mm.h
index e39177778601..b1e7809e5e15 100644
--- a/include/drm/drm_mm.h
+++ b/include/drm/drm_mm.h
@@ -42,23 +42,25 @@
42#endif 42#endif
43 43
44struct drm_mm_node { 44struct drm_mm_node {
45 struct list_head free_stack;
46 struct list_head node_list; 45 struct list_head node_list;
47 unsigned free : 1; 46 struct list_head hole_stack;
47 unsigned hole_follows : 1;
48 unsigned scanned_block : 1; 48 unsigned scanned_block : 1;
49 unsigned scanned_prev_free : 1; 49 unsigned scanned_prev_free : 1;
50 unsigned scanned_next_free : 1; 50 unsigned scanned_next_free : 1;
51 unsigned scanned_preceeds_hole : 1;
52 unsigned allocated : 1;
51 unsigned long start; 53 unsigned long start;
52 unsigned long size; 54 unsigned long size;
53 struct drm_mm *mm; 55 struct drm_mm *mm;
54}; 56};
55 57
56struct drm_mm { 58struct drm_mm {
57 /* List of free memory blocks, most recently freed ordered. */ 59 /* List of all memory nodes that immediatly preceed a free hole. */
58 struct list_head free_stack; 60 struct list_head hole_stack;
59 /* List of all memory nodes, ordered according to the (increasing) start 61 /* head_node.node_list is the list of all memory nodes, ordered
60 * address of the memory node. */ 62 * according to the (increasing) start address of the memory node. */
61 struct list_head node_list; 63 struct drm_mm_node head_node;
62 struct list_head unused_nodes; 64 struct list_head unused_nodes;
63 int num_unused; 65 int num_unused;
64 spinlock_t unused_lock; 66 spinlock_t unused_lock;
@@ -70,8 +72,28 @@ struct drm_mm {
70 unsigned scanned_blocks; 72 unsigned scanned_blocks;
71 unsigned long scan_start; 73 unsigned long scan_start;
72 unsigned long scan_end; 74 unsigned long scan_end;
75 struct drm_mm_node *prev_scanned_node;
73}; 76};
74 77
78static inline bool drm_mm_node_allocated(struct drm_mm_node *node)
79{
80 return node->allocated;
81}
82
83static inline bool drm_mm_initialized(struct drm_mm *mm)
84{
85 return mm->hole_stack.next;
86}
87#define drm_mm_for_each_node(entry, mm) list_for_each_entry(entry, \
88 &(mm)->head_node.node_list, \
89 node_list);
90#define drm_mm_for_each_scanned_node_reverse(entry, n, mm) \
91 for (entry = (mm)->prev_scanned_node, \
92 next = entry ? list_entry(entry->node_list.next, \
93 struct drm_mm_node, node_list) : NULL; \
94 entry != NULL; entry = next, \
95 next = entry ? list_entry(entry->node_list.next, \
96 struct drm_mm_node, node_list) : NULL) \
75/* 97/*
76 * Basic range manager support (drm_mm.c) 98 * Basic range manager support (drm_mm.c)
77 */ 99 */
@@ -118,7 +140,15 @@ static inline struct drm_mm_node *drm_mm_get_block_atomic_range(
118 return drm_mm_get_block_range_generic(parent, size, alignment, 140 return drm_mm_get_block_range_generic(parent, size, alignment,
119 start, end, 1); 141 start, end, 1);
120} 142}
143extern int drm_mm_insert_node(struct drm_mm *mm, struct drm_mm_node *node,
144 unsigned long size, unsigned alignment);
145extern int drm_mm_insert_node_in_range(struct drm_mm *mm,
146 struct drm_mm_node *node,
147 unsigned long size, unsigned alignment,
148 unsigned long start, unsigned long end);
121extern void drm_mm_put_block(struct drm_mm_node *cur); 149extern void drm_mm_put_block(struct drm_mm_node *cur);
150extern void drm_mm_remove_node(struct drm_mm_node *node);
151extern void drm_mm_replace_node(struct drm_mm_node *old, struct drm_mm_node *new);
122extern struct drm_mm_node *drm_mm_search_free(const struct drm_mm *mm, 152extern struct drm_mm_node *drm_mm_search_free(const struct drm_mm *mm,
123 unsigned long size, 153 unsigned long size,
124 unsigned alignment, 154 unsigned alignment,
@@ -134,11 +164,6 @@ extern int drm_mm_init(struct drm_mm *mm, unsigned long start,
134 unsigned long size); 164 unsigned long size);
135extern void drm_mm_takedown(struct drm_mm *mm); 165extern void drm_mm_takedown(struct drm_mm *mm);
136extern int drm_mm_clean(struct drm_mm *mm); 166extern int drm_mm_clean(struct drm_mm *mm);
137extern unsigned long drm_mm_tail_space(struct drm_mm *mm);
138extern int drm_mm_remove_space_from_tail(struct drm_mm *mm,
139 unsigned long size);
140extern int drm_mm_add_space_to_tail(struct drm_mm *mm,
141 unsigned long size, int atomic);
142extern int drm_mm_pre_get(struct drm_mm *mm); 167extern int drm_mm_pre_get(struct drm_mm *mm);
143 168
144static inline struct drm_mm *drm_get_mm(struct drm_mm_node *block) 169static inline struct drm_mm *drm_get_mm(struct drm_mm_node *block)
diff --git a/include/drm/drm_mode.h b/include/drm/drm_mode.h
index 0fc7397c8f1f..ae6b7a3dbec7 100644
--- a/include/drm/drm_mode.h
+++ b/include/drm/drm_mode.h
@@ -344,4 +344,33 @@ struct drm_mode_crtc_page_flip {
344 __u64 user_data; 344 __u64 user_data;
345}; 345};
346 346
347/* create a dumb scanout buffer */
348struct drm_mode_create_dumb {
349 uint32_t height;
350 uint32_t width;
351 uint32_t bpp;
352 uint32_t flags;
353 /* handle, pitch, size will be returned */
354 uint32_t handle;
355 uint32_t pitch;
356 uint64_t size;
357};
358
359/* set up for mmap of a dumb scanout buffer */
360struct drm_mode_map_dumb {
361 /** Handle for the object being mapped. */
362 __u32 handle;
363 __u32 pad;
364 /**
365 * Fake offset to use for subsequent mmap call
366 *
367 * This is a fixed-size type for 32/64 compatibility.
368 */
369 __u64 offset;
370};
371
372struct drm_mode_destroy_dumb {
373 uint32_t handle;
374};
375
347#endif 376#endif
diff --git a/include/drm/drm_pciids.h b/include/drm/drm_pciids.h
index 5ff1194dc2ea..820ee9029482 100644
--- a/include/drm/drm_pciids.h
+++ b/include/drm/drm_pciids.h
@@ -141,6 +141,20 @@
141 {0x1002, 0x5e4c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ 141 {0x1002, 0x5e4c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \
142 {0x1002, 0x5e4d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ 142 {0x1002, 0x5e4d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \
143 {0x1002, 0x5e4f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ 143 {0x1002, 0x5e4f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \
144 {0x1002, 0x6700, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \
145 {0x1002, 0x6701, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \
146 {0x1002, 0x6702, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \
147 {0x1002, 0x6703, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \
148 {0x1002, 0x6704, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \
149 {0x1002, 0x6705, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \
150 {0x1002, 0x6706, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \
151 {0x1002, 0x6707, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \
152 {0x1002, 0x6708, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \
153 {0x1002, 0x6709, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \
154 {0x1002, 0x6718, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \
155 {0x1002, 0x6719, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \
156 {0x1002, 0x671c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \
157 {0x1002, 0x671d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \
144 {0x1002, 0x6720, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ 158 {0x1002, 0x6720, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
145 {0x1002, 0x6721, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ 159 {0x1002, 0x6721, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
146 {0x1002, 0x6722, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_NEW_MEMMAP}, \ 160 {0x1002, 0x6722, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_NEW_MEMMAP}, \
diff --git a/include/drm/drm_usb.h b/include/drm/drm_usb.h
new file mode 100644
index 000000000000..33506c11da8b
--- /dev/null
+++ b/include/drm/drm_usb.h
@@ -0,0 +1,15 @@
1#ifndef DRM_USB_H
2#define DRM_USB_H
3
4#include <drmP.h>
5
6#include <linux/usb.h>
7
8extern int drm_usb_init(struct drm_driver *driver, struct usb_driver *udriver);
9extern void drm_usb_exit(struct drm_driver *driver, struct usb_driver *udriver);
10
11int drm_get_usb_dev(struct usb_interface *interface,
12 const struct usb_device_id *id,
13 struct drm_driver *driver);
14
15#endif
diff --git a/include/drm/i830_drm.h b/include/drm/i830_drm.h
deleted file mode 100644
index 61315c29b8f3..000000000000
--- a/include/drm/i830_drm.h
+++ /dev/null
@@ -1,342 +0,0 @@
1#ifndef _I830_DRM_H_
2#define _I830_DRM_H_
3
4/* WARNING: These defines must be the same as what the Xserver uses.
5 * if you change them, you must change the defines in the Xserver.
6 *
7 * KW: Actually, you can't ever change them because doing so would
8 * break backwards compatibility.
9 */
10
11#ifndef _I830_DEFINES_
12#define _I830_DEFINES_
13
14#define I830_DMA_BUF_ORDER 12
15#define I830_DMA_BUF_SZ (1<<I830_DMA_BUF_ORDER)
16#define I830_DMA_BUF_NR 256
17#define I830_NR_SAREA_CLIPRECTS 8
18
19/* Each region is a minimum of 64k, and there are at most 64 of them.
20 */
21#define I830_NR_TEX_REGIONS 64
22#define I830_LOG_MIN_TEX_REGION_SIZE 16
23
24/* KW: These aren't correct but someone set them to two and then
25 * released the module. Now we can't change them as doing so would
26 * break backwards compatibility.
27 */
28#define I830_TEXTURE_COUNT 2
29#define I830_TEXBLEND_COUNT I830_TEXTURE_COUNT
30
31#define I830_TEXBLEND_SIZE 12 /* (4 args + op) * 2 + COLOR_FACTOR */
32
33#define I830_UPLOAD_CTX 0x1
34#define I830_UPLOAD_BUFFERS 0x2
35#define I830_UPLOAD_CLIPRECTS 0x4
36#define I830_UPLOAD_TEX0_IMAGE 0x100 /* handled clientside */
37#define I830_UPLOAD_TEX0_CUBE 0x200 /* handled clientside */
38#define I830_UPLOAD_TEX1_IMAGE 0x400 /* handled clientside */
39#define I830_UPLOAD_TEX1_CUBE 0x800 /* handled clientside */
40#define I830_UPLOAD_TEX2_IMAGE 0x1000 /* handled clientside */
41#define I830_UPLOAD_TEX2_CUBE 0x2000 /* handled clientside */
42#define I830_UPLOAD_TEX3_IMAGE 0x4000 /* handled clientside */
43#define I830_UPLOAD_TEX3_CUBE 0x8000 /* handled clientside */
44#define I830_UPLOAD_TEX_N_IMAGE(n) (0x100 << (n * 2))
45#define I830_UPLOAD_TEX_N_CUBE(n) (0x200 << (n * 2))
46#define I830_UPLOAD_TEXIMAGE_MASK 0xff00
47#define I830_UPLOAD_TEX0 0x10000
48#define I830_UPLOAD_TEX1 0x20000
49#define I830_UPLOAD_TEX2 0x40000
50#define I830_UPLOAD_TEX3 0x80000
51#define I830_UPLOAD_TEX_N(n) (0x10000 << (n))
52#define I830_UPLOAD_TEX_MASK 0xf0000
53#define I830_UPLOAD_TEXBLEND0 0x100000
54#define I830_UPLOAD_TEXBLEND1 0x200000
55#define I830_UPLOAD_TEXBLEND2 0x400000
56#define I830_UPLOAD_TEXBLEND3 0x800000
57#define I830_UPLOAD_TEXBLEND_N(n) (0x100000 << (n))
58#define I830_UPLOAD_TEXBLEND_MASK 0xf00000
59#define I830_UPLOAD_TEX_PALETTE_N(n) (0x1000000 << (n))
60#define I830_UPLOAD_TEX_PALETTE_SHARED 0x4000000
61#define I830_UPLOAD_STIPPLE 0x8000000
62
63/* Indices into buf.Setup where various bits of state are mirrored per
64 * context and per buffer. These can be fired at the card as a unit,
65 * or in a piecewise fashion as required.
66 */
67
68/* Destbuffer state
69 * - backbuffer linear offset and pitch -- invarient in the current dri
70 * - zbuffer linear offset and pitch -- also invarient
71 * - drawing origin in back and depth buffers.
72 *
73 * Keep the depth/back buffer state here to accommodate private buffers
74 * in the future.
75 */
76
77#define I830_DESTREG_CBUFADDR 0
78#define I830_DESTREG_DBUFADDR 1
79#define I830_DESTREG_DV0 2
80#define I830_DESTREG_DV1 3
81#define I830_DESTREG_SENABLE 4
82#define I830_DESTREG_SR0 5
83#define I830_DESTREG_SR1 6
84#define I830_DESTREG_SR2 7
85#define I830_DESTREG_DR0 8
86#define I830_DESTREG_DR1 9
87#define I830_DESTREG_DR2 10
88#define I830_DESTREG_DR3 11
89#define I830_DESTREG_DR4 12
90#define I830_DEST_SETUP_SIZE 13
91
92/* Context state
93 */
94#define I830_CTXREG_STATE1 0
95#define I830_CTXREG_STATE2 1
96#define I830_CTXREG_STATE3 2
97#define I830_CTXREG_STATE4 3
98#define I830_CTXREG_STATE5 4
99#define I830_CTXREG_IALPHAB 5
100#define I830_CTXREG_STENCILTST 6
101#define I830_CTXREG_ENABLES_1 7
102#define I830_CTXREG_ENABLES_2 8
103#define I830_CTXREG_AA 9
104#define I830_CTXREG_FOGCOLOR 10
105#define I830_CTXREG_BLENDCOLR0 11
106#define I830_CTXREG_BLENDCOLR 12 /* Dword 1 of 2 dword command */
107#define I830_CTXREG_VF 13
108#define I830_CTXREG_VF2 14
109#define I830_CTXREG_MCSB0 15
110#define I830_CTXREG_MCSB1 16
111#define I830_CTX_SETUP_SIZE 17
112
113/* 1.3: Stipple state
114 */
115#define I830_STPREG_ST0 0
116#define I830_STPREG_ST1 1
117#define I830_STP_SETUP_SIZE 2
118
119/* Texture state (per tex unit)
120 */
121
122#define I830_TEXREG_MI0 0 /* GFX_OP_MAP_INFO (6 dwords) */
123#define I830_TEXREG_MI1 1
124#define I830_TEXREG_MI2 2
125#define I830_TEXREG_MI3 3
126#define I830_TEXREG_MI4 4
127#define I830_TEXREG_MI5 5
128#define I830_TEXREG_MF 6 /* GFX_OP_MAP_FILTER */
129#define I830_TEXREG_MLC 7 /* GFX_OP_MAP_LOD_CTL */
130#define I830_TEXREG_MLL 8 /* GFX_OP_MAP_LOD_LIMITS */
131#define I830_TEXREG_MCS 9 /* GFX_OP_MAP_COORD_SETS */
132#define I830_TEX_SETUP_SIZE 10
133
134#define I830_TEXREG_TM0LI 0 /* load immediate 2 texture map n */
135#define I830_TEXREG_TM0S0 1
136#define I830_TEXREG_TM0S1 2
137#define I830_TEXREG_TM0S2 3
138#define I830_TEXREG_TM0S3 4
139#define I830_TEXREG_TM0S4 5
140#define I830_TEXREG_NOP0 6 /* noop */
141#define I830_TEXREG_NOP1 7 /* noop */
142#define I830_TEXREG_NOP2 8 /* noop */
143#define __I830_TEXREG_MCS 9 /* GFX_OP_MAP_COORD_SETS -- shared */
144#define __I830_TEX_SETUP_SIZE 10
145
146#define I830_FRONT 0x1
147#define I830_BACK 0x2
148#define I830_DEPTH 0x4
149
150#endif /* _I830_DEFINES_ */
151
152typedef struct _drm_i830_init {
153 enum {
154 I830_INIT_DMA = 0x01,
155 I830_CLEANUP_DMA = 0x02
156 } func;
157 unsigned int mmio_offset;
158 unsigned int buffers_offset;
159 int sarea_priv_offset;
160 unsigned int ring_start;
161 unsigned int ring_end;
162 unsigned int ring_size;
163 unsigned int front_offset;
164 unsigned int back_offset;
165 unsigned int depth_offset;
166 unsigned int w;
167 unsigned int h;
168 unsigned int pitch;
169 unsigned int pitch_bits;
170 unsigned int back_pitch;
171 unsigned int depth_pitch;
172 unsigned int cpp;
173} drm_i830_init_t;
174
175/* Warning: If you change the SAREA structure you must change the Xserver
176 * structure as well */
177
178typedef struct _drm_i830_tex_region {
179 unsigned char next, prev; /* indices to form a circular LRU */
180 unsigned char in_use; /* owned by a client, or free? */
181 int age; /* tracked by clients to update local LRU's */
182} drm_i830_tex_region_t;
183
184typedef struct _drm_i830_sarea {
185 unsigned int ContextState[I830_CTX_SETUP_SIZE];
186 unsigned int BufferState[I830_DEST_SETUP_SIZE];
187 unsigned int TexState[I830_TEXTURE_COUNT][I830_TEX_SETUP_SIZE];
188 unsigned int TexBlendState[I830_TEXBLEND_COUNT][I830_TEXBLEND_SIZE];
189 unsigned int TexBlendStateWordsUsed[I830_TEXBLEND_COUNT];
190 unsigned int Palette[2][256];
191 unsigned int dirty;
192
193 unsigned int nbox;
194 struct drm_clip_rect boxes[I830_NR_SAREA_CLIPRECTS];
195
196 /* Maintain an LRU of contiguous regions of texture space. If
197 * you think you own a region of texture memory, and it has an
198 * age different to the one you set, then you are mistaken and
199 * it has been stolen by another client. If global texAge
200 * hasn't changed, there is no need to walk the list.
201 *
202 * These regions can be used as a proxy for the fine-grained
203 * texture information of other clients - by maintaining them
204 * in the same lru which is used to age their own textures,
205 * clients have an approximate lru for the whole of global
206 * texture space, and can make informed decisions as to which
207 * areas to kick out. There is no need to choose whether to
208 * kick out your own texture or someone else's - simply eject
209 * them all in LRU order.
210 */
211
212 drm_i830_tex_region_t texList[I830_NR_TEX_REGIONS + 1];
213 /* Last elt is sentinal */
214 int texAge; /* last time texture was uploaded */
215 int last_enqueue; /* last time a buffer was enqueued */
216 int last_dispatch; /* age of the most recently dispatched buffer */
217 int last_quiescent; /* */
218 int ctxOwner; /* last context to upload state */
219
220 int vertex_prim;
221
222 int pf_enabled; /* is pageflipping allowed? */
223 int pf_active;
224 int pf_current_page; /* which buffer is being displayed? */
225
226 int perf_boxes; /* performance boxes to be displayed */
227
228 /* Here's the state for texunits 2,3:
229 */
230 unsigned int TexState2[I830_TEX_SETUP_SIZE];
231 unsigned int TexBlendState2[I830_TEXBLEND_SIZE];
232 unsigned int TexBlendStateWordsUsed2;
233
234 unsigned int TexState3[I830_TEX_SETUP_SIZE];
235 unsigned int TexBlendState3[I830_TEXBLEND_SIZE];
236 unsigned int TexBlendStateWordsUsed3;
237
238 unsigned int StippleState[I830_STP_SETUP_SIZE];
239} drm_i830_sarea_t;
240
241/* Flags for perf_boxes
242 */
243#define I830_BOX_RING_EMPTY 0x1 /* populated by kernel */
244#define I830_BOX_FLIP 0x2 /* populated by kernel */
245#define I830_BOX_WAIT 0x4 /* populated by kernel & client */
246#define I830_BOX_TEXTURE_LOAD 0x8 /* populated by kernel */
247#define I830_BOX_LOST_CONTEXT 0x10 /* populated by client */
248
249/* I830 specific ioctls
250 * The device specific ioctl range is 0x40 to 0x79.
251 */
252#define DRM_I830_INIT 0x00
253#define DRM_I830_VERTEX 0x01
254#define DRM_I830_CLEAR 0x02
255#define DRM_I830_FLUSH 0x03
256#define DRM_I830_GETAGE 0x04
257#define DRM_I830_GETBUF 0x05
258#define DRM_I830_SWAP 0x06
259#define DRM_I830_COPY 0x07
260#define DRM_I830_DOCOPY 0x08
261#define DRM_I830_FLIP 0x09
262#define DRM_I830_IRQ_EMIT 0x0a
263#define DRM_I830_IRQ_WAIT 0x0b
264#define DRM_I830_GETPARAM 0x0c
265#define DRM_I830_SETPARAM 0x0d
266
267#define DRM_IOCTL_I830_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I830_INIT, drm_i830_init_t)
268#define DRM_IOCTL_I830_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_I830_VERTEX, drm_i830_vertex_t)
269#define DRM_IOCTL_I830_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_I830_CLEAR, drm_i830_clear_t)
270#define DRM_IOCTL_I830_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I830_FLUSH)
271#define DRM_IOCTL_I830_GETAGE DRM_IO ( DRM_COMMAND_BASE + DRM_I830_GETAGE)
272#define DRM_IOCTL_I830_GETBUF DRM_IOWR(DRM_COMMAND_BASE + DRM_I830_GETBUF, drm_i830_dma_t)
273#define DRM_IOCTL_I830_SWAP DRM_IO ( DRM_COMMAND_BASE + DRM_I830_SWAP)
274#define DRM_IOCTL_I830_COPY DRM_IOW( DRM_COMMAND_BASE + DRM_I830_COPY, drm_i830_copy_t)
275#define DRM_IOCTL_I830_DOCOPY DRM_IO ( DRM_COMMAND_BASE + DRM_I830_DOCOPY)
276#define DRM_IOCTL_I830_FLIP DRM_IO ( DRM_COMMAND_BASE + DRM_I830_FLIP)
277#define DRM_IOCTL_I830_IRQ_EMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_I830_IRQ_EMIT, drm_i830_irq_emit_t)
278#define DRM_IOCTL_I830_IRQ_WAIT DRM_IOW( DRM_COMMAND_BASE + DRM_I830_IRQ_WAIT, drm_i830_irq_wait_t)
279#define DRM_IOCTL_I830_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_I830_GETPARAM, drm_i830_getparam_t)
280#define DRM_IOCTL_I830_SETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_I830_SETPARAM, drm_i830_setparam_t)
281
282typedef struct _drm_i830_clear {
283 int clear_color;
284 int clear_depth;
285 int flags;
286 unsigned int clear_colormask;
287 unsigned int clear_depthmask;
288} drm_i830_clear_t;
289
290/* These may be placeholders if we have more cliprects than
291 * I830_NR_SAREA_CLIPRECTS. In that case, the client sets discard to
292 * false, indicating that the buffer will be dispatched again with a
293 * new set of cliprects.
294 */
295typedef struct _drm_i830_vertex {
296 int idx; /* buffer index */
297 int used; /* nr bytes in use */
298 int discard; /* client is finished with the buffer? */
299} drm_i830_vertex_t;
300
301typedef struct _drm_i830_copy_t {
302 int idx; /* buffer index */
303 int used; /* nr bytes in use */
304 void __user *address; /* Address to copy from */
305} drm_i830_copy_t;
306
307typedef struct drm_i830_dma {
308 void __user *virtual;
309 int request_idx;
310 int request_size;
311 int granted;
312} drm_i830_dma_t;
313
314/* 1.3: Userspace can request & wait on irq's:
315 */
316typedef struct drm_i830_irq_emit {
317 int __user *irq_seq;
318} drm_i830_irq_emit_t;
319
320typedef struct drm_i830_irq_wait {
321 int irq_seq;
322} drm_i830_irq_wait_t;
323
324/* 1.3: New ioctl to query kernel params:
325 */
326#define I830_PARAM_IRQ_ACTIVE 1
327
328typedef struct drm_i830_getparam {
329 int param;
330 int __user *value;
331} drm_i830_getparam_t;
332
333/* 1.3: New ioctl to set kernel params:
334 */
335#define I830_SETPARAM_USE_MI_BATCHBUFFER_START 1
336
337typedef struct drm_i830_setparam {
338 int param;
339 int value;
340} drm_i830_setparam_t;
341
342#endif /* _I830_DRM_H_ */
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index 0039f1f97ad8..c4d6dbfa3ff4 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -290,6 +290,7 @@ typedef struct drm_i915_irq_wait {
290#define I915_PARAM_HAS_RELAXED_FENCING 12 290#define I915_PARAM_HAS_RELAXED_FENCING 12
291#define I915_PARAM_HAS_COHERENT_RINGS 13 291#define I915_PARAM_HAS_COHERENT_RINGS 13
292#define I915_PARAM_HAS_EXEC_CONSTANTS 14 292#define I915_PARAM_HAS_EXEC_CONSTANTS 14
293#define I915_PARAM_HAS_RELAXED_DELTA 15
293 294
294typedef struct drm_i915_getparam { 295typedef struct drm_i915_getparam {
295 int param; 296 int param;
diff --git a/include/drm/nouveau_drm.h b/include/drm/nouveau_drm.h
index e2cfe80f6fca..5edd3a76fffa 100644
--- a/include/drm/nouveau_drm.h
+++ b/include/drm/nouveau_drm.h
@@ -94,6 +94,7 @@ struct drm_nouveau_setparam {
94#define NOUVEAU_GEM_DOMAIN_GART (1 << 2) 94#define NOUVEAU_GEM_DOMAIN_GART (1 << 2)
95#define NOUVEAU_GEM_DOMAIN_MAPPABLE (1 << 3) 95#define NOUVEAU_GEM_DOMAIN_MAPPABLE (1 << 3)
96 96
97#define NOUVEAU_GEM_TILE_COMP 0x00030000 /* nv50-only */
97#define NOUVEAU_GEM_TILE_LAYOUT_MASK 0x0000ff00 98#define NOUVEAU_GEM_TILE_LAYOUT_MASK 0x0000ff00
98#define NOUVEAU_GEM_TILE_16BPP 0x00000001 99#define NOUVEAU_GEM_TILE_16BPP 0x00000001
99#define NOUVEAU_GEM_TILE_32BPP 0x00000002 100#define NOUVEAU_GEM_TILE_32BPP 0x00000002
diff --git a/include/drm/radeon_drm.h b/include/drm/radeon_drm.h
index e5c607a02d57..3dec41cf8342 100644
--- a/include/drm/radeon_drm.h
+++ b/include/drm/radeon_drm.h
@@ -908,6 +908,7 @@ struct drm_radeon_cs {
908#define RADEON_INFO_WANT_HYPERZ 0x07 908#define RADEON_INFO_WANT_HYPERZ 0x07
909#define RADEON_INFO_WANT_CMASK 0x08 /* get access to CMASK on r300 */ 909#define RADEON_INFO_WANT_CMASK 0x08 /* get access to CMASK on r300 */
910#define RADEON_INFO_CLOCK_CRYSTAL_FREQ 0x09 /* clock crystal frequency */ 910#define RADEON_INFO_CLOCK_CRYSTAL_FREQ 0x09 /* clock crystal frequency */
911#define RADEON_INFO_NUM_BACKENDS 0x0a /* DB/backends for r600+ - need for OQ */
911 912
912struct drm_radeon_info { 913struct drm_radeon_info {
913 uint32_t request; 914 uint32_t request;
diff --git a/include/drm/ttm/ttm_bo_driver.h b/include/drm/ttm/ttm_bo_driver.h
index 1da8af6ac884..efed0820d9fa 100644
--- a/include/drm/ttm/ttm_bo_driver.h
+++ b/include/drm/ttm/ttm_bo_driver.h
@@ -50,13 +50,15 @@ struct ttm_backend_func {
50 * @pages: Array of pointers to ttm pages. 50 * @pages: Array of pointers to ttm pages.
51 * @dummy_read_page: Page to be used instead of NULL pages in the 51 * @dummy_read_page: Page to be used instead of NULL pages in the
52 * array @pages. 52 * array @pages.
53 * @dma_addrs: Array of DMA (bus) address of the ttm pages.
53 * 54 *
54 * Populate the backend with ttm pages. Depending on the backend, 55 * Populate the backend with ttm pages. Depending on the backend,
55 * it may or may not copy the @pages array. 56 * it may or may not copy the @pages array.
56 */ 57 */
57 int (*populate) (struct ttm_backend *backend, 58 int (*populate) (struct ttm_backend *backend,
58 unsigned long num_pages, struct page **pages, 59 unsigned long num_pages, struct page **pages,
59 struct page *dummy_read_page); 60 struct page *dummy_read_page,
61 dma_addr_t *dma_addrs);
60 /** 62 /**
61 * struct ttm_backend_func member clear 63 * struct ttm_backend_func member clear
62 * 64 *
@@ -149,6 +151,7 @@ enum ttm_caching_state {
149 * @swap_storage: Pointer to shmem struct file for swap storage. 151 * @swap_storage: Pointer to shmem struct file for swap storage.
150 * @caching_state: The current caching state of the pages. 152 * @caching_state: The current caching state of the pages.
151 * @state: The current binding state of the pages. 153 * @state: The current binding state of the pages.
154 * @dma_address: The DMA (bus) addresses of the pages (if TTM_PAGE_FLAG_DMA32)
152 * 155 *
153 * This is a structure holding the pages, caching- and aperture binding 156 * This is a structure holding the pages, caching- and aperture binding
154 * status for a buffer object that isn't backed by fixed (VRAM / AGP) 157 * status for a buffer object that isn't backed by fixed (VRAM / AGP)
@@ -173,6 +176,7 @@ struct ttm_tt {
173 tt_unbound, 176 tt_unbound,
174 tt_unpopulated, 177 tt_unpopulated,
175 } state; 178 } state;
179 dma_addr_t *dma_address;
176}; 180};
177 181
178#define TTM_MEMTYPE_FLAG_FIXED (1 << 0) /* Fixed (on-card) PCI memory */ 182#define TTM_MEMTYPE_FLAG_FIXED (1 << 0) /* Fixed (on-card) PCI memory */
diff --git a/include/drm/ttm/ttm_page_alloc.h b/include/drm/ttm/ttm_page_alloc.h
index 116821448c38..8062890f725e 100644
--- a/include/drm/ttm/ttm_page_alloc.h
+++ b/include/drm/ttm/ttm_page_alloc.h
@@ -36,11 +36,13 @@
36 * @flags: ttm flags for page allocation. 36 * @flags: ttm flags for page allocation.
37 * @cstate: ttm caching state for the page. 37 * @cstate: ttm caching state for the page.
38 * @count: number of pages to allocate. 38 * @count: number of pages to allocate.
39 * @dma_address: The DMA (bus) address of pages (if TTM_PAGE_FLAG_DMA32 set).
39 */ 40 */
40int ttm_get_pages(struct list_head *pages, 41int ttm_get_pages(struct list_head *pages,
41 int flags, 42 int flags,
42 enum ttm_caching_state cstate, 43 enum ttm_caching_state cstate,
43 unsigned count); 44 unsigned count,
45 dma_addr_t *dma_address);
44/** 46/**
45 * Put linked list of pages to pool. 47 * Put linked list of pages to pool.
46 * 48 *
@@ -49,11 +51,13 @@ int ttm_get_pages(struct list_head *pages,
49 * count. 51 * count.
50 * @flags: ttm flags for page allocation. 52 * @flags: ttm flags for page allocation.
51 * @cstate: ttm caching state. 53 * @cstate: ttm caching state.
54 * @dma_address: The DMA (bus) address of pages (if TTM_PAGE_FLAG_DMA32 set).
52 */ 55 */
53void ttm_put_pages(struct list_head *pages, 56void ttm_put_pages(struct list_head *pages,
54 unsigned page_count, 57 unsigned page_count,
55 int flags, 58 int flags,
56 enum ttm_caching_state cstate); 59 enum ttm_caching_state cstate,
60 dma_addr_t *dma_address);
57/** 61/**
58 * Initialize pool allocator. 62 * Initialize pool allocator.
59 */ 63 */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-30 18:52:39 -0500