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authorDavid S. Miller <davem@sunset.davemloft.net>2006-02-08 05:53:50 -0500
committerDavid S. Miller <davem@sunset.davemloft.net>2006-03-20 04:12:01 -0500
commit5b0c0572fcd6204675c5f7ddfa572b5017f817dd (patch)
tree1075a61338e887bd6d4ecd4517646ef95dc09fbc /include
parentac29c11d4cd4fa1fac968e99998a956405732f2f (diff)
[SPARC64]: Sun4v interrupt handling.
Sun4v has 4 interrupt queues: cpu, device, resumable errors, and non-resumable errors. A set of head/tail offset pointers help maintain a work queue in physical memory. The entries are 64-bytes in size. Each queue is allocated then registered with the hypervisor as we bring cpus up. The two error queues each get a kernel side buffer that we use to quickly empty the main interrupt queue before we call up to C code to log the event and possibly take evasive action. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include')
-rw-r--r--include/asm-sparc64/cpudata.h22
1 files changed, 14 insertions, 8 deletions
diff --git a/include/asm-sparc64/cpudata.h b/include/asm-sparc64/cpudata.h
index 492314b53475..7f0a74ec47f6 100644
--- a/include/asm-sparc64/cpudata.h
+++ b/include/asm-sparc64/cpudata.h
@@ -53,16 +53,17 @@ DECLARE_PER_CPU(cpuinfo_sparc, __cpu_data);
53 */ 53 */
54struct thread_info; 54struct thread_info;
55struct trap_per_cpu { 55struct trap_per_cpu {
56/* D-cache line 1: Basic thread information */ 56/* D-cache line 1: Basic thread information, cpu and device mondo queues */
57 struct thread_info *thread; 57 struct thread_info *thread;
58 unsigned long pgd_paddr; 58 unsigned long pgd_paddr;
59 unsigned long __pad1[2];
60
61/* D-cache line 2: Sun4V Mondo Queue pointers */
62 unsigned long cpu_mondo_pa; 59 unsigned long cpu_mondo_pa;
63 unsigned long dev_mondo_pa; 60 unsigned long dev_mondo_pa;
61
62/* D-cache line 2: Error Mondo Queue and kernel buffer pointers */
64 unsigned long resum_mondo_pa; 63 unsigned long resum_mondo_pa;
64 unsigned long resum_kernel_buf_pa;
65 unsigned long nonresum_mondo_pa; 65 unsigned long nonresum_mondo_pa;
66 unsigned long nonresum_kernel_buf_pa;
66 67
67/* Dcache lines 3 and 4: Hypervisor Fault Status */ 68/* Dcache lines 3 and 4: Hypervisor Fault Status */
68 struct hv_fault_status fault_info; 69 struct hv_fault_status fault_info;
@@ -100,10 +101,12 @@ extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch,
100 101
101#define TRAP_PER_CPU_THREAD 0x00 102#define TRAP_PER_CPU_THREAD 0x00
102#define TRAP_PER_CPU_PGD_PADDR 0x08 103#define TRAP_PER_CPU_PGD_PADDR 0x08
103#define TRAP_PER_CPU_CPU_MONDO_PA 0x20 104#define TRAP_PER_CPU_CPU_MONDO_PA 0x10
104#define TRAP_PER_CPU_DEV_MONDO_PA 0x28 105#define TRAP_PER_CPU_DEV_MONDO_PA 0x18
105#define TRAP_PER_CPU_RESUM_MONDO_PA 0x30 106#define TRAP_PER_CPU_RESUM_MONDO_PA 0x20
106#define TRAP_PER_CPU_NONRESUM_MONDO_PA 0x38 107#define TRAP_PER_CPU_RESUM_KBUF_PA 0x28
108#define TRAP_PER_CPU_NONRESUM_MONDO_PA 0x30
109#define TRAP_PER_CPU_NONRESUM_KBUF_PA 0x38
107#define TRAP_PER_CPU_FAULT_INFO 0x40 110#define TRAP_PER_CPU_FAULT_INFO 0x40
108 111
109#define TRAP_BLOCK_SZ_SHIFT 7 112#define TRAP_BLOCK_SZ_SHIFT 7
@@ -188,6 +191,9 @@ extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch,
188 191
189#else 192#else
190 193
194#define __GET_CPUID(REG) \
195 mov 0, REG;
196
191/* Uniprocessor versions, we know the cpuid is zero. */ 197/* Uniprocessor versions, we know the cpuid is zero. */
192#define TRAP_LOAD_PGD_PHYS(DEST, TMP) \ 198#define TRAP_LOAD_PGD_PHYS(DEST, TMP) \
193 sethi %hi(trap_block), DEST; \ 199 sethi %hi(trap_block), DEST; \