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authorDave Airlie <airlied@redhat.com>2009-06-23 19:48:08 -0400
committerDave Airlie <airlied@redhat.com>2009-07-29 01:42:18 -0400
commite024e11070a0a0dc7163ce1ec2da354a638bdbed (patch)
treeadd483e7428f91da6f3c26be702aa45e6d69b694 /include
parentc836e862803b2aa2bd9a354e151316d2b42c44ec (diff)
drm/radeon/kms: add initial colortiling support.
This adds new set/get tiling interfaces where the pitch and macro/micro tiling enables can be set. Along with a flag to decide if this object should have a surface when mapped. The only thing we need to allocate with a mapped surface should be the frontbuffer. Note rotate scanout shouldn't require one, and back/depth shouldn't either, though mesa needs some fixes. It fixes the TTM interfaces along Thomas's suggestions, and I've tested the surface stealing code with two X servers and not seen any lockdep issues. I've stopped tiling the fbcon frontbuffer, as I don't see there being any advantage other than testing, I've left the testing commands in there, just flip the fb_tiled to true in radeon_fb.c Open: Can we integrate endian swapping in with this? Future features: texture tiling - need to relocate texture registers TXOFFSET* with tiling info. This also merges Michel's cleanup surfaces regs at init time patch even though it makes sense on its own, this patch really relies on it. Some PowerMac firmwares set up a tiling surface at the beginning of VRAM which messes us up otherwise. that patch is: Signed-off-by: Michel Dänzer <daenzer@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'include')
-rw-r--r--include/drm/radeon_drm.h23
-rw-r--r--include/drm/ttm/ttm_bo_driver.h15
2 files changed, 37 insertions, 1 deletions
diff --git a/include/drm/radeon_drm.h b/include/drm/radeon_drm.h
index 41862e9a4c20..af4b4826997e 100644
--- a/include/drm/radeon_drm.h
+++ b/include/drm/radeon_drm.h
@@ -506,6 +506,8 @@ typedef struct {
506#define DRM_RADEON_GEM_WAIT_IDLE 0x24 506#define DRM_RADEON_GEM_WAIT_IDLE 0x24
507#define DRM_RADEON_CS 0x26 507#define DRM_RADEON_CS 0x26
508#define DRM_RADEON_INFO 0x27 508#define DRM_RADEON_INFO 0x27
509#define DRM_RADEON_GEM_SET_TILING 0x28
510#define DRM_RADEON_GEM_GET_TILING 0x29
509 511
510#define DRM_IOCTL_RADEON_CP_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_INIT, drm_radeon_init_t) 512#define DRM_IOCTL_RADEON_CP_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_INIT, drm_radeon_init_t)
511#define DRM_IOCTL_RADEON_CP_START DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_START) 513#define DRM_IOCTL_RADEON_CP_START DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_START)
@@ -544,7 +546,8 @@ typedef struct {
544#define DRM_IOCTL_RADEON_GEM_WAIT_IDLE DRM_IOW(DRM_COMMAND_BASE + DRM_RADEON_GEM_WAIT_IDLE, struct drm_radeon_gem_wait_idle) 546#define DRM_IOCTL_RADEON_GEM_WAIT_IDLE DRM_IOW(DRM_COMMAND_BASE + DRM_RADEON_GEM_WAIT_IDLE, struct drm_radeon_gem_wait_idle)
545#define DRM_IOCTL_RADEON_CS DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_CS, struct drm_radeon_cs) 547#define DRM_IOCTL_RADEON_CS DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_CS, struct drm_radeon_cs)
546#define DRM_IOCTL_RADEON_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_INFO, struct drm_radeon_info) 548#define DRM_IOCTL_RADEON_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_INFO, struct drm_radeon_info)
547 549#define DRM_IOCTL_RADEON_SET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_SET_TILING, struct drm_radeon_gem_set_tiling)
550#define DRM_IOCTL_RADEON_GET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_GET_TILING, struct drm_radeon_gem_get_tiling)
548 551
549typedef struct drm_radeon_init { 552typedef struct drm_radeon_init {
550 enum { 553 enum {
@@ -796,6 +799,24 @@ struct drm_radeon_gem_create {
796 uint32_t flags; 799 uint32_t flags;
797}; 800};
798 801
802#define RADEON_TILING_MACRO 0x1
803#define RADEON_TILING_MICRO 0x2
804#define RADEON_TILING_SWAP 0x4
805#define RADEON_TILING_SURFACE 0x8 /* this object requires a surface
806 * when mapped - i.e. front buffer */
807
808struct drm_radeon_gem_set_tiling {
809 uint32_t handle;
810 uint32_t tiling_flags;
811 uint32_t pitch;
812};
813
814struct drm_radeon_gem_get_tiling {
815 uint32_t handle;
816 uint32_t tiling_flags;
817 uint32_t pitch;
818};
819
799struct drm_radeon_gem_mmap { 820struct drm_radeon_gem_mmap {
800 uint32_t handle; 821 uint32_t handle;
801 uint32_t pad; 822 uint32_t pad;
diff --git a/include/drm/ttm/ttm_bo_driver.h b/include/drm/ttm/ttm_bo_driver.h
index ea83dd23a4d7..a68829db381a 100644
--- a/include/drm/ttm/ttm_bo_driver.h
+++ b/include/drm/ttm/ttm_bo_driver.h
@@ -354,6 +354,14 @@ struct ttm_bo_driver {
354 int (*sync_obj_flush) (void *sync_obj, void *sync_arg); 354 int (*sync_obj_flush) (void *sync_obj, void *sync_arg);
355 void (*sync_obj_unref) (void **sync_obj); 355 void (*sync_obj_unref) (void **sync_obj);
356 void *(*sync_obj_ref) (void *sync_obj); 356 void *(*sync_obj_ref) (void *sync_obj);
357
358 /* hook to notify driver about a driver move so it
359 * can do tiling things */
360 void (*move_notify)(struct ttm_buffer_object *bo,
361 struct ttm_mem_reg *new_mem);
362 /* notify the driver we are taking a fault on this BO
363 * and have reserved it */
364 void (*fault_reserve_notify)(struct ttm_buffer_object *bo);
357}; 365};
358 366
359#define TTM_NUM_MEM_TYPES 8 367#define TTM_NUM_MEM_TYPES 8
@@ -654,6 +662,13 @@ extern int ttm_bo_device_init(struct ttm_bo_device *bdev,
654 uint64_t file_page_offset, bool need_dma32); 662 uint64_t file_page_offset, bool need_dma32);
655 663
656/** 664/**
665 * ttm_bo_unmap_virtual
666 *
667 * @bo: tear down the virtual mappings for this BO
668 */
669extern void ttm_bo_unmap_virtual(struct ttm_buffer_object *bo);
670
671/**
657 * ttm_bo_reserve: 672 * ttm_bo_reserve:
658 * 673 *
659 * @bo: A pointer to a struct ttm_buffer_object. 674 * @bo: A pointer to a struct ttm_buffer_object.