diff options
author | Michael Hennerich <michael.hennerich@analog.com> | 2008-02-08 15:11:14 -0500 |
---|---|---|
committer | Bryan Wu <bryan.wu@analog.com> | 2008-02-08 15:11:14 -0500 |
commit | 2c4f829b0ce3d2fb447acca823e141094a50daa5 (patch) | |
tree | 4f0b36956425896d0f8db28022ddc45372014a4b /include | |
parent | 856783b37a958086c83ea44544d366affd0c2c4b (diff) |
[Blackfin] arch: Merge BF561 support into ints-priority
Merge single core ints-priority-sc.c and dual core ints-priority-dc.c
into one common code ints-priority.c
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-blackfin/mach-bf561/blackfin.h | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/include/asm-blackfin/mach-bf561/blackfin.h b/include/asm-blackfin/mach-bf561/blackfin.h index 562aee39895c..362617f93845 100644 --- a/include/asm-blackfin/mach-bf561/blackfin.h +++ b/include/asm-blackfin/mach-bf561/blackfin.h | |||
@@ -49,4 +49,24 @@ | |||
49 | #define bfin_read_FIO_INEN() bfin_read_FIO0_INEN() | 49 | #define bfin_read_FIO_INEN() bfin_read_FIO0_INEN() |
50 | #define bfin_write_FIO_INEN(val) bfin_write_FIO0_INEN(val) | 50 | #define bfin_write_FIO_INEN(val) bfin_write_FIO0_INEN(val) |
51 | 51 | ||
52 | |||
53 | #define SIC_IAR0 SICA_IAR0 | ||
54 | #define bfin_write_SIC_IMASK0 bfin_write_SICA_IMASK0 | ||
55 | #define bfin_write_SIC_IMASK1 bfin_write_SICA_IMASK1 | ||
56 | #define bfin_write_SIC_IWR0 bfin_write_SICA_IWR0 | ||
57 | #define bfin_write_SIC_IWR1 bfin_write_SICA_IWR1 | ||
58 | |||
59 | #define bfin_read_SIC_IMASK0 bfin_read_SICA_IMASK0 | ||
60 | #define bfin_read_SIC_IMASK1 bfin_read_SICA_IMASK1 | ||
61 | #define bfin_read_SIC_IWR0 bfin_read_SICA_IWR0 | ||
62 | #define bfin_read_SIC_IWR1 bfin_read_SICA_IWR1 | ||
63 | #define bfin_read_SIC_ISR0 bfin_read_SICA_ISR0 | ||
64 | #define bfin_read_SIC_ISR1 bfin_read_SICA_ISR1 | ||
65 | |||
66 | #define bfin_read_SIC_IMASK(x) bfin_read32(SICA_IMASK0 + (x << 2)) | ||
67 | #define bfin_write_SIC_IMASK(x, val) bfin_write32((SICA_IMASK0 + (x << 2)), val) | ||
68 | #define bfin_read_SIC_ISR(x) bfin_read32(SICA_ISR0 + (x << 2)) | ||
69 | #define bfin_write_SIC_ISR(x, val) bfin_write32((SICA_ISR0 + (x << 2)), val) | ||
70 | |||
71 | |||
52 | #endif /* _MACH_BLACKFIN_H_ */ | 72 | #endif /* _MACH_BLACKFIN_H_ */ |