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authorRobert P. J. Day <rpjday@mindspring.com>2007-10-19 17:10:43 -0400
committerAdrian Bunk <bunk@kernel.org>2007-10-19 17:10:43 -0400
commit3a4fa0a25da81600ea0bcd75692ae8ca6050d165 (patch)
treea4de1662e645c029cf3cf58f0646cbb1959861dc /include
parent18735dd8d2d37031b97f9e9e106acbaed01eb896 (diff)
Fix misspellings of "system", "controller", "interrupt" and "necessary".
Fix the various misspellings of "system", controller", "interrupt" and "[un]necessary". Signed-off-by: Robert P. J. Day <rpjday@mindspring.com> Signed-off-by: Adrian Bunk <bunk@kernel.org>
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/dma-mapping.h2
-rw-r--r--include/asm-mips/pci/bridge.h2
-rw-r--r--include/asm-sh/se7751.h2
-rw-r--r--include/asm-sh/systemh7751.h2
-rw-r--r--include/linux/ipmi_smi.h2
5 files changed, 5 insertions, 5 deletions
diff --git a/include/asm-arm/dma-mapping.h b/include/asm-arm/dma-mapping.h
index 678134bf2475..1eb8aac43228 100644
--- a/include/asm-arm/dma-mapping.h
+++ b/include/asm-arm/dma-mapping.h
@@ -401,7 +401,7 @@ extern void dma_sync_sg_for_device(struct device*, struct scatterlist*, int, enu
401 * 401 *
402 * On the SA-1111, a bug limits DMA to only certain regions of RAM. 402 * On the SA-1111, a bug limits DMA to only certain regions of RAM.
403 * On the IXP425, the PCI inbound window is 64MB (256MB total RAM) 403 * On the IXP425, the PCI inbound window is 64MB (256MB total RAM)
404 * On some ADI engineering sytems, PCI inbound window is 32MB (12MB total RAM) 404 * On some ADI engineering systems, PCI inbound window is 32MB (12MB total RAM)
405 * 405 *
406 * The following are helper functions used by the dmabounce subystem 406 * The following are helper functions used by the dmabounce subystem
407 * 407 *
diff --git a/include/asm-mips/pci/bridge.h b/include/asm-mips/pci/bridge.h
index b84feebf2cef..5f4b9d4e4114 100644
--- a/include/asm-mips/pci/bridge.h
+++ b/include/asm-mips/pci/bridge.h
@@ -538,7 +538,7 @@ typedef struct bridge_err_cmdword_s {
538 BRIDGE_ISR_PMU_ESIZE_FAULT) 538 BRIDGE_ISR_PMU_ESIZE_FAULT)
539 539
540/* 540/*
541 * List of Errors which are fatal and kill the sytem 541 * List of Errors which are fatal and kill the system
542 */ 542 */
543#define BRIDGE_ISR_ERROR_FATAL \ 543#define BRIDGE_ISR_ERROR_FATAL \
544 ((BRIDGE_ISR_XTALK_ERROR & ~BRIDGE_ISR_XREAD_REQ_TIMEOUT)|\ 544 ((BRIDGE_ISR_XTALK_ERROR & ~BRIDGE_ISR_XREAD_REQ_TIMEOUT)|\
diff --git a/include/asm-sh/se7751.h b/include/asm-sh/se7751.h
index 02ca9347f043..b36792ac5d66 100644
--- a/include/asm-sh/se7751.h
+++ b/include/asm-sh/se7751.h
@@ -36,7 +36,7 @@
36#define PA_LED 0xba000000 /* LED */ 36#define PA_LED 0xba000000 /* LED */
37#define PA_BCR 0xbb000000 /* FPGA on the MS7751SE01 */ 37#define PA_BCR 0xbb000000 /* FPGA on the MS7751SE01 */
38 38
39#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controler */ 39#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controller */
40#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ 40#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */
41#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ 41#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */
42#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ 42#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */
diff --git a/include/asm-sh/systemh7751.h b/include/asm-sh/systemh7751.h
index b143bb2a2ca7..4161122c84ef 100644
--- a/include/asm-sh/systemh7751.h
+++ b/include/asm-sh/systemh7751.h
@@ -36,7 +36,7 @@
36#define PA_LED 0xba000000 /* LED */ 36#define PA_LED 0xba000000 /* LED */
37#define PA_BCR 0xbb000000 /* FPGA on the MS7751SE01 */ 37#define PA_BCR 0xbb000000 /* FPGA on the MS7751SE01 */
38 38
39#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controler */ 39#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controller */
40#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ 40#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */
41#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ 41#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */
42#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ 42#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */
diff --git a/include/linux/ipmi_smi.h b/include/linux/ipmi_smi.h
index efa292a52e7e..56ae438ae510 100644
--- a/include/linux/ipmi_smi.h
+++ b/include/linux/ipmi_smi.h
@@ -118,7 +118,7 @@ struct ipmi_smi_handlers
118 /* Enable/disable firmware maintenance mode. Note that this 118 /* Enable/disable firmware maintenance mode. Note that this
119 is *not* the modes defined, this is simply an on/off 119 is *not* the modes defined, this is simply an on/off
120 setting. The message handler does the mode handling. Note 120 setting. The message handler does the mode handling. Note
121 that this is called from interupt context, so it cannot 121 that this is called from interrupt context, so it cannot
122 block. */ 122 block. */
123 void (*set_maintenance_mode)(void *send_info, int enable); 123 void (*set_maintenance_mode)(void *send_info, int enable);
124 124