diff options
author | Arnd Bergmann <arnd@arndb.de> | 2012-11-12 15:45:19 -0500 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2012-11-12 15:45:19 -0500 |
commit | 1bf0bc1e050fc425cc776b10d3ce8754389aabbe (patch) | |
tree | 317dceabcdd661bebfb829c4ba4440dc2ae2adf2 /include | |
parent | b68c50d836517cf662145b2e7d5cdf40a38b24f1 (diff) | |
parent | 2944628607f76e4755660cd710f22a4748ef88d8 (diff) |
Merge branch 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman <horms@verge.net.au>:
This series is based on the renesas/soc branch of the arm-soc tree.
There will be a subquent 'SoC2' pull request which is based on this
pull-request and a pull-request for boards.
* 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: add fsi external clock sh7372
ARM: shmobile: add fsi external clock on r8a7740
ARM: shmobile: r8a7740: add FSI-DVI clocks
ARM: shmobile: sh7372: use sh_clk_fsidiv_register() for FSI-DIV clocks
ARM: shmobile: sh7372: sh7372_fsidivX_clk become non-global
sh: clkfwk: add sh_clk_fsidiv_register()
ARM: shmobile: r8a7779: add USB OHCI clock support
ARM: shmobile: r8a7779: add USB EHCI clock support
ARM: shmobile: r8a7740: add USB24 clock explain
ARM: shmobile: r8a7779: PFC rename PENCx -> USB_PENCx
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/sh_clk.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/include/linux/sh_clk.h b/include/linux/sh_clk.h index 50910913b268..60c72395ec6b 100644 --- a/include/linux/sh_clk.h +++ b/include/linux/sh_clk.h | |||
@@ -199,4 +199,13 @@ int sh_clk_div6_reparent_register(struct clk *clks, int nr); | |||
199 | #define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk } | 199 | #define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk } |
200 | #define CLKDEV_ICK_ID(_cid, _did, _clk) { .con_id = _cid, .dev_id = _did, .clk = _clk } | 200 | #define CLKDEV_ICK_ID(_cid, _did, _clk) { .con_id = _cid, .dev_id = _did, .clk = _clk } |
201 | 201 | ||
202 | /* .enable_reg will be updated to .mapping on sh_clk_fsidiv_register() */ | ||
203 | #define SH_CLK_FSIDIV(_reg, _parent) \ | ||
204 | { \ | ||
205 | .enable_reg = (void __iomem *)_reg, \ | ||
206 | .parent = _parent, \ | ||
207 | } | ||
208 | |||
209 | int sh_clk_fsidiv_register(struct clk *clks, int nr); | ||
210 | |||
202 | #endif /* __SH_CLOCK_H */ | 211 | #endif /* __SH_CLOCK_H */ |