aboutsummaryrefslogtreecommitdiffstats
path: root/include
diff options
context:
space:
mode:
authorGlauber de Oliveira Costa <gcosta@redhat.com>2008-01-30 07:31:27 -0500
committerIngo Molnar <mingo@elte.hu>2008-01-30 07:31:27 -0500
commit1b46cbe0ccaad25786526601bc54426f2e2abb20 (patch)
tree5dc174d2da7e66cb8bc3356356b4e2eced2e3981 /include
parentc72dcf83ff8585c95739abffa3be7c87ca63d66b (diff)
x86: unify paravirt pieces of processor.h
This patch unifies the paravirt pieces of processor.h The functionality present in 32 bit, but not (yet) in 64-bit, like load_sp0 is _not_ done here, and let to a different patch. With this unification, we get paravirt for free in x86_64 processor.h Signed-off-by: Glauber de Oliveira Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'include')
-rw-r--r--include/asm-x86/processor.h90
-rw-r--r--include/asm-x86/processor_32.h87
-rw-r--r--include/asm-x86/processor_64.h36
3 files changed, 89 insertions, 124 deletions
diff --git a/include/asm-x86/processor.h b/include/asm-x86/processor.h
index 36ee9881b74f..8d0af7bf090a 100644
--- a/include/asm-x86/processor.h
+++ b/include/asm-x86/processor.h
@@ -29,9 +29,97 @@ static inline void load_cr3(pgd_t *pgdir)
29# include "processor_64.h" 29# include "processor_64.h"
30#endif 30#endif
31 31
32static inline unsigned long native_get_debugreg(int regno)
33{
34 unsigned long val = 0; /* Damn you, gcc! */
35
36 switch (regno) {
37 case 0:
38 asm("mov %%db0, %0" :"=r" (val)); break;
39 case 1:
40 asm("mov %%db1, %0" :"=r" (val)); break;
41 case 2:
42 asm("mov %%db2, %0" :"=r" (val)); break;
43 case 3:
44 asm("mov %%db3, %0" :"=r" (val)); break;
45 case 6:
46 asm("mov %%db6, %0" :"=r" (val)); break;
47 case 7:
48 asm("mov %%db7, %0" :"=r" (val)); break;
49 default:
50 BUG();
51 }
52 return val;
53}
54
55static inline void native_set_debugreg(int regno, unsigned long value)
56{
57 switch (regno) {
58 case 0:
59 asm("mov %0,%%db0" : /* no output */ :"r" (value));
60 break;
61 case 1:
62 asm("mov %0,%%db1" : /* no output */ :"r" (value));
63 break;
64 case 2:
65 asm("mov %0,%%db2" : /* no output */ :"r" (value));
66 break;
67 case 3:
68 asm("mov %0,%%db3" : /* no output */ :"r" (value));
69 break;
70 case 6:
71 asm("mov %0,%%db6" : /* no output */ :"r" (value));
72 break;
73 case 7:
74 asm("mov %0,%%db7" : /* no output */ :"r" (value));
75 break;
76 default:
77 BUG();
78 }
79}
80
81
32#ifndef CONFIG_PARAVIRT 82#ifndef CONFIG_PARAVIRT
33#define __cpuid native_cpuid 83#define __cpuid native_cpuid
34#endif 84#define paravirt_enabled() 0
85
86/*
87 * These special macros can be used to get or set a debugging register
88 */
89#define get_debugreg(var, register) \
90 (var) = native_get_debugreg(register)
91#define set_debugreg(value, register) \
92 native_set_debugreg(register, value)
93
94#endif /* CONFIG_PARAVIRT */
95
96/*
97 * Save the cr4 feature set we're using (ie
98 * Pentium 4MB enable and PPro Global page
99 * enable), so that any CPU's that boot up
100 * after us can get the correct flags.
101 */
102extern unsigned long mmu_cr4_features;
103
104static inline void set_in_cr4(unsigned long mask)
105{
106 unsigned cr4;
107 mmu_cr4_features |= mask;
108 cr4 = read_cr4();
109 cr4 |= mask;
110 write_cr4(cr4);
111}
112
113static inline void clear_in_cr4(unsigned long mask)
114{
115 unsigned cr4;
116 mmu_cr4_features &= ~mask;
117 cr4 = read_cr4();
118 cr4 &= ~mask;
119 write_cr4(cr4);
120}
121
122
35 123
36/* 124/*
37 * Generic CPUID function 125 * Generic CPUID function
diff --git a/include/asm-x86/processor_32.h b/include/asm-x86/processor_32.h
index b586902acd85..e7fc023cd810 100644
--- a/include/asm-x86/processor_32.h
+++ b/include/asm-x86/processor_32.h
@@ -120,33 +120,6 @@ extern void detect_ht(struct cpuinfo_x86 *c);
120static inline void detect_ht(struct cpuinfo_x86 *c) {} 120static inline void detect_ht(struct cpuinfo_x86 *c) {}
121#endif 121#endif
122 122
123
124/*
125 * Save the cr4 feature set we're using (ie
126 * Pentium 4MB enable and PPro Global page
127 * enable), so that any CPU's that boot up
128 * after us can get the correct flags.
129 */
130extern unsigned long mmu_cr4_features;
131
132static inline void set_in_cr4 (unsigned long mask)
133{
134 unsigned cr4;
135 mmu_cr4_features |= mask;
136 cr4 = read_cr4();
137 cr4 |= mask;
138 write_cr4(cr4);
139}
140
141static inline void clear_in_cr4 (unsigned long mask)
142{
143 unsigned cr4;
144 mmu_cr4_features &= ~mask;
145 cr4 = read_cr4();
146 cr4 &= ~mask;
147 write_cr4(cr4);
148}
149
150/* Stop speculative execution */ 123/* Stop speculative execution */
151static inline void sync_core(void) 124static inline void sync_core(void)
152{ 125{
@@ -482,57 +455,6 @@ static inline void native_load_sp0(struct tss_struct *tss, struct thread_struct
482 wrmsr(MSR_IA32_SYSENTER_CS, thread->sysenter_cs, 0); 455 wrmsr(MSR_IA32_SYSENTER_CS, thread->sysenter_cs, 0);
483 } 456 }
484} 457}
485
486
487static inline unsigned long native_get_debugreg(int regno)
488{
489 unsigned long val = 0; /* Damn you, gcc! */
490
491 switch (regno) {
492 case 0:
493 asm("movl %%db0, %0" :"=r" (val)); break;
494 case 1:
495 asm("movl %%db1, %0" :"=r" (val)); break;
496 case 2:
497 asm("movl %%db2, %0" :"=r" (val)); break;
498 case 3:
499 asm("movl %%db3, %0" :"=r" (val)); break;
500 case 6:
501 asm("movl %%db6, %0" :"=r" (val)); break;
502 case 7:
503 asm("movl %%db7, %0" :"=r" (val)); break;
504 default:
505 BUG();
506 }
507 return val;
508}
509
510static inline void native_set_debugreg(int regno, unsigned long value)
511{
512 switch (regno) {
513 case 0:
514 asm("movl %0,%%db0" : /* no output */ :"r" (value));
515 break;
516 case 1:
517 asm("movl %0,%%db1" : /* no output */ :"r" (value));
518 break;
519 case 2:
520 asm("movl %0,%%db2" : /* no output */ :"r" (value));
521 break;
522 case 3:
523 asm("movl %0,%%db3" : /* no output */ :"r" (value));
524 break;
525 case 6:
526 asm("movl %0,%%db6" : /* no output */ :"r" (value));
527 break;
528 case 7:
529 asm("movl %0,%%db7" : /* no output */ :"r" (value));
530 break;
531 default:
532 BUG();
533 }
534}
535
536/* 458/*
537 * Set IOPL bits in EFLAGS from given mask 459 * Set IOPL bits in EFLAGS from given mask
538 */ 460 */
@@ -552,21 +474,12 @@ static inline void native_set_iopl_mask(unsigned mask)
552#ifdef CONFIG_PARAVIRT 474#ifdef CONFIG_PARAVIRT
553#include <asm/paravirt.h> 475#include <asm/paravirt.h>
554#else 476#else
555#define paravirt_enabled() 0
556 477
557static inline void load_sp0(struct tss_struct *tss, struct thread_struct *thread) 478static inline void load_sp0(struct tss_struct *tss, struct thread_struct *thread)
558{ 479{
559 native_load_sp0(tss, thread); 480 native_load_sp0(tss, thread);
560} 481}
561 482
562/*
563 * These special macros can be used to get or set a debugging register
564 */
565#define get_debugreg(var, register) \
566 (var) = native_get_debugreg(register)
567#define set_debugreg(value, register) \
568 native_set_debugreg(register, value)
569
570#define set_iopl_mask native_set_iopl_mask 483#define set_iopl_mask native_set_iopl_mask
571#endif /* CONFIG_PARAVIRT */ 484#endif /* CONFIG_PARAVIRT */
572 485
diff --git a/include/asm-x86/processor_64.h b/include/asm-x86/processor_64.h
index acecef80a510..6abe1ba30fe0 100644
--- a/include/asm-x86/processor_64.h
+++ b/include/asm-x86/processor_64.h
@@ -88,34 +88,6 @@ extern void init_scattered_cpuid_features(struct cpuinfo_x86 *c);
88extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c); 88extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c);
89extern unsigned short num_cache_leaves; 89extern unsigned short num_cache_leaves;
90 90
91/*
92 * Save the cr4 feature set we're using (ie
93 * Pentium 4MB enable and PPro Global page
94 * enable), so that any CPU's that boot up
95 * after us can get the correct flags.
96 */
97extern unsigned long mmu_cr4_features;
98
99static inline void set_in_cr4 (unsigned long mask)
100{
101 mmu_cr4_features |= mask;
102 __asm__("movq %%cr4,%%rax\n\t"
103 "orq %0,%%rax\n\t"
104 "movq %%rax,%%cr4\n"
105 : : "irg" (mask)
106 :"ax");
107}
108
109static inline void clear_in_cr4 (unsigned long mask)
110{
111 mmu_cr4_features &= ~mask;
112 __asm__("movq %%cr4,%%rax\n\t"
113 "andq %0,%%rax\n\t"
114 "movq %%rax,%%cr4\n"
115 : : "irg" (~mask)
116 :"ax");
117}
118
119 91
120/* 92/*
121 * User space process size. 47bits minus one guard page. 93 * User space process size. 47bits minus one guard page.
@@ -254,14 +226,6 @@ struct thread_struct {
254 set_fs(USER_DS); \ 226 set_fs(USER_DS); \
255} while(0) 227} while(0)
256 228
257#define get_debugreg(var, register) \
258 __asm__("movq %%db" #register ", %0" \
259 :"=r" (var))
260#define set_debugreg(value, register) \
261 __asm__("movq %0,%%db" #register \
262 : /* no output */ \
263 :"r" (value))
264
265struct task_struct; 229struct task_struct;
266struct mm_struct; 230struct mm_struct;
267 231