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authorLinus Torvalds <torvalds@g5.osdl.org>2006-01-11 00:31:24 -0500
committerLinus Torvalds <torvalds@g5.osdl.org>2006-01-11 00:31:24 -0500
commit05f6ece6f37f987e9de643f6f76e8fb5d5b9e014 (patch)
tree5244e85d0dfb2619b0af4bc80a2c99dd579f79a5 /include
parent35d138ae22f826f95f0f8d0285947582ccf4508f (diff)
parent58b6c58caef7a34eab7ec887288fa495696653e7 (diff)
Merge master.kernel.org:/pub/scm/linux/kernel/git/kyle/parisc-2.6
Diffstat (limited to 'include')
-rw-r--r--include/asm-parisc/cache.h8
-rw-r--r--include/asm-parisc/io.h2
-rw-r--r--include/asm-parisc/page.h7
-rw-r--r--include/asm-parisc/pci.h8
-rw-r--r--include/asm-parisc/processor.h18
-rw-r--r--include/asm-parisc/tlbflush.h1
-rw-r--r--include/linux/cache.h2
7 files changed, 30 insertions, 16 deletions
diff --git a/include/asm-parisc/cache.h b/include/asm-parisc/cache.h
index 38d201b5652d..93f179f13ce8 100644
--- a/include/asm-parisc/cache.h
+++ b/include/asm-parisc/cache.h
@@ -29,14 +29,14 @@
29 29
30#define SMP_CACHE_BYTES L1_CACHE_BYTES 30#define SMP_CACHE_BYTES L1_CACHE_BYTES
31 31
32extern void flush_data_cache_local(void); /* flushes local data-cache only */ 32extern void flush_data_cache_local(void *); /* flushes local data-cache only */
33extern void flush_instruction_cache_local(void); /* flushes local code-cache only */ 33extern void flush_instruction_cache_local(void *); /* flushes local code-cache only */
34#ifdef CONFIG_SMP 34#ifdef CONFIG_SMP
35extern void flush_data_cache(void); /* flushes data-cache only (all processors) */ 35extern void flush_data_cache(void); /* flushes data-cache only (all processors) */
36extern void flush_instruction_cache(void); /* flushes i-cache only (all processors) */ 36extern void flush_instruction_cache(void); /* flushes i-cache only (all processors) */
37#else 37#else
38#define flush_data_cache flush_data_cache_local 38#define flush_data_cache() flush_data_cache_local(NULL)
39#define flush_instruction_cache flush_instruction_cache_local 39#define flush_instruction_cache() flush_instruction_cache_local(NULL)
40#endif 40#endif
41 41
42extern void parisc_cache_init(void); /* initializes cache-flushing */ 42extern void parisc_cache_init(void); /* initializes cache-flushing */
diff --git a/include/asm-parisc/io.h b/include/asm-parisc/io.h
index b9bb5946ecc9..0db00adc942a 100644
--- a/include/asm-parisc/io.h
+++ b/include/asm-parisc/io.h
@@ -41,7 +41,7 @@ extern void __raw_bad_addr(const volatile void __iomem *addr);
41#define __raw_check_addr(addr) \ 41#define __raw_check_addr(addr) \
42 if (((unsigned long)addr >> NYBBLE_SHIFT) != 0xe) \ 42 if (((unsigned long)addr >> NYBBLE_SHIFT) != 0xe) \
43 __raw_bad_addr(addr); \ 43 __raw_bad_addr(addr); \
44 addr = (void *)((unsigned long)addr | (0xfUL << NYBBLE_SHIFT)); 44 addr = (void __iomem *)((unsigned long)addr | (0xfUL << NYBBLE_SHIFT));
45#else 45#else
46#define gsc_check_addr(addr) 46#define gsc_check_addr(addr)
47#define __raw_check_addr(addr) 47#define __raw_check_addr(addr)
diff --git a/include/asm-parisc/page.h b/include/asm-parisc/page.h
index 44eae9f8274d..4a6752b0afed 100644
--- a/include/asm-parisc/page.h
+++ b/include/asm-parisc/page.h
@@ -135,6 +135,13 @@ extern int npmem_ranges;
135#define pfn_valid(pfn) ((pfn) < max_mapnr) 135#define pfn_valid(pfn) ((pfn) < max_mapnr)
136#endif /* CONFIG_DISCONTIGMEM */ 136#endif /* CONFIG_DISCONTIGMEM */
137 137
138#ifdef CONFIG_HUGETLB_PAGE
139#define HPAGE_SHIFT 22 /* 4MB (is this fixed?) */
140#define HPAGE_SIZE ((1UL) << HPAGE_SHIFT)
141#define HPAGE_MASK (~(HPAGE_SIZE - 1))
142#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
143#endif
144
138#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) 145#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
139 146
140#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) 147#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
diff --git a/include/asm-parisc/pci.h b/include/asm-parisc/pci.h
index fa39d07d49e9..f277254159b7 100644
--- a/include/asm-parisc/pci.h
+++ b/include/asm-parisc/pci.h
@@ -84,11 +84,17 @@ static __inline__ int pci_is_lmmio(struct pci_hba_data *hba, unsigned long a)
84/* 84/*
85** Convert between PCI (IO_VIEW) addresses and processor (PA_VIEW) addresses. 85** Convert between PCI (IO_VIEW) addresses and processor (PA_VIEW) addresses.
86** See pcibios.c for more conversions used by Generic PCI code. 86** See pcibios.c for more conversions used by Generic PCI code.
87**
88** Platform characteristics/firmware guarantee that
89** (1) PA_VIEW - IO_VIEW = lmmio_offset for both LMMIO and ELMMIO
90** (2) PA_VIEW == IO_VIEW for GMMIO
87*/ 91*/
88#define PCI_BUS_ADDR(hba,a) (PCI_IS_LMMIO(hba,a) \ 92#define PCI_BUS_ADDR(hba,a) (PCI_IS_LMMIO(hba,a) \
89 ? ((a) - hba->lmmio_space_offset) /* mangle LMMIO */ \ 93 ? ((a) - hba->lmmio_space_offset) /* mangle LMMIO */ \
90 : (a)) /* GMMIO */ 94 : (a)) /* GMMIO */
91#define PCI_HOST_ADDR(hba,a) ((a) + hba->lmmio_space_offset) 95#define PCI_HOST_ADDR(hba,a) (((a) & PCI_F_EXTEND) == 0 \
96 ? (a) + hba->lmmio_space_offset \
97 : (a))
92 98
93#else /* !CONFIG_64BIT */ 99#else /* !CONFIG_64BIT */
94 100
diff --git a/include/asm-parisc/processor.h b/include/asm-parisc/processor.h
index aae40e8c3aa8..89f2f1c16c12 100644
--- a/include/asm-parisc/processor.h
+++ b/include/asm-parisc/processor.h
@@ -144,16 +144,16 @@ struct thread_struct {
144 }) 144 })
145 145
146#define INIT_THREAD { \ 146#define INIT_THREAD { \
147 regs: { gr: { 0, }, \ 147 .regs = { .gr = { 0, }, \
148 fr: { 0, }, \ 148 .fr = { 0, }, \
149 sr: { 0, }, \ 149 .sr = { 0, }, \
150 iasq: { 0, }, \ 150 .iasq = { 0, }, \
151 iaoq: { 0, }, \ 151 .iaoq = { 0, }, \
152 cr27: 0, \ 152 .cr27 = 0, \
153 }, \ 153 }, \
154 task_size: DEFAULT_TASK_SIZE, \ 154 .task_size = DEFAULT_TASK_SIZE, \
155 map_base: DEFAULT_MAP_BASE, \ 155 .map_base = DEFAULT_MAP_BASE, \
156 flags: 0 \ 156 .flags = 0 \
157 } 157 }
158 158
159/* 159/*
diff --git a/include/asm-parisc/tlbflush.h b/include/asm-parisc/tlbflush.h
index c9ec39c6fc6c..825994a90e2d 100644
--- a/include/asm-parisc/tlbflush.h
+++ b/include/asm-parisc/tlbflush.h
@@ -22,6 +22,7 @@ extern spinlock_t pa_tlb_lock;
22#define purge_tlb_end(x) spin_unlock(&pa_tlb_lock) 22#define purge_tlb_end(x) spin_unlock(&pa_tlb_lock)
23 23
24extern void flush_tlb_all(void); 24extern void flush_tlb_all(void);
25extern void flush_tlb_all_local(void *);
25 26
26/* 27/*
27 * flush_tlb_mm() 28 * flush_tlb_mm()
diff --git a/include/linux/cache.h b/include/linux/cache.h
index ffe52210fc4f..d22e632f41fb 100644
--- a/include/linux/cache.h
+++ b/include/linux/cache.h
@@ -13,7 +13,7 @@
13#define SMP_CACHE_BYTES L1_CACHE_BYTES 13#define SMP_CACHE_BYTES L1_CACHE_BYTES
14#endif 14#endif
15 15
16#if defined(CONFIG_X86) || defined(CONFIG_SPARC64) || defined(CONFIG_IA64) 16#if defined(CONFIG_X86) || defined(CONFIG_SPARC64) || defined(CONFIG_IA64) || defined(CONFIG_PARISC)
17#define __read_mostly __attribute__((__section__(".data.read_mostly"))) 17#define __read_mostly __attribute__((__section__(".data.read_mostly")))
18#else 18#else
19#define __read_mostly 19#define __read_mostly