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authorZachary Amsden <zach@vmware.com>2007-05-02 13:27:19 -0400
committerAndi Kleen <andi@basil.nowhere.org>2007-05-02 13:27:19 -0400
commit9e5e3162b2d5e4466187ecd63c9eec2de33cb7bc (patch)
treee0d9231574833f17b509bc2ca1971af90f657eb2 /include
parent142dd975911fdd82b1b6f6617cd20ac90a8ccf00 (diff)
[PATCH] i386: pte simplify ops
Add comment and condense code to make use of native_local_ptep_get_and_clear function. Also, it turns out the 2-level and 3-level paging definitions were identical, so move the common definition into pgtable.h Signed-off-by: Zachary Amsden <zach@vmware.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Andi Kleen <ak@suse.de>
Diffstat (limited to 'include')
-rw-r--r--include/asm-i386/pgtable-2level.h10
-rw-r--r--include/asm-i386/pgtable-3level.h10
-rw-r--r--include/asm-i386/pgtable.h17
3 files changed, 15 insertions, 22 deletions
diff --git a/include/asm-i386/pgtable-2level.h b/include/asm-i386/pgtable-2level.h
index 3daab67cd366..a50fd1773de8 100644
--- a/include/asm-i386/pgtable-2level.h
+++ b/include/asm-i386/pgtable-2level.h
@@ -41,16 +41,6 @@ static inline void native_pte_clear(struct mm_struct *mm, unsigned long addr, pt
41 *xp = __pte(0); 41 *xp = __pte(0);
42} 42}
43 43
44/* local pte updates need not use xchg for locking */
45static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
46{
47 pte_t res;
48
49 res = *ptep;
50 native_pte_clear(NULL, 0, ptep);
51 return res;
52}
53
54#ifdef CONFIG_SMP 44#ifdef CONFIG_SMP
55static inline pte_t native_ptep_get_and_clear(pte_t *xp) 45static inline pte_t native_ptep_get_and_clear(pte_t *xp)
56{ 46{
diff --git a/include/asm-i386/pgtable-3level.h b/include/asm-i386/pgtable-3level.h
index 45b024181507..eb0f1d7e96a1 100644
--- a/include/asm-i386/pgtable-3level.h
+++ b/include/asm-i386/pgtable-3level.h
@@ -139,16 +139,6 @@ static inline void pud_clear (pud_t * pud) { }
139#define pmd_offset(pud, address) ((pmd_t *) pud_page(*(pud)) + \ 139#define pmd_offset(pud, address) ((pmd_t *) pud_page(*(pud)) + \
140 pmd_index(address)) 140 pmd_index(address))
141 141
142/* local pte updates need not use xchg for locking */
143static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
144{
145 pte_t res;
146
147 res = *ptep;
148 native_pte_clear(NULL, 0, ptep);
149 return res;
150}
151
152#ifdef CONFIG_SMP 142#ifdef CONFIG_SMP
153static inline pte_t native_ptep_get_and_clear(pte_t *ptep) 143static inline pte_t native_ptep_get_and_clear(pte_t *ptep)
154{ 144{
diff --git a/include/asm-i386/pgtable.h b/include/asm-i386/pgtable.h
index 00e97a9d367e..c6b8b944120c 100644
--- a/include/asm-i386/pgtable.h
+++ b/include/asm-i386/pgtable.h
@@ -269,6 +269,16 @@ extern void vmalloc_sync_all(void);
269#define pte_update_defer(mm, addr, ptep) do { } while (0) 269#define pte_update_defer(mm, addr, ptep) do { } while (0)
270#endif 270#endif
271 271
272/* local pte updates need not use xchg for locking */
273static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
274{
275 pte_t res = *ptep;
276
277 /* Pure native function needs no input for mm, addr */
278 native_pte_clear(NULL, 0, ptep);
279 return res;
280}
281
272/* 282/*
273 * We only update the dirty/accessed state if we set 283 * We only update the dirty/accessed state if we set
274 * the dirty bit by hand in the kernel, since the hardware 284 * the dirty bit by hand in the kernel, since the hardware
@@ -343,8 +353,11 @@ static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, unsigned long
343{ 353{
344 pte_t pte; 354 pte_t pte;
345 if (full) { 355 if (full) {
346 pte = *ptep; 356 /*
347 native_pte_clear(mm, addr, ptep); 357 * Full address destruction in progress; paravirt does not
358 * care about updates and native needs no locking
359 */
360 pte = native_local_ptep_get_and_clear(ptep);
348 } else { 361 } else {
349 pte = ptep_get_and_clear(mm, addr, ptep); 362 pte = ptep_get_and_clear(mm, addr, ptep);
350 } 363 }