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authorAndi Kleen <ak@suse.de>2005-09-12 12:49:23 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2005-09-12 13:49:55 -0400
commiteddfb4ed290383abf912630fa8dac5acf65c9e55 (patch)
treef13e544e4105facfb9d40d9ee86fb0d10ba29d04 /include
parentc1507eb2ee845b123ace751bec9c992a1937872c (diff)
[PATCH] x86-64: Remove obsolete APIC "write around" bug workaround
No x86-64 chipset has this bug Generated code doesn't change because it was always disabled. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include')
-rw-r--r--include/asm-x86_64/ipi.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/include/asm-x86_64/ipi.h b/include/asm-x86_64/ipi.h
index 5e166b9d3bde..7ba668f43c59 100644
--- a/include/asm-x86_64/ipi.h
+++ b/include/asm-x86_64/ipi.h
@@ -66,7 +66,7 @@ static inline void __send_IPI_shortcut(unsigned int shortcut, int vector, unsign
66 /* 66 /*
67 * Send the IPI. The write to APIC_ICR fires this off. 67 * Send the IPI. The write to APIC_ICR fires this off.
68 */ 68 */
69 apic_write_around(APIC_ICR, cfg); 69 apic_write(APIC_ICR, cfg);
70} 70}
71 71
72 72
@@ -92,7 +92,7 @@ static inline void send_IPI_mask_sequence(cpumask_t mask, int vector)
92 * prepare target chip field 92 * prepare target chip field
93 */ 93 */
94 cfg = __prepare_ICR2(x86_cpu_to_apicid[query_cpu]); 94 cfg = __prepare_ICR2(x86_cpu_to_apicid[query_cpu]);
95 apic_write_around(APIC_ICR2, cfg); 95 apic_write(APIC_ICR2, cfg);
96 96
97 /* 97 /*
98 * program the ICR 98 * program the ICR
@@ -102,7 +102,7 @@ static inline void send_IPI_mask_sequence(cpumask_t mask, int vector)
102 /* 102 /*
103 * Send the IPI. The write to APIC_ICR fires this off. 103 * Send the IPI. The write to APIC_ICR fires this off.
104 */ 104 */
105 apic_write_around(APIC_ICR, cfg); 105 apic_write(APIC_ICR, cfg);
106 } 106 }
107 local_irq_restore(flags); 107 local_irq_restore(flags);
108} 108}