aboutsummaryrefslogtreecommitdiffstats
path: root/include
diff options
context:
space:
mode:
authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2008-07-21 19:51:43 -0400
committerDavid S. Miller <davem@davemloft.net>2008-07-21 19:51:43 -0400
commitedc83d4f3e971b322c557604d064b68374a7b77b (patch)
tree7c9ec197a906e5ea59effc33348f40bd0582e4dd /include
parent8fbf3f30fe0700eff01d6ff8d058cd6f47d4da1b (diff)
ide: <asm-sparc/ide_64.h>: use __raw_{read,write}w()
Use __raw_{read,write}w() in __ide_{in,out}sw() and remove no longer needed {in,out}w_be(). Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include')
-rw-r--r--include/asm-sparc/ide_64.h34
1 files changed, 8 insertions, 26 deletions
diff --git a/include/asm-sparc/ide_64.h b/include/asm-sparc/ide_64.h
index 27921ccb3a1f..99eee9b0ba2f 100644
--- a/include/asm-sparc/ide_64.h
+++ b/include/asm-sparc/ide_64.h
@@ -35,17 +35,6 @@
35#define __ide_mm_outsw __ide_outsw 35#define __ide_mm_outsw __ide_outsw
36#define __ide_mm_outsl __ide_outsl 36#define __ide_mm_outsl __ide_outsl
37 37
38static inline unsigned int inw_be(void __iomem *addr)
39{
40 unsigned int ret;
41
42 __asm__ __volatile__("lduha [%1] %2, %0"
43 : "=r" (ret)
44 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
45
46 return ret;
47}
48
49static inline void __ide_insw(void __iomem *port, void *dst, u32 count) 38static inline void __ide_insw(void __iomem *port, void *dst, u32 count)
50{ 39{
51#ifdef DCACHE_ALIASING_POSSIBLE 40#ifdef DCACHE_ALIASING_POSSIBLE
@@ -55,34 +44,27 @@ static inline void __ide_insw(void __iomem *port, void *dst, u32 count)
55 u32 *pi; 44 u32 *pi;
56 45
57 if(((u64)ps) & 0x2) { 46 if(((u64)ps) & 0x2) {
58 *ps++ = inw_be(port); 47 *ps++ = __raw_readw(port);
59 count--; 48 count--;
60 } 49 }
61 pi = (u32 *)ps; 50 pi = (u32 *)ps;
62 while(count >= 2) { 51 while(count >= 2) {
63 u32 w; 52 u32 w;
64 53
65 w = inw_be(port) << 16; 54 w = __raw_readw(port) << 16;
66 w |= inw_be(port); 55 w |= __raw_readw(port);
67 *pi++ = w; 56 *pi++ = w;
68 count -= 2; 57 count -= 2;
69 } 58 }
70 ps = (u16 *)pi; 59 ps = (u16 *)pi;
71 if(count) 60 if(count)
72 *ps++ = inw_be(port); 61 *ps++ = __raw_readw(port);
73 62
74#ifdef DCACHE_ALIASING_POSSIBLE 63#ifdef DCACHE_ALIASING_POSSIBLE
75 __flush_dcache_range((unsigned long)dst, end); 64 __flush_dcache_range((unsigned long)dst, end);
76#endif 65#endif
77} 66}
78 67
79static inline void outw_be(unsigned short w, void __iomem *addr)
80{
81 __asm__ __volatile__("stha %r0, [%1] %2"
82 : /* no outputs */
83 : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
84}
85
86static inline void __ide_outsw(void __iomem *port, void *src, u32 count) 68static inline void __ide_outsw(void __iomem *port, void *src, u32 count)
87{ 69{
88#ifdef DCACHE_ALIASING_POSSIBLE 70#ifdef DCACHE_ALIASING_POSSIBLE
@@ -92,7 +74,7 @@ static inline void __ide_outsw(void __iomem *port, void *src, u32 count)
92 const u32 *pi; 74 const u32 *pi;
93 75
94 if(((u64)src) & 0x2) { 76 if(((u64)src) & 0x2) {
95 outw_be(*ps++, port); 77 __raw_writew(*ps++, port);
96 count--; 78 count--;
97 } 79 }
98 pi = (const u32 *)ps; 80 pi = (const u32 *)ps;
@@ -100,13 +82,13 @@ static inline void __ide_outsw(void __iomem *port, void *src, u32 count)
100 u32 w; 82 u32 w;
101 83
102 w = *pi++; 84 w = *pi++;
103 outw_be((w >> 16), port); 85 __raw_writew((w >> 16), port);
104 outw_be(w, port); 86 __raw_writew(w, port);
105 count -= 2; 87 count -= 2;
106 } 88 }
107 ps = (const u16 *)pi; 89 ps = (const u16 *)pi;
108 if(count) 90 if(count)
109 outw_be(*ps, port); 91 __raw_writew(*ps, port);
110 92
111#ifdef DCACHE_ALIASING_POSSIBLE 93#ifdef DCACHE_ALIASING_POSSIBLE
112 __flush_dcache_range((unsigned long)src, end); 94 __flush_dcache_range((unsigned long)src, end);