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authorLinus Torvalds <torvalds@g5.osdl.org>2005-10-13 12:59:32 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2005-10-13 12:59:32 -0400
commitc931488cc4619eecfe68a2f046b5898fddc2f904 (patch)
treeb92e43b7cbae6e7128ca6d7831d06e63989f2a31 /include
parentaac372de6bde03168b833b4db1346a2c34a016c6 (diff)
parent3a8f675c40ba2d04e4fff6710db3da763436269f (diff)
Merge master.kernel.org:/home/rmk/linux-2.6-arm
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/arch-pxa/pxa-regs.h7
-rw-r--r--include/asm-arm/arch-s3c2410/hardware.h7
2 files changed, 11 insertions, 3 deletions
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index 939d9e5020a0..13fa2deb4ddd 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -126,8 +126,8 @@
126#define DRCMR12 __REG(0x40000130) /* Request to Channel Map Register for AC97 audio transmit Request */ 126#define DRCMR12 __REG(0x40000130) /* Request to Channel Map Register for AC97 audio transmit Request */
127#define DRCMR13 __REG(0x40000134) /* Request to Channel Map Register for SSP receive Request */ 127#define DRCMR13 __REG(0x40000134) /* Request to Channel Map Register for SSP receive Request */
128#define DRCMR14 __REG(0x40000138) /* Request to Channel Map Register for SSP transmit Request */ 128#define DRCMR14 __REG(0x40000138) /* Request to Channel Map Register for SSP transmit Request */
129#define DRCMR15 __REG(0x4000013c) /* Reserved */ 129#define DRCMR15 __REG(0x4000013c) /* Request to Channel Map Register for SSP2 receive Request */
130#define DRCMR16 __REG(0x40000140) /* Reserved */ 130#define DRCMR16 __REG(0x40000140) /* Request to Channel Map Register for SSP2 transmit Request */
131#define DRCMR17 __REG(0x40000144) /* Request to Channel Map Register for ICP receive Request */ 131#define DRCMR17 __REG(0x40000144) /* Request to Channel Map Register for ICP receive Request */
132#define DRCMR18 __REG(0x40000148) /* Request to Channel Map Register for ICP transmit Request */ 132#define DRCMR18 __REG(0x40000148) /* Request to Channel Map Register for ICP transmit Request */
133#define DRCMR19 __REG(0x4000014c) /* Request to Channel Map Register for STUART receive Request */ 133#define DRCMR19 __REG(0x4000014c) /* Request to Channel Map Register for STUART receive Request */
@@ -151,7 +151,8 @@
151#define DRCMR37 __REG(0x40000194) /* Request to Channel Map Register for USB endpoint 13 Request */ 151#define DRCMR37 __REG(0x40000194) /* Request to Channel Map Register for USB endpoint 13 Request */
152#define DRCMR38 __REG(0x40000198) /* Request to Channel Map Register for USB endpoint 14 Request */ 152#define DRCMR38 __REG(0x40000198) /* Request to Channel Map Register for USB endpoint 14 Request */
153#define DRCMR39 __REG(0x4000019C) /* Reserved */ 153#define DRCMR39 __REG(0x4000019C) /* Reserved */
154 154#define DRCMR66 __REG(0x40001108) /* Request to Channel Map Register for SSP3 receive Request */
155#define DRCMR67 __REG(0x4000110C) /* Request to Channel Map Register for SSP3 transmit Request */
155#define DRCMR68 __REG(0x40001110) /* Request to Channel Map Register for Camera FIFO 0 Request */ 156#define DRCMR68 __REG(0x40001110) /* Request to Channel Map Register for Camera FIFO 0 Request */
156#define DRCMR69 __REG(0x40001114) /* Request to Channel Map Register for Camera FIFO 1 Request */ 157#define DRCMR69 __REG(0x40001114) /* Request to Channel Map Register for Camera FIFO 1 Request */
157#define DRCMR70 __REG(0x40001118) /* Request to Channel Map Register for Camera FIFO 2 Request */ 158#define DRCMR70 __REG(0x40001118) /* Request to Channel Map Register for Camera FIFO 2 Request */
diff --git a/include/asm-arm/arch-s3c2410/hardware.h b/include/asm-arm/arch-s3c2410/hardware.h
index 48a39918a760..1c9de29cafef 100644
--- a/include/asm-arm/arch-s3c2410/hardware.h
+++ b/include/asm-arm/arch-s3c2410/hardware.h
@@ -92,6 +92,13 @@ extern unsigned int s3c2410_gpio_getpin(unsigned int pin);
92 92
93extern unsigned int s3c2410_modify_misccr(unsigned int clr, unsigned int chg); 93extern unsigned int s3c2410_modify_misccr(unsigned int clr, unsigned int chg);
94 94
95#ifdef CONFIG_CPU_S3C2440
96
97extern int s3c2440_set_dsc(unsigned int pin, unsigned int value);
98
99#endif /* CONFIG_CPU_S3C2440 */
100
101
95#endif /* __ASSEMBLY__ */ 102#endif /* __ASSEMBLY__ */
96 103
97#include <asm/sizes.h> 104#include <asm/sizes.h>