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authorMarc Pignat <marc.pignat@hevs.ch>2008-05-30 08:07:47 -0400
committerPierre Ossman <drzeus@drzeus.cx>2008-07-15 08:14:42 -0400
commitc5a89c6c0805959f813e8342d6f4040860f6d7db (patch)
treeb6f0e3071d44196d1dd8dc5775e42996185a49b9 /include
parente181dce8acab4f7d7c4772d2a8281510d503ab21 (diff)
mmc: at91_mci: avoid timeouts
The at91 mci controller internal state machine seems to often crash. This can be fixed by resetting the controller after each command for at91rm9200 and by setting the MCI_BLKR register on at91sam926*. Signed-off-by: Marc Pignat <marc.pignat@hevs.ch> Signed-off-by: Hans J Koch <hjk@linutronix.de> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/arch-at91/at91_mci.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/include/asm-arm/arch-at91/at91_mci.h b/include/asm-arm/arch-at91/at91_mci.h
index 1551fc24eb43..400ec10014b4 100644
--- a/include/asm-arm/arch-at91/at91_mci.h
+++ b/include/asm-arm/arch-at91/at91_mci.h
@@ -75,6 +75,10 @@
75#define AT91_MCI_TRTYP_MULTIPLE (1 << 19) 75#define AT91_MCI_TRTYP_MULTIPLE (1 << 19)
76#define AT91_MCI_TRTYP_STREAM (2 << 19) 76#define AT91_MCI_TRTYP_STREAM (2 << 19)
77 77
78#define AT91_MCI_BLKR 0x18 /* Block Register */
79#define AT91_MCI_BLKR_BCNT(n) ((0xffff & (n)) << 0) /* Block count */
80#define AT91_MCI_BLKR_BLKLEN(n) ((0xffff & (n)) << 16) /* Block lenght */
81
78#define AT91_MCI_RSPR(n) (0x20 + ((n) * 4)) /* Response Registers 0-3 */ 82#define AT91_MCI_RSPR(n) (0x20 + ((n) * 4)) /* Response Registers 0-3 */
79#define AT91_MCR_RDR 0x30 /* Receive Data Register */ 83#define AT91_MCR_RDR 0x30 /* Receive Data Register */
80#define AT91_MCR_TDR 0x34 /* Transmit Data Register */ 84#define AT91_MCR_TDR 0x34 /* Transmit Data Register */