diff options
author | Marc St-Jean <stjeanma@pmc-sierra.com> | 2007-05-06 17:48:45 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-05-07 15:12:50 -0400 |
commit | beab697ab4b2962e3d741b476abe443baad0933d (patch) | |
tree | f581ce38378f6cacbf0042b4eb9c084a6fc932d9 /include | |
parent | 6179b5562d5d17c7c09b54cb11dd925ca308d7a9 (diff) |
serial driver PMC MSP71xx
Serial driver patch for the PMC-Sierra MSP71xx devices.
There are three different fixes:
1 Fix for DesignWare APB THRE errata: In brief, this is a non-standard
16550 in that the THRE interrupt will not re-assert itself simply by
disabling and re-enabling the THRI bit in the IER, it is only re-enabled
if a character is actually sent out.
It appears that the "8250-uart-backup-timer.patch" in the "mm" tree
also fixes it so we have dropped our initial workaround. This patch now
needs to be applied on top of that "mm" patch.
2 Fix for Busy Detect on LCR write: The DesignWare APB UART has a feature
which causes a new Busy Detect interrupt to be generated if it's busy
when the LCR is written. This fix saves the value of the LCR and
rewrites it after clearing the interrupt.
3 Workaround for interrupt/data concurrency issue: The SoC needs to
ensure that writes that can cause interrupts to be cleared reach the UART
before returning from the ISR. This fix reads a non-destructive register
on the UART so the read transaction completion ensures the previously
queued write transaction has also completed.
Signed-off-by: Marc St-Jean <Marc_St-Jean@pmc-sierra.com>
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/serial_core.h | 2 | ||||
-rw-r--r-- | include/linux/serial_reg.h | 2 |
2 files changed, 4 insertions, 0 deletions
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h index 586aaba91720..8b5592e6aca4 100644 --- a/include/linux/serial_core.h +++ b/include/linux/serial_core.h | |||
@@ -230,6 +230,7 @@ struct uart_port { | |||
230 | #define UPIO_MEM32 (3) | 230 | #define UPIO_MEM32 (3) |
231 | #define UPIO_AU (4) /* Au1x00 type IO */ | 231 | #define UPIO_AU (4) /* Au1x00 type IO */ |
232 | #define UPIO_TSI (5) /* Tsi108/109 type IO */ | 232 | #define UPIO_TSI (5) /* Tsi108/109 type IO */ |
233 | #define UPIO_DWAPB (6) /* DesignWare APB UART */ | ||
233 | 234 | ||
234 | unsigned int read_status_mask; /* driver specific */ | 235 | unsigned int read_status_mask; /* driver specific */ |
235 | unsigned int ignore_status_mask; /* driver specific */ | 236 | unsigned int ignore_status_mask; /* driver specific */ |
@@ -276,6 +277,7 @@ struct uart_port { | |||
276 | struct device *dev; /* parent device */ | 277 | struct device *dev; /* parent device */ |
277 | unsigned char hub6; /* this should be in the 8250 driver */ | 278 | unsigned char hub6; /* this should be in the 8250 driver */ |
278 | unsigned char unused[3]; | 279 | unsigned char unused[3]; |
280 | void *private_data; /* generic platform data pointer */ | ||
279 | }; | 281 | }; |
280 | 282 | ||
281 | /* | 283 | /* |
diff --git a/include/linux/serial_reg.h b/include/linux/serial_reg.h index 3c8a6aa77415..1c5ed7d92b0f 100644 --- a/include/linux/serial_reg.h +++ b/include/linux/serial_reg.h | |||
@@ -38,6 +38,8 @@ | |||
38 | #define UART_IIR_RDI 0x04 /* Receiver data interrupt */ | 38 | #define UART_IIR_RDI 0x04 /* Receiver data interrupt */ |
39 | #define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */ | 39 | #define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */ |
40 | 40 | ||
41 | #define UART_IIR_BUSY 0x07 /* DesignWare APB Busy Detect */ | ||
42 | |||
41 | #define UART_FCR 2 /* Out: FIFO Control Register */ | 43 | #define UART_FCR 2 /* Out: FIFO Control Register */ |
42 | #define UART_FCR_ENABLE_FIFO 0x01 /* Enable the FIFO */ | 44 | #define UART_FCR_ENABLE_FIFO 0x01 /* Enable the FIFO */ |
43 | #define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */ | 45 | #define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */ |